research-article

Dynamic Behavior Specification and Dynamic Mapping for Real-Time Embedded Systems: HOPES Approach

Authors:

Shin-Haeng Kang,

Soonhoi HaAuthors Info & Claims

ACM Transactions on Embedded Computing Systems (TECS), Volume 13, Issue 4s

Article No.: 135, Pages 1 - 26

https://doi.org/10.1145/2584658

Published: 01 April 2014 Publication History

Abstract

As the number of processors in a chip increases and more functions are integrated, the system status will change dynamically due to various factors such as the workload variation, QoS requirement, and unexpected component failure. A typical method to deal with the dynamics of the system is to decide the mapping decision at runtime, based on the local information of the system status. It is very challenging to guarantee any real-time performance of a certain application in such a dynamically varying system. To solve this problem, we propose a hybrid specification of dataflow and FSM models to specify the dynamic behavior of a system distinguishing inter- and intra-application dynamism. At the top level, each application is specified by a dataflow task and the dynamic behavior is modeled as a control task that supervises the execution of applications. Inside a dataflow task, we specify the dynamic behavior using a similar way as FSM-based SADF in which an application is specified by a synchronous dataflow graph for each mode of operation. It enables us to perform compile-time scheduling of each graph to maximize the throughput varying the number of allocated processors, and store the scheduling information. When a change in system state is detected at runtime, the number of allocated processors to the active tasks is determined dynamically utilizing the stored scheduling information of those tasks in order to meet the real-time requirements. The proposed technique is implemented in the HOPES design environment. Through preliminary experiments with a simple smartphone example, we show the viability of the proposed methodology.

References

[1]

Mohammad Abdullah Al Faruque, Rudolf Krist, and Jörg Henkel. 2008. ADAM: Run-time agent-based distributed applications mapping for on-chip communication. In Proceedings of the Design Automation Conference (DAC'08). 760--765.

Digital Library

[2]

Arm Ltd. 2014. RealView armulator. http://www.arm.com/products/tools/software-tools/rvds/index.php.

[3]

Bishnupriya Bhattacharya and Shuvra S. Bhattacharyya. 2001. Parameterized dataflow modeling for dsp systems. IEEE Trans. Signal Process. 49, 10, 2408--2421.

Digital Library

[4]

Joseph T. Buck. 1993. Scheduling dynamic dataflow graphs with bounded memory using the token flow model. Ph.D. thesis. University of California at Berkeley, CA.

Digital Library

[5]

Joseph T. Buck, Soonhoi Ha, Edward A. Lee, and David G. Messerschmitt. 1994. Ptolemy: A framework for simulating and prototyping heterogeneous systems. Int. J. Comput. Simul. 4, 155--182.

[6]

Ewerson Carvalho, Ney Calazans, and Fernando Moraes. 2007. Heuristics for dynamic task mapping in noc-based geterogeneous mpsocs. In Proceedings of the 18^th IEEE/IFIP International Workshop on Rapid System Prototyping. 34--40.

Digital Library

[7]

Chen-Ling Chou, Umit Y. Ogras, and Radu Marculescu. 2008. Energy-and performance-aware incremental mapping for networks on chip with multiple voltage levels. IEEE Trans. Comput.-Aided Des. Integr. Circ. Syst. 27, 10, 1866--1879.

Digital Library

[8]

Chen-Ling Chou and Radu Marculescu. 2011. FARM: Fault-aware resource management in noc-based multiprocessor platforms. In Proceedings of the Design Automation and Test in Europe Conference and Exhibition (DATE'11). 1--6.

[9]

Yingnan Cui, Wei Zhang, and Hao Yu. 2012. Decentralized agent based re-clustering for task mapping of tera-scale network-on-chip system. In Proceedings of the International Symposium on Circuits and Systems. 2437--2440.

[10]

Erwin A. De Kock, Wim J. M. Smits, Pieter Van Der Wolf, Jean Yves Brunel, Wido M. Kruijtzer, Paul Lieverse, Kees A. Vissers, and Gerben Essink. 2000. YAPI: Application modeling for signal processing systems. In Proceedings of the Design Automation Conference (DAC'00). 402--405.

Digital Library

[11]

John Eidson, Edward A. Lee, Slobodan Matic, Sanjit A. Seshia, and Jia Zou. 2012. Distributed real-time software for cyber-physical systems. Proc. IEEE 100, 1, 45--59.

[12]

Fabrizio Fazzino, Maurizio Palesi, and David Patti. 2008. Noxim: Network-on-chip simulator. http://sourceforge.net/projects/noxim.

[13]

Marc Geilen and Twan Basten. 2004. Reactive process networks. In Proceedings of the 4^th ACM International Conference on Embedded Software (EMSOFT'04). 137--146.

Digital Library

[14]

Marc Geilen and Twan Basten. 2010. Kahn process networks and a reactive extension. In Handbook of Signal Processing Systems, Springer, 967--1006.

[15]

Alain Girault, Bilung Lee, and Edward A. Lee. 1999. Hierarchical finite state machines with multiple concurrency models. IEEE Trans. Comput.-Aided Des. Integr. Circ. Syst. 18, 6, 742--760.

Digital Library

[16]

Soonhoi Ha, Sungchan Kim, Choonseung Lee, Youngmin Yi, Seongnam Kwon, and Young-Pyo Joo. 2007. PeaCE: A hardware-software codesign environment for multimedia embedded systems. ACM Trans. Des. Autom. Electron. Syst. 12, 24.

Digital Library

[17]

David Harel and Amnon Naamad. 1996. The statemate semantics of statecharts. ACM Trans. Softw. Engin. Meth., 5, 4.

Digital Library

[18]

Christian Haubelt, Joachim Falk, Joachim Keinert, Thomas Schlichter, Martin Streubuhr, Andreas Deyhle, Andreas Hadert, and Jurgen Teich. 2007. A systemc-based design methodology for digital signal processing systems. EURASIP J. Embed. Syst. 2007, 1, 15.

Digital Library

[19]

Jingcao Hu, and Radu Marculescu. 2004. Energy-aware communication and task scheduling for network-on-chip architectures under real-time constraints. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE'04). 234--239.

Digital Library

[20]

Jia Huang, Andreas Raabe, Christian Buckl, and Alois Knoll. 2011. A workflow for runtime adaptive task allocation on heterogeneous mpsocs. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE'11). 1--6.

[21]

J. E. D. E. 2011. Failure mechanisms and models for semiconductor devices. http://www.jedec.org/standards-documents/docs/jep-122e.

[22]

Gilles Kahn. 1974. The semantics of a simple language for parallel programming. In Proceedings of the IFIP Congress. 471--475.

[23]

Dohyung Kim, Minyoung Kim, and Soonhoi Ha. 2003. A case study of system level specification and software synthesis of multi-mode multimedia terminal. In Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia'03).

[24]

Seongnam Kwon, Yongjoo Kim, Woo-Chul Jeun, Soonhoi Ha, and Yunheung Paek. 2008. A retargetable parallel-programming framework for mpsoc. ACM Trans. Des. Autom. Electron. Syst. 13, 1--18.

Digital Library

[25]

Chanhee Lee, Hokeun Kim, Hae-Woo Park, Sungchan Kim, Hyunok Oh, and Soonhoi Ha. 2010, A task remapping technique for reliable multi-core embedded systems. In Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'10). 307--316.

Digital Library

[26]

Chanhee Lee, Sungchan Kim, Hyunok Oh, and Soonhoi Ha. 2013. Failure-aware task scheduling of synchronous data flow graphs under real-time constraints. J. Signal Process. Syst. 73, 2, 201--212.

Digital Library

[27]

Edward A. Lee and David G. Messerschmitt. 1987. Synchronous data flow. Proc. IEEE 75, 9, 1235--1245.

[28]

Giovanni Mariani, Prabhat Avasare, Geert Vanmeerbeeck, Chantal Ykman-Couvreur, Gianluca Palermo, Cristina Silvano, and Vittorio Zaccaria. 2010. An industrial design space exploration framework for supporting run-time resource management on multi-core systems. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE'10).196--201.

Digital Library

[29]

Peter Marwedel, Jürgen Teich, Georgia Kouveli, Iuliana Bacivarov, Lothar Thiele, Soonhoi Ha, Chanhee Lee, Qiang Xu, and Lin Huang. 2011. Mapping of applications to mpsocs. In Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES/ISSS'11). 109--118.

Digital Library

[30]

Orlando Moreira, Jan-David Mol, Marco Bekooij, and Jef Van Meerbergen. 2005. Multiprocessor resource allocation for hard-real-time streaming with a dynamic job-mix. In Proceedings of the Real Time and Embedded Technology and Applications Symposium. 332--341.

Digital Library

[31]

Lars Schor, Iuliana Bacivarov, Devendra Rai, Hoeseok Yang, Shin-Haeng Kang, and Lothar Thiele. 2012. Scenario-based design flow for mapping streaming applications onto on-chip many-core systems. In Proceedings of the International Conference on Compilers Architecture and Synthesis for Embedded Systems (CASES'12). 71--80.

Digital Library

[32]

Andreas Schranzhofer, Jian-Jia Chen, Luca Santinelli, and Lothar Thiele. 2010. Dynamic and adaptive allocation of applications on mpsoc platforms. In Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC'10). 885--890.

Digital Library

[33]

Amit Kumar Singh, Akash Kumar, and Thambipillai Srikanthan. 2012. Accelerating throughput-aware runtime mapping for heterogeneous mpsocs. ACM Trans. Des. Autom. Electron. Syst. 18, 1.

Digital Library

[34]

Karsten Strehl, Lothar Thiele, Matthias Gries, Dirk Ziegenbein, Rolf Ernst, and Jürgen Teich. 2001. FunState-an internal design representation for codesign. IEEE Trans. VLSI Syst. 9, 4, 524--544.

Digital Library

[35]

Sander Stuijk, Marc Geilen, and Twan Basten. 2010. A predictable multiprocessor design flow for streaming applications with dynamic behavior. In Proceedings of the Euromicro Conference on Digital System Design. 548--555.

Digital Library

[36]

Sander Stuijk, Marc Geilen, Bart D. Theelen, and Twan Basten. 2011. Scenario-aware dataflow: Modeling, analysis and implementation of dynamic applications. In Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS'11). 404--411.

[37]

Bart D. Theelen, Marc Geilen, Twan Basten, Jeroen Voeten, Stefan Valentin Gheorghita, and Sander Stuijk. 2006. A scenario-aware data flow model for combined long-run average and worst-case performance analysis. In Proceedings of the International Conference on Formal Methods and Models for Codesign (MEMOCODE'06). 185--194.

Digital Library

[38]

Lothar Thiele, Iuliana Bacivarov, Wolfgang Haid, and Kai Huang. 2007. Mapping applications to tiled multiprocessor embedded systems. In Proceedings of the 7^th International Conference on Application of Concurrency to System Design (ACSD'07). 29--40.

Digital Library

[39]

Peng Yang, Paul Marchal, Shun Wong, Stefaan Himpe, Franckky Catthoor, Patrick David, Johan Vounckx, and Rudy Lauwereins. 2002. Managing dynamic concurrent tasks in embedded real-time multimedia systems. In Proceedings of the International Symposium on System Synthesis. 112--119.

Digital Library

[40]

Chantal Ykman-Couvreur, Prabhat Avasare, Giovanni Mariani, Gianluca Palermo, Cristina Silvano, and Vittorio Zaccaria, 2011, Linking runtime resource management of embedded multi-processor platforms with automated design-time exploration. IET Comput. Digital Techniques 5, 2, 123--135.

[41]

Baoxian Zhao, Hakan Aydin, and Dakai Zhu. 2011. Generalized reliability-oriented energy management for real-time embedded applications. In Proceedings of the Design Automation Conference (DAC'11). 381--386.

Digital Library

[42]

Jia Zou, Slobodan Matic, Edward A. Lee, Thomas H. Feng, and Patricia Derler. 2009. Execution strategies for ptides, a programming model for distributed embedded systems. In Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'09). 77--86.

Digital Library

Cited By

Spieck JWildermann STeich J(2024)A Scenario-Based DVFS-Aware Hybrid Application Mapping Methodology for MPSoCsACM Transactions on Design Automation of Electronic Systems10.1145/366063329:4(1-43)Online publication date: 23-Apr-2024
https://dl.acm.org/doi/10.1145/3660633
Kim JHa S(2023)Energy-Aware Scenario-Based Mapping of Deep Learning Applications Onto Heterogeneous Processors Under Real-Time ConstraintsIEEE Transactions on Computers10.1109/TC.2022.321899172:6(1666-1680)Online publication date: 1-Jun-2023
https://doi.org/10.1109/TC.2022.3218991
Jeong EJeong DHa S(2021)Dataflow Model–based Software Synthesis Framework for Parallel and Distributed Embedded SystemsACM Transactions on Design Automation of Electronic Systems10.1145/344768026:5(1-38)Online publication date: 5-Jun-2021
https://dl.acm.org/doi/10.1145/3447680
Show More Cited By

Index Terms

Dynamic Behavior Specification and Dynamic Mapping for Real-Time Embedded Systems: HOPES Approach
1. Computer systems organization
  1. Embedded and cyber-physical systems
  2. Real-time systems

Index terms have been assigned to the content through auto-classification.

Recommendations

Characterization and Enhancement of Dynamic Mapping Heuristics for Heterogeneous Systems
ICPP '00: Proceedings of the 2000 International Workshop on Parallel Processing

Clusters of heterogeneous PCs/workstations have become attractive systems to execute a set of computationally intensive independent tasks. This paper focuses on scheduling schemes in a dynamic context - i.e. where scheduling decisions are made ...
Static and Dynamic Variable Voltage Scheduling Algorithms for Real-Time Heterogeneous Distributed Embedded Systems
ASP-DAC '02: Proceedings of the 2002 Asia and South Pacific Design Automation Conference

This paper addresses the problem of static and dynamic variable voltage scheduling of multi-rate periodic task graphs (i.e., tasks with precedence relationships) and aperiodic tasks in heterogeneous distributed real-time embedded systems. Such an ...
Dynamic time-based scheduling for hard real-time systems

Comments

Information & Contributors

Information

Published In

cover image ACM Transactions on Embedded Computing Systems

ACM Transactions on Embedded Computing Systems Volume 13, Issue 4s

Special Issue on Real-Time and Embedded Technology and Applications, Domain-Specific Multicore Computing, Cross-Layer Dependable Embedded Systems, and Application of Concurrency to System Design (ACSD'13)

July 2014

571 pages

ISSN:1539-9087

EISSN:1558-3465

DOI:10.1145/2601432

Editors:
Sandeep K. Shukla
Virginia Tech, USA
,
Josep Carmona
Universitat Politècnica de Catalunya, Spain
,
Mihai Teodor Lazarescu
Politecnico di Torino, Italy
,
Marta Pietkiewicz-koutny
Newcastle University, UK

Issue’s Table of Contents

Copyright © 2014 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

Publisher

Association for Computing Machinery

New York, NY, United States

Journal Family

ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 01 April 2014

Accepted: 01 September 2013

Revised: 01 June 2013

Received: 01 January 2013

Published in TECS Volume 13, Issue 4s

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Research-article
Research
Refereed

Funding Sources

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

37
Total Citations
View Citations
794
Total Downloads

Downloads (Last 12 months)16
Downloads (Last 6 weeks)4

Reflects downloads up to 29 Jul 2024

Other Metrics

View Author Metrics

Citations

Cited By

Spieck JWildermann STeich J(2024)A Scenario-Based DVFS-Aware Hybrid Application Mapping Methodology for MPSoCsACM Transactions on Design Automation of Electronic Systems10.1145/366063329:4(1-43)Online publication date: 23-Apr-2024
https://dl.acm.org/doi/10.1145/3660633
Kim JHa S(2023)Energy-Aware Scenario-Based Mapping of Deep Learning Applications Onto Heterogeneous Processors Under Real-Time ConstraintsIEEE Transactions on Computers10.1109/TC.2022.321899172:6(1666-1680)Online publication date: 1-Jun-2023
https://doi.org/10.1109/TC.2022.3218991
Jeong EJeong DHa S(2021)Dataflow Model–based Software Synthesis Framework for Parallel and Distributed Embedded SystemsACM Transactions on Design Automation of Electronic Systems10.1145/344768026:5(1-38)Online publication date: 5-Jun-2021
https://dl.acm.org/doi/10.1145/3447680
Jeong DKim JOldja MHa S(2021)Parallel Scheduling of Multiple SDF Graphs Onto Heterogeneous ProcessorsIEEE Access10.1109/ACCESS.2021.30547259(20493-20507)Online publication date: 2021
https://doi.org/10.1109/ACCESS.2021.3054725
Ruaro MJantsch AMoraes F(2019)Self-Adaptive QoS Management of Computation and Communication Resources in Many-Core SoCsACM Transactions on Embedded Computing Systems10.1145/332875518:4(1-21)Online publication date: 10-Jun-2019
https://dl.acm.org/doi/10.1145/3328755
Weichslgartner AWildermann SGangadharan DGlaß MTeich J(2018)A Design-Time/Run-Time Application Mapping Methodology for Predictable Execution Time in MPSoCsACM Transactions on Embedded Computing Systems10.1145/327466517:5(1-25)Online publication date: 19-Nov-2018
https://dl.acm.org/doi/10.1145/3274665
Hong HJung HPark KHa S(2018)SeMo: Service-Oriented and Model-Based Software Framework for Cooperating RobotsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.285733937:11(2952-2963)Online publication date: Nov-2018
https://doi.org/10.1109/TCAD.2018.2857339
Wang XSingh ALi BYang YLi HMak T(2018)Bubble Budgeting: Throughput Optimization for Dynamic Workloads by Exploiting Dark Cores in Many Core SystemsIEEE Transactions on Computers10.1109/TC.2017.273596767:2(178-192)Online publication date: 1-Feb-2018
https://doi.org/10.1109/TC.2017.2735967
Schwarzer TRoloff SRichthammer VKhaldi RWildermann SGlass MTeich J(2018)On the Complexity of Mapping Feasibility in Many-Core Architectures2018 IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)10.1109/MCSoC2018.2018.00038(176-183)Online publication date: Sep-2018
https://doi.org/10.1109/MCSoC2018.2018.00038
Jang JYang HYoo SHessel FRousseau FKent KLee K(2017)Executable dataflow benchmark generation technique for multi-core embedded systemsProceedings of the 28th International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype10.1145/3130265.3130323(50-56)Online publication date: 19-Oct-2017
https://dl.acm.org/doi/10.1145/3130265.3130323
Show More Cited By

View Options

Get Access

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Article

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Media

Figures

Other

Tables

View Issue’s Table of Contents