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Hybrid Static–Dynamic Analysis for Statically Bounded Region Serializability

Published: 14 March 2015 Publication History

Abstract

Data races are common. They are difficult to detect, avoid, or eliminate, and programmers sometimes introduce them intentionally. However, shared-memory programs with data races have unexpected, erroneous behaviors. Intentional and unintentional data races lead to atomicity and sequential consistency (SC) violations, and they make it more difficult to understand, test, and verify software. Existing approaches for providing stronger guarantees for racy executions add high run-time overhead and/or rely on custom hardware. This paper shows how to provide stronger semantics for racy programs while providing relatively good performance on commodity systems. A novel hybrid static--dynamic analysis called \emph{EnfoRSer} provides end-to-end support for a memory model called \emph{statically bounded region serializability} (SBRS) that is not only stronger than weak memory models but is strictly stronger than SC. EnfoRSer uses static compiler analysis to transform regions, and dynamic analysis to detect and resolve conflicts at run time. By demonstrating commodity support for a reasonably strong memory model with reasonable overheads, we show its potential as an always-on execution model.

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  1. Hybrid Static–Dynamic Analysis for Statically Bounded Region Serializability

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    Published In

    cover image ACM SIGARCH Computer Architecture News
    ACM SIGARCH Computer Architecture News  Volume 43, Issue 1
    ASPLOS'15
    March 2015
    676 pages
    ISSN:0163-5964
    DOI:10.1145/2786763
    Issue’s Table of Contents
    • cover image ACM Conferences
      ASPLOS '15: Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems
      March 2015
      720 pages
      ISBN:9781450328357
      DOI:10.1145/2694344
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    Publication History

    Published: 14 March 2015
    Published in SIGARCH Volume 43, Issue 1

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    Author Tags

    1. atomicity
    2. dynamic analysis
    3. memory models
    4. region serializability
    5. static analysis
    6. synchronization

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    • (2017)Language-level persistencyACM SIGARCH Computer Architecture News10.1145/3140659.308022945:2(481-493)Online publication date: 24-Jun-2017
    • (2017)Hybridizing and Relaxing Dependence Tracking for Efficient Parallel Runtime SupportACM Transactions on Parallel Computing10.1145/31081384:2(1-42)Online publication date: 30-Aug-2017
    • (2017)Language-level persistencyProceedings of the 44th Annual International Symposium on Computer Architecture10.1145/3079856.3080229(481-493)Online publication date: 24-Jun-2017
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