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Real-Time Anomaly Detection Framework for Many-Core Router through Machine-Learning Techniques

Published: 16 June 2016 Publication History

Abstract

In this article, we propose a real-time anomaly detection framework for an NoC-based many-core architecture. We assume that processing cores and memories are safe and anomaly is included through a communication medium (i.e., router). The article targets three different attacks, namely, traffic diversion, route looping, and core address spoofing attacks. The attacks are detected by using machine-learning techniques. Comprehensive analysis on machine-learning algorithms suggests that Support Vector Machine (SVM) and K-Nearest Neighbor (K-NN) have better attack detection efficiency. It has been observed that both algorithms have accuracy in the range of 94% to 97%. Additional hardware complexity analysis advocates SVM to be implemented on hardware. To test the framework, we implement a condition-based attack insertion module; attacks are performed intra- and intercluster. The proposed real-time anomaly detection framework is fully placed and routed on Xilinx Virtex-7 FPGA. Postplace and -route implementation results show that SVM has 12% to 2% area overhead and 3% to 1% power overhead for the quad-core and 16-core implementation, respectively. It is also observed that it takes 25% to 18% of the total execution time to detect an anomaly in transferred packets for quad-core and 16-core, respectively. The proposed framework achieves 65% reduction in area overhead and is 3 times faster compared to previous published work.

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      Published In

      cover image ACM Journal on Emerging Technologies in Computing Systems
      ACM Journal on Emerging Technologies in Computing Systems  Volume 13, Issue 1
      Special Issue on Secure and Trustworthy Computing
      January 2017
      208 pages
      ISSN:1550-4832
      EISSN:1550-4840
      DOI:10.1145/2917757
      • Editor:
      • Yuan Xie
      Issue’s Table of Contents
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 16 June 2016
      Accepted: 01 September 2015
      Revised: 01 July 2015
      Received: 01 December 2014
      Published in JETC Volume 13, Issue 1

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      Author Tags

      1. Hardware security
      2. NoC
      3. anomaly detection
      4. machine learning
      5. many-core

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      • Defense Advanced Research Projects Agency (DARPA)

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      • (2024)A Machine Learning Approach for Traffic Anomaly Detection in NoC-based Manycores2024 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI)10.1109/SBCCI62366.2024.10703991(1-5)Online publication date: 2-Sep-2024
      • (2024)Detection of Hardware Attacks in Network on Chip Based on Machine Learning2024 IEEE 7th International Conference on Electronic Information and Communication Technology (ICEICT)10.1109/ICEICT61637.2024.10671248(440-445)Online publication date: 31-Jul-2024
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      • (2022)Hardware-Assisted Machine Learning in Resource-Constrained IoT Environments for Security: Review and Future ProspectiveIEEE Access10.1109/ACCESS.2022.317904710(58603-58622)Online publication date: 2022
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