FPGA-Accelerated Optimistic Concurrency Control for Transactional Memory
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- FPGA-Accelerated Optimistic Concurrency Control for Transactional Memory
Recommendations
Relaxed Concurrency Control in Software Transactional Memory
Some of today's TM systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict occurs. 2PL is a simple algorithm that provides fast transactional operations. However, it limits concurrency in benchmarks with ...
Applying transactional memory to concurrency bugs
ASPLOS XVII: Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating SystemsMultithreaded programs often suffer from synchronization bugs such as atomicity violations and deadlocks. These bugs arise from complicated locking strategies and ad hoc synchronization methods to avoid the use of locks. A survey of the bug databases of ...
Applying transactional memory to concurrency bugs
ASPLOS '12Multithreaded programs often suffer from synchronization bugs such as atomicity violations and deadlocks. These bugs arise from complicated locking strategies and ad hoc synchronization methods to avoid the use of locks. A survey of the bug databases of ...
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- National Natural Science Foundation of China
- National Science and Technology Major Project of the Ministry of Science and Technology of China
- National Key R&D Program of China
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