Precise Cache Profiling for Studying Radiation Effects
Authors: 
James Marshall, Robert Gifford, Gedare Bloom, Gabriel Parmer, Rahul SimhaAuthors Info & Claims
James Marshall, Robert Gifford, Gedare Bloom, Gabriel Parmer, Rahul SimhaAuthors Info & ClaimsArticle No.: 25, Pages 1 - 25
Abstract
Increased access to space has led to an increase in the usage of commodity processors in radiation environments. These processors are vulnerable to transient faults such as single event upsets that may cause bit-flips in processor components. Caches in particular are vulnerable due to their relatively large area, yet are often omitted from fault injection testing because many processors do not provide direct access to cache contents and they are often not fully modeled by simulators. The performance benefits of caches make disabling them undesirable, and the presence of error correcting codes is insufficient to correct for increasingly common multiple bit upsets.
This work explores building a program’s cache profile by collecting cache usage information at an instruction granularity via commonly available on-chip debugging interfaces. The profile provides a tighter bound than cache utilization for cache vulnerability estimates (50% for several benchmarks). This can be applied to reduce the number of fault injections required to characterize behavior by at least two-thirds for the benchmarks we examine. The profile enables future work in hardware fault injection for caches that avoids the biases of existing techniques.
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Index Terms
- Precise Cache Profiling for Studying Radiation Effects
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May 2021
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Publication History
Published: 27 March 2021
Accepted: 01 December 2020
Revised: 01 September 2020
Received: 01 February 2020
Published in TECS Volume 20, Issue 3
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