We have investigated the dynamics of hard intrinsic dielectric breakdown of gate oxide layers wit... more We have investigated the dynamics of hard intrinsic dielectric breakdown of gate oxide layers with thickness between 35 and 5.6 nm in n+ polycrystalline Si-SiO2-Si metal/oxide/semiconductor capacitors after constant voltage Fowler-Nordheim stress. The buildup of defects in the oxide during the degradation phase was monitored by quasi static C-V measurements. The dynamics of the final breakdown event was followed with high time resolution, allowing to measure voltage, current, and power versus time during the breakdown transient. Transmission electron microscopy data quantifying the damage produced during this transient are reported. Finally, we propose a phenomenological model concerning the dynamics of breakdown with model parameters adjusted on the basis of the experimental data.
In this paper, we report the dc and noise properties of the gate current in epitaxial Ge p-channe... more In this paper, we report the dc and noise properties of the gate current in epitaxial Ge p-channel metal oxide field effect transistors (pMOSFETs) with a Si passivated surface. The gate stack consists of HfO2/SiO2 dielectric with TiN /TaN metal gate. The observed temperature dependence of the gate current indicates that the dominant charge transport mechanism through the gate dielectric consists of Poole-Frenkel conduction. Gate current 1/f noise is more than two orders higher in the case of Ge pMOSFETs when compared to reference Si pMOSFETs. Ge outdiffusion into the gate oxide is the suspected cause for the enhanced Poole-Frenkel conduction and the high gate current 1/f noise in Ge pMOSFETs.
In this paper we critically review and compare experimental methods, based on the Lundstrom model... more In this paper we critically review and compare experimental methods, based on the Lundstrom model, to extract the channel backscattering ratio in nano MOSFETs. Basically two experimental methods are currently used, the most common of them is based on the measurement of the saturation drain current at different temperatures. We show that this method is affected by very poor assumptions and that the extracted backscattering ratio strongly underestimates its actual value posing particular attention to the backscattering actually extracted in nano devices. The second method is based on the direct measurement of the inversion charge by CV characteristics and gets closer to the physics of the backscattering model. We show, through measurements in high mobility p-germanium devices, how the temperature based method gives the same result of the CV based method once that its approximations are removed. Moreover we show that the CV based method uses a number of approximations which are partially inconsistent with the model. In particular we show, with the aid of 2D quantum corrected device simulations, that the value of the barrier lowering obtained through the CV based method is totally inconsistent with the barrier lowering used to correct the inversion charge and that the extracted saturation inversion charge is underestimated.
ABSTRACT The on-off fluctuations of the tunnel current in thin oxide MOS structures before breakd... more ABSTRACT The on-off fluctuations of the tunnel current in thin oxide MOS structures before breakdown is a well known phenomenon since 1985. Notwithstanding this, most of the models proposed in the last years to justify the failure of the structure ignore this phenomenon. The physical mechanism responsible for it is not completely clear, even if some possible explanations have been proposed. Some new results, obtained by using a novel characterization tool, are presented in this paper. These results could open new perspectives in the comprehension of the final stage of time dependent breakdown of thin oxides. .
The impact of a submonolayer of HfO2 sandwiched between the SiON gate dielectric and the polycrys... more The impact of a submonolayer of HfO2 sandwiched between the SiON gate dielectric and the polycrystalline silicon layer on the low frequency noise of a n-channel metal oxide semiconductor field effect transistor is investigated. Fermi-level pinning at polycrystalline silicon-HfO2 interface acts as a dramatic source of the drain noise due to charge carrier number fluctuations, and of the gate noise due to work function fluctuations. These 1/f noise measurements are a strong indicator that the defects at the top HfO2/polycrystalline silicon interface, rather than bulk defects in the high-k layer, are responsible for the noise degradation observed in HfO2 gate dielectrics.
We have compared the thermal damage in ultrathin gate SiO2 layers of 5.6 and 3 nm thickness after... more We have compared the thermal damage in ultrathin gate SiO2 layers of 5.6 and 3 nm thickness after intrinsic dielectric breakdown due to constant voltage Fowler-Nordheim stress. The power dissipated through the metal-oxide-semiconductor capacitor during the breakdown transient, measured with high time resolution, strongly decreases with oxide thickness. This is reflected in a noticeable reduction of the thermal damage found in the structure after breakdown. The effect can be explained as the consequence of the lower amount of defects present in the oxide at the breakdown instant and of the occurrence of a softer breakdown in the initial spot. The present data allow us to estimate the power threshold at the boundary between soft and hard breakdown, and they are compared to numerical simulations of heat flow.
We have investigated the dynamics of hard intrinsic dielectric breakdown of gate oxide layers wit... more We have investigated the dynamics of hard intrinsic dielectric breakdown of gate oxide layers with thickness between 35 and 5.6 nm in n+ polycrystalline Si-SiO2-Si metal/oxide/semiconductor capacitors after constant voltage Fowler-Nordheim stress. The buildup of defects in the oxide during the degradation phase was monitored by quasi static C-V measurements. The dynamics of the final breakdown event was followed with high time resolution, allowing to measure voltage, current, and power versus time during the breakdown transient. Transmission electron microscopy data quantifying the damage produced during this transient are reported. Finally, we propose a phenomenological model concerning the dynamics of breakdown with model parameters adjusted on the basis of the experimental data.
In this paper, we report the dc and noise properties of the gate current in epitaxial Ge p-channe... more In this paper, we report the dc and noise properties of the gate current in epitaxial Ge p-channel metal oxide field effect transistors (pMOSFETs) with a Si passivated surface. The gate stack consists of HfO2/SiO2 dielectric with TiN /TaN metal gate. The observed temperature dependence of the gate current indicates that the dominant charge transport mechanism through the gate dielectric consists of Poole-Frenkel conduction. Gate current 1/f noise is more than two orders higher in the case of Ge pMOSFETs when compared to reference Si pMOSFETs. Ge outdiffusion into the gate oxide is the suspected cause for the enhanced Poole-Frenkel conduction and the high gate current 1/f noise in Ge pMOSFETs.
In this paper we critically review and compare experimental methods, based on the Lundstrom model... more In this paper we critically review and compare experimental methods, based on the Lundstrom model, to extract the channel backscattering ratio in nano MOSFETs. Basically two experimental methods are currently used, the most common of them is based on the measurement of the saturation drain current at different temperatures. We show that this method is affected by very poor assumptions and that the extracted backscattering ratio strongly underestimates its actual value posing particular attention to the backscattering actually extracted in nano devices. The second method is based on the direct measurement of the inversion charge by CV characteristics and gets closer to the physics of the backscattering model. We show, through measurements in high mobility p-germanium devices, how the temperature based method gives the same result of the CV based method once that its approximations are removed. Moreover we show that the CV based method uses a number of approximations which are partially inconsistent with the model. In particular we show, with the aid of 2D quantum corrected device simulations, that the value of the barrier lowering obtained through the CV based method is totally inconsistent with the barrier lowering used to correct the inversion charge and that the extracted saturation inversion charge is underestimated.
ABSTRACT The on-off fluctuations of the tunnel current in thin oxide MOS structures before breakd... more ABSTRACT The on-off fluctuations of the tunnel current in thin oxide MOS structures before breakdown is a well known phenomenon since 1985. Notwithstanding this, most of the models proposed in the last years to justify the failure of the structure ignore this phenomenon. The physical mechanism responsible for it is not completely clear, even if some possible explanations have been proposed. Some new results, obtained by using a novel characterization tool, are presented in this paper. These results could open new perspectives in the comprehension of the final stage of time dependent breakdown of thin oxides. .
The impact of a submonolayer of HfO2 sandwiched between the SiON gate dielectric and the polycrys... more The impact of a submonolayer of HfO2 sandwiched between the SiON gate dielectric and the polycrystalline silicon layer on the low frequency noise of a n-channel metal oxide semiconductor field effect transistor is investigated. Fermi-level pinning at polycrystalline silicon-HfO2 interface acts as a dramatic source of the drain noise due to charge carrier number fluctuations, and of the gate noise due to work function fluctuations. These 1/f noise measurements are a strong indicator that the defects at the top HfO2/polycrystalline silicon interface, rather than bulk defects in the high-k layer, are responsible for the noise degradation observed in HfO2 gate dielectrics.
We have compared the thermal damage in ultrathin gate SiO2 layers of 5.6 and 3 nm thickness after... more We have compared the thermal damage in ultrathin gate SiO2 layers of 5.6 and 3 nm thickness after intrinsic dielectric breakdown due to constant voltage Fowler-Nordheim stress. The power dissipated through the metal-oxide-semiconductor capacitor during the breakdown transient, measured with high time resolution, strongly decreases with oxide thickness. This is reflected in a noticeable reduction of the thermal damage found in the structure after breakdown. The effect can be explained as the consequence of the lower amount of defects present in the oxide at the breakdown instant and of the occurrence of a softer breakdown in the initial spot. The present data allow us to estimate the power threshold at the boundary between soft and hard breakdown, and they are compared to numerical simulations of heat flow.
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Papers by Felice Crupi