Decimal data processing applications have grown exponentially in recent years thereby increasing the need to have hardware support for decimal arithmetic. In this paper, an improved architecture for efficient Binary Coded Decimal (BCD)... more
Decimal data processing applications have grown exponentially in recent years thereby increasing the need to have hardware support for decimal arithmetic. In this paper, an improved architecture for efficient Binary Coded Decimal (BCD) addition/subtraction is presented that performs binary addition/subtraction without any extra hardware. The architecture works for both signed and unsigned numbers. The design is runtime reconfigurable and maximum utilization of the hardware is a feature of the architecture. Simulation results show that the proposed architecture is at least 32% better in terms of power-delay product than the existing designs.
Bietti crystalline dystrophy is a mixed dystrophy characterized by the presence of multiple, small refractive crystals situated in the retina, the choroid, the corneal limbus and in the lymphocytes. The disease is bilateral, progressive... more
Bietti crystalline dystrophy is a mixed dystrophy characterized by the presence of multiple, small refractive crystals situated in the retina, the choroid, the corneal limbus and in the lymphocytes. The disease is bilateral, progressive and results in chorioretinal atrophy of the posterior pole of the ocular fundus. The disease is inherited in an autosomal recessive way but its expression may vary widely from family to family. It is likely that not all cases are diagnosed. The disease is usually diagnosed in the second decade, but in the literature cases are described before the age of 10 years and after 55 years. BCD is most frequent in Chinese, Japanese and Italian populations, although it has also been identified around the world. A recent European study shows that BCD is rarely diagnosed as it represents only 3 % of non syndromic RP cases observed in a large ophthalmological centre.
Cet article ne peut en aucun cas remplacer les informations données par une consultation chez un médecin spécialiste. Certains points peuvent en effet paraître obscurs au grand public ou être mal compris. Chaque patient étant un cas particulier nous recommandons aux patients qui présenteraient cette affection de s’adresser à leur médecin spécialiste qui seul peut établir un diagnostic et expliquer la maladie, sa forme et son évolution.
Decimal data processing applications have grown exponentially in recent years thereby increasing the need to have hardware support for decimal arithmetic. In this paper, an improved architecture for efficient Binary Coded Decimal (BCD)... more
Decimal data processing applications have grown exponentially in recent years thereby increasing the need to have hardware support for decimal arithmetic. In this paper, an improved architecture for efficient Binary Coded Decimal (BCD) addition/subtraction is presented that performs binary addition/subtraction without any extra hardware. The architecture works for both signed and unsigned numbers. The design is runtime reconfigurable and maximum utilization of the hardware is a feature of the architecture. Simulation results show that the proposed architecture is at least 32% better in terms of power-delay product than the existing designs.
Purpose Zaleplon (ZPN) is a GABA-A modulating hypnotic drug used in the treatment of Insomnia with potent anticonvulsant activity against pentylenetetrazole and electroshock induced convulsions. Following oral administration, the systemic... more
Purpose Zaleplon (ZPN) is a GABA-A modulating hypnotic drug used in the treatment of Insomnia with potent anticonvulsant activity against pentylenetetrazole and electroshock induced convulsions. Following oral administration, the systemic bioavailability is highly limited owing to its poor aqueous solubility. The objective of this project was to evaluate the ability of native and modified betacyclodextrins to enhance Zaleplon solubility. Methods Phase solubility studies (Higuchi and Connors method) using native β-cyclodextrin (βCD,Kleptose®) and three of its derivatives,a hydroxypropyl-β-cyclodextrins (HPβCD, with a molar degree of substitution of (Kleptose® HPB, with MS=0.62) a methylated β-cyclodextrin (MCD Crysmeb, with MS=0.57) and a Sulfo Butyl Ether betacyclodextrin (SBE) were conducted, with Zaleplon as a BCS class II model drug. Complexation efficiency (CE) and Stability constants (K 1:1) were calculated using phase solubility studies curves. For cyclodextrin: Zaleplon complexes stability evaluation, aliquots of each phase solubility sample (liquid or lyophilized) were placed in stability chambers at 25 o C and 40 o C for 0, 30 and 60 days. Results The phase solubility studies of all modified cyclodextrins showed an increase in drug solubility with increase in cyclodextrin concentration resulting an A L type solubility curve. Zaleplon water solubility was 0.16 mg/mL and the ranking of its solubility increase in cyclodextrins is as follows: Crysmeb (~9 times)> HPCD (~5 times) >BCD (~3 times) >SBE (~3 times) > control (drug in water). The drug content ratio of day 60 to day 1 for Crysmeb and HPBCD solutions stored at 25 o C/60% RH was 98.2% and 93.9% respectively. The stability studies were also carried out under accelerated conditions at 40 o C/75% RH and the drug content ratio of day 60 to day 1 for Crysmeb and HPBCD was 96.5% and 87.5%, respectively. Lyophilized samples were analyzed by DSC to prove the Zaleplon: CDs complex formation. Conclusion The modified beta cyclodextrins phase solubility studies exhibited an A L type solubilization curve and proved Zaleplon's solubility enhancement compared to the control. BCD solubilization potential is equal to SBE but is lower then HPβCD and Crysmeb. Both HPβCD and Crysmeb are very good options for improving Zaleplon oral bioavailability by enhancing its solubility.
Decimal data processing applications have grown exponentially in recent years thereby increasing the need to have hardware support for decimal arithmetic. In this paper, an improved architecture for efficient Binary Coded Decimal (BCD)... more
Decimal data processing applications have grown exponentially in recent years thereby increasing the need to have hardware support for decimal arithmetic. In this paper, an improved architecture for efficient Binary Coded Decimal (BCD) addition/subtraction is presented that performs binary addition/subtraction without any extra hardware. The architecture works for both signed and unsigned numbers. The design is runtime reconfigurable and maximum utilization of the hardware is a feature of the architecture. Simulation results show that the proposed architecture is at least 32% better in terms of power-delay product than the existing designs.
National security problem raises with major threats i.e. illegal activities at border areas and few others are examples of those. Even if government provides bullet proof jackets and high quality guns to our armed forces, yet it is hard... more
National security problem raises with major threats i.e. illegal activities at border areas and few others are examples of those. Even if government provides bullet proof jackets and high quality guns to our armed forces, yet it is hard to resolve such issues. In such operations when forces are not able to push their strength beyond human efforts, we can implement Artificial Intelligence based machines to put into action. In this paper, it is described that a machine will identify the region of my country, other country and display on LCD. And it takes appropriate action according to valid region. Also, this system check the id for valid person and take an appropriate action for invalid persons such as operate the laser shooter that identifies the suspected person and display all conditions in LCD at border. This system checks the force member id wirelessly.
Decimal data processing applications have grown exponentially in recent years thereby increasing the need to have hardware support for decimal arithmetic. In this paper, an improved architecture for efficient Binary Coded Decimal (BCD)... more
Decimal data processing applications have grown exponentially in recent years thereby increasing the need to have hardware support for decimal arithmetic. In this paper, an improved architecture for efficient Binary Coded Decimal (BCD) addition/subtraction is presented that performs binary addition/subtraction without any extra hardware. The architecture works for both signed and unsigned numbers. The design is runtime reconfigurable and maximum utilization of the hardware is a feature of the architecture. Simulation results show that the proposed architecture is at least 32% better in terms of power-delay product than the existing designs.
Decimal data processing applications have grown exponentially in recent years thereby increasing the need to have hardware support for decimal arithmetic. Binary to BCD conversion forms the basic building block of decimal digit... more
Decimal data processing applications have grown exponentially in recent years thereby increasing the need to have hardware support for decimal arithmetic. Binary to BCD conversion forms the basic building block of decimal digit multipliers. This paper presents novel high speed low power architecture for fixed bit binary to BCD conversion which is at least 28% better in terms of power-delay product than the existing designs.
