Plasma Etching

The well-acknowledged etch profile drift problem in chip production was investigated with a more accurate means of measuring actual etch thickness to monitor and correct this drift. Using a high-aspect ratio, 0.1m -Si gate structure, the investigation was specifically focused on the control of transition timing in the critical interval from main etch (ME) to over etch (OE). This required reliable endpoint detection of -Si which was achieved through the development of a method employing a Kalman–Bucy filter with a real-time spectroscopic ellipsometer (RTSE). The robustness of our endpoint detection technique was tested and demonstrated under the actual physical and chemical disturbance environments of the etching process. Application of this endpoint detection technique to the etch of a 0.1-m patterned -Si gate also achieved a significant improvement on the etch profile repeatability.

Thick polymer dielectric films are highly sought after in emerging applications such as the integration of passive components directly over silicon wafers and the packaging of compound semiconductor, SiGe or Si devices via flip chip bonding. The dielectric materials employed in this hybrid integration range in thickness from a few of microns up to tens of microns. One of the challenges for this type of packaging scheme is plasma etching of the thick polymer film with commercially acceptable equipment and high etch rates. In this paper, we present results of a preliminary study of plasma etching thick BCB polymer films using a diode plasma etch system, with an emphasis on the etch rate of BCB etch as a function of gas mixture chemistry, RF power and pressure. Through this study we were able to find an etch process window which resulted in fairly high etch rates free of post-etch residues with the sloped etch profile which is desired for this hybrid integration or packaging.

Plasma processes can present difficult control challenges due to time-varying dynamics and a lack of relevant and/or regular measurements. Virtual metrology (VM) is the use of mathematical models with accessible measurements from an operating process to estimate variables of interest. This thesis addresses the challenge of virtual metrology for plasma processes, with a particular focus on semiconductor plasma etch. Introductory material covering the essentials of plasma physics, plasma etching, plasma measurement techniques, and black-box modelling techniques is first presented for readers not familiar with these subjects. A comprehensive literature review is then completed to detail the state of the art in modelling and VM research for plasma etch processes.

To demonstrate the versatility of VM, a temperature monitoring system utilising a state-space model and Luenberger observer is designed for the variable specific impulse magnetoplasma rocket (VASIMR) engine, a plasma-based space propulsion system. The temperature monitoring system uses optical emission spectroscopy (OES) measurements from the VASIMR engine plasma to correct temperature estimates in the presence of
modelling error and inaccurate initial conditions. Temperature estimates within 2% of the real values are achieved using this scheme.

An extensive examination of the implementation of a wafer-to-wafer VM scheme to estimate plasma etch rate for an industrial plasma etch process is presented. The VM models estimate etch rate using measurements from the processing tool and a plasma impedance monitor (PIM). A selection of modelling techniques are considered for VM modelling, and Gaussian process regression (GPR) is applied for the first time for VM
of plasma etch rate. Models with global and local scope are compared, and modelling schemes that attempt to cater for the etch process dynamics are proposed. GPR-based windowed models produce the most accurate estimates, achieving mean absolute percentage errors (MAPEs) of approximately 1.15%. The consistency of the results presented suggests that this level of accuracy represents the best accuracy achievable for
the plasma etch system at the current frequency of metrology.

Finally, a real-time VM and model predictive control (MPC) scheme for control of plasma electron density in an industrial etch chamber is designed and tested. The VM scheme uses PIM measurements to estimate electron density in real time. A predictive functional control (PFC) scheme is implemented to cater for a time delay in the VM system. The controller achieves time constants of less than one second, no overshoot, and excellent disturbance rejection properties. The PFC scheme is further expanded by adapting the internal model in the controller in real time in response to changes in the process operating point.

Two of the key challenges in the realisation of focal plane arrays based on type-II InAs/GaSb superlattices (T2SL) are the difficulty in achieving a good sidewall profile and the increased dominance of surface leakage current as the device dimensions shrink. We report the electrical and morphological results of test pixels for mid-wave infrared T2SL photodiodes etched using a Cl2/Ar based inductively coupled plasma reactive ion etching (ICP-RIE) process and passivated using SU-8 epoxy photoresist. The etch rate and sidewall surface morphology of GaSb, InAs, and InAs/GaSb T2SL materials are compared after dry etching under the same conditions, leading to the determination of an optimal etch rate. The effect of surface treatment using selected wet chemical etchants before passivation on the surface leakage current is presented. Limitations of the dry etching recipe and further improvement of the sidewall verticality and smoothness are also discussed. Good sidewall profiles and bulk-limited dark currents are demonstrated for T2SL photodiodes etched to depths between 1.5 and 3.5 μm with a pitch size down to 12 μm.

An intensive study has been performed to understand and tune deep reactive ion etch (DRIE) processes for optimum results with respect to the silicon etch rate, etch profile and mask etch selectivity (in order of priority) using state-of-the-art dual power source DRIE equipment. The research compares pulsed-mode DRIE processes (e.g. Bosch technique) and mixed-mode DRIE processes (e.g. cryostat technique). In both techniques, an inhibitor is added to fluorine-based plasma to achieve directional etching, which is formed out of an oxide-forming (O2) or a fluorocarbon (FC) gas (C4F8 or CHF3). The inhibitor can be introduced together with the etch gas, which is named a mixed-mode DRIE process, or the inhibitor can be added in a time-multiplexed manner, which will be termed a pulsed-mode DRIE process. Next, the most convenient mode of operation found in this study is highlighted including some remarks to ensure proper etching (i.e. step synchronization in pulsed-mode operation and heat control of the wafer). First of all, for the fabrication of directional profiles, pulsed-mode DRIE is far easier to handle, is more robust with respect to the pattern layout and has the potential of achieving much higher mask etch selectivity, whereas in a mixed-mode the etch rate is higher and sidewall scalloping is prohibited. It is found that both pulsed-mode CHF3 and C4F8 are perfectly suited to perform high speed directional etching, although they have the drawback of leaving the FC residue at the sidewalls of etched structures. They show an identical result when the flow of CHF3 is roughly 30 times the flow of C4F8, and the amount of gas needed for a comparable result decreases rapidly while lowering the temperature from room down to cryogenic (and increasing the etch rate). Moreover, lowering the temperature lowers the mask erosion rate substantially (and so the mask selectivity improves). The pulsed-mode O2 is FC-free but shows only tolerable anisotropic results at -120 °C. The downside of needing liquid nitrogen to perform cryogenic etching can be improved by using a new approach in which both the pulsed and mixed modes are combined into the so-called puffed mode. Alternatively, the use of tetra-ethyl-ortho-silicate (TEOS) as a silicon oxide precursor is proposed to enable sufficient inhibiting strength and improved profile control up to room temperature. Pulsed-mode processing, the second important aspect, is commonly performed in a cycle using two separate steps: etch and deposition. Sometimes, a three-step cycle is adopted using a separate step to clean the bottom of etching features. This study highlights an issue, known by the authors but not discussed before in the literature: the need for proper synchronization between gas and bias pulses to explore the benefit of three steps. The transport of gas from the mass flow controller towards the wafer takes time, whereas the application of bias to the wafer is relatively instantaneous. This delay causes a problem with respect to synchronization when decreasing the step time towards a value close to the gas residence time. It is proposed to upgrade the software with a delay time module for the bias pulses to be in pace with the gas pulses. If properly designed, the delay module makes it possible to switch on the bias exactly during the arrival of the gas for the bottom removal step and so it will minimize the ionic impact because now etch and deposition steps can be performed virtually without bias. This will increase the mask etch selectivity and lower the heat impact significantly. Moreover, the extra bottom removal step can be performed at (also synchronized!) low pressure and therefore opens a window for improved aspect ratios. The temperature control of the wafer, a third aspect of this study, at a higher etch rate and longer etch time, needs critical attention, because it drastically limits the DRIE performance. It is stressed that the exothermic reaction (high silicon loading) and ionic impact (due to metallic masks and/or exposed silicon) are the main sources of heat that might raise the wafer temperature uncontrollably, and they show the weakness of the helium backside technique using mechanical clamping. Electrostatic clamping, an alternative technique, should minimize this problem because it is less susceptible to heat transfer when its thermal resistance and the gap of the helium backside cavity are minimized; however, it is not a subject of the current study. Because oxygen-growth-based etch processes (due to their ultra thin inhibiting layer) rely more heavily on a constant wafer temperature than fluorocarbon-based processes, oxygen etches are more affected by temperature fluctuations and drifts during the etching. The fourth outcome of this review is a phenomenological model, which explains and predicts many features with respect to loading, flow and pressure behaviour in DRIE equipment including a diffusion zone. The model is a reshape of the flow model constructed by Mogab, who studied the loading effect in plasma etching. Despite the downside of needing a cryostat, it is shown that—when selecting proper conditions—a cryogenic two-step pulsed mode can be used as a successful technique to achieve high speed and selective plasma etching with an etch rate around 25 µm min-1 (<1% silicon load) with nearly vertical walls and resist etch selectivity beyond 1000. With the model in hand, it can be predicted that the etch rate can be doubled (50 µm min-1 at an efficiency of 33% for the fluorine generation from the SF6 feed gas) by minimizing the time the free radicals need to pass the diffusion zone. It is anticipated that this residence time can be reduced sufficiently by a proper inductive coupled plasma (ICP) source design (e.g. plasma shower head and concentrator). In order to preserve the correct profile at such high etch rates, the pressure during the bottom removal step should be minimized and, therefore, the synchronized three-step pulsed mode is believed to be essential to reach such high etch rates with sufficient profile control. In order to improve the etch rate even further, the ICP power should be enhanced; the upgrading of the turbopump seems not yet to be relevant because the throttle valve in the current study had to be used to restrict the turbo efficiency. In order to have a versatile list of state-of-the-art references, it has been decided to arrange it in subjects. The categories concerning plasma physics and applications are, for example, books, reviews, general topics, fluorine-based plasmas, plasma mixtures with oxygen at room temperature, wafer heat transfer and high aspect ratio trench (HART) etching. For readers 'new' to this field, it is advisable to study at least one (but rather more than one) of the reviews concerning plasma as found in the first 30 references. In many cases, a paper can be classified into more than one category. In such cases, the paper is directed to the subject most suited for the discussion of the current review. For example, many papers on heat transfer also treat cryogenic conditions and all the references dealing with highly anisotropic behaviour have been directed to the category HARTs. Additional pointers could get around this problem but have the disadvantage of creating a kind of written spaghetti. I hope that the adapted organization structure will help to have a quick look at and understanding of current developments in high aspect ratio plasma etching. Enjoy reading... Henri Jansen 18 June 2008

We investigate the effect of process-induced damage (PID) caused by reactive ion etching using methanol (Me–OH) gas on the magnetic properties of the CoFeB free layer in a magnetic tunnel junction with a perpendicular easy axis (p-MTJ), and on the tunnel magnetoresistance
(TMR) ratio of CoFeB–MgO p-MTJs. The dot pattern of the MTJ stack with size varied from 65 to 430nm etched by the Me–OH plasma showed a smaller coercivity (Hc) than that fabricated by Ar ion milling. The increase in Hc was observed in the dot pattern of large size (430nm) upon increasing He/H2 plasma treatment temperature after the Me–OH etching. A possible origin of the increase in Hc is the increase in nucleation field after He/H2 treatment. This suggests that Hc of the large dot pattern has the potential to be an index for detecting PID during the MTJ fabrication process. The TMR ratio of CoFeB–MgO p-MTJ deteriorated after the Me–OH plasma etching. This PID was considered to be due to oxidation from the pattern edge of the CoFeB free layer of the MTJ. The recovery process by the He/H2 plasma treatment was examined just after the Me–OH etching to reduce the oxidized part. The median TMR ratio of 102%, which is 5% higher than that of the sample without the He/H2 treatment, was observed after applying this reductive treatment at 180 °C. In addition, the recovery process had scalability with MTJ size, as the effect was observed more clearly in the MTJ smaller than 97 nm.