This paper presents the feasibility challenges of designing dc-dc buck and boost converter in nano-scale. With the gradual development of VLSI design platforms, new issues have been introduced and presented to the power electronics... more
This paper presents the feasibility challenges of designing dc-dc buck and boost converter in nano-scale. With the gradual development of VLSI design platforms, new issues have been introduced and presented to the power electronics circuit experts and VLSI engineers. Today's VLSI industry has reached the technology well within the nano-meter range. The consequence of implementing the basic power electronics converter topology such as buck and boost converter into this technology is discussed in this paper. It also covers the optimization issues between conduction modes, switching frequencies, efficiency and chip area. Fabrication issues are discussed, with the limitations of use of elements such as inductor, capacitors and resistors. Tradeoffs between chip area and performance are highlighted. Design challenge for optimum switching frequency, off the chip capacitor, and strategies to minimize switching and conduction losses are also discussed
This paper presents the feasibility challenges of designing dc-dc buck and boost converter in nano-scale. With the gradual development of VLSI design platforms, new issues have been introduced and presented to the power electronics... more
This paper presents the feasibility challenges of designing dc-dc buck and boost converter in nano-scale. With the gradual development of VLSI design platforms, new issues have been introduced and presented to the power electronics circuit experts and VLSI engineers. Today's VLSI industry has reached the technology well within the nano-meter range. The consequence of implementing the basic power electronics converter topology such as buck and boost converter into this technology is discussed in this paper. It also covers the optimization issues between conduction modes, switching frequencies, efficiency and chip area. Fabrication issues are discussed, with the limitations of use of elements such as inductor, capacitors and resistors. Tradeoffs between chip area and performance are highlighted. Design challenge for optimum switching frequency, off the chip capacitor, and strategies to minimize switching and conduction losses are also discussed.
The purpose of this paper is to introduce the status of wave energy conversion (WEC) technologies from a different perspective. Past studies based on WEC systems are summarized and classified in terms of WEC system components to clearly... more
The purpose of this paper is to introduce the status of wave energy conversion (WEC) technologies from a different perspective. Past studies based on WEC systems are summarized and classified in terms of WEC system components to clearly reveal the performance, efficiency and development of WEC technologies over the last two decades. It has been proved that the individual components of a WEC system, such as types of wave energy converter and generator motion, control methods and power electronic converter, have a close relationship with each other and that no single component can be optimized without considering the others. It can be helpful to divide into descriptive parts to provide a better understanding of the development process for WEC technologies so that studies based on WEC technologies are discussed by regarding types of wave energy converters, generators, control methods, controller applied sides, waves, power electronic converters and validations and publication year in this paper.
