Schematic Diagram VC-910
Schematic Diagram VC-910
Schematic Diagram VC-910
C Notes: C
1.Assembly Note (See comments in every schematics page, and also see the
implementation field for each component)
B B
TECOBEST TECHNOLOGY
A
TB_V862 A
Title
Version Document
Size Document Number Rev
V1.2
Date: Saturday, May 28, 2005 Sheet 1 of 6
5 4 3 2 1
Notes:
1. Pin105 to pin203 of ZR36862/8 is 5V & 3.3V tolerant both.
2. ZR36868 is used for 6 or 8 CH audio out application.
ZR36862 is used for 2 CH audio out application, and pin111/112 could be used as GPCIO.
SPDL_SENS+
SPDL_SENS-
MD_DVD
DVD_LD
MD_CD
CD_LD
RFD
RFC
RFE
RFB
RFA
RFF
VC
R102 FB101 220Z
TRACK_S R128 51K 0R DSPVCC33
TRACK_S
SLED_S SLED_S R105 30K SLED_PWM R115 100K
D SPINDLE_S SPINDLE_S R104 15K SPINDLE_PWM + D
FOCUS_S FOCUS_S R127 43K FOCUS_PWM R101 C121 C122
[51K] 20K 1% 0.1uF 100uF/16V C113 L102
C103 VDDAFE
0.1uF
C104 C105 C101 C102 NM NM
HOMESW
1nF 1nF 27nF 22nF [220pF] [2.7uH] R113
VDDPWM FB102 220Z C114 OSCIN
CLOSE
OPEN
22pF
CD/DVD
OUTSW
75R
DRVSB
INSW
TP1 DUPRD0 +
RD0
for DOWN_LOAD TP1 DUPTD0 1nF C110 C119 C120 Y101 R112
TD0 VDDPWM
0.1uF 220uF/10V 27.000MHz 220K
CLOSE
TP1 DUPRD1 Assemble C113&L102
OPEN
RD1
RFD
RFC
RFB
RFA
TP1 DUPTD1
TD1 when Y101 assemble
CD/DVD
1nF C109
OUTSW
DRVSB
RF
RFINN
Third overtone Crystal
RFINP
IRRCV
INSW
for HYPER_TERMINAL IRRCV
FPC_CLK R129
FPC_CLK FPC_DOUT 75R
FPC_DOUT
DSPVCC18
VDDDAC FB106 220Z C115
DSPVCC33 DSPVCC33
OSCOUT
22pF
+ C124
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
C123 100uF/16V 1 PH1
.
U101A 0.1uF
VDDPWM
GNDPWM
AGNDREF
RESOUT
F
GPCIO[47]/SSCCLK
IDGPCIO[7]/SPINDLEPULSE
IDGPCIO[6]/SLEDPULSE
VDD-IP
GNDP
VDDP
VBGAP
K
E
RFP
GPCIO[16]/SSCTXD
GNDC
VDDC
DVD_LD
CD_LD
DVD_MD
CD_MD
VC
AGND
D
H
C
AVDD
SVDD
RFN
J
G
GPCIO[38]/DUPTD1
GPCIO[37]/DUPRD1
GPCIO[36]/DUPTD0
GPCIO[35]/DUPRD0
GPCIO[41]/PWMCO[0]
IDGPCIO[4]/PWMCO[6]
GPCIO[46]/PWMCO[5]
GPCIO[45]/PWMCO[4]
GPCIO[44]/PWMCO[3]
GPCIO[43]/PWMCO[2]
ICGPCIO[7]
ICGPCIO[6]
IDGPCIO[3]
ICGPCIO[5]
ICGPCIO[4]
GPCIO[32]
AGND1
AVDD1
MARK5
.
Use it to connect the shell of the crystal to ground.
FB103 220Z
DSPVCC18
1
FPC_STB 1 156
FPC_STB SSCRXD/GPCIO[17] GNDDACBS2 R106 392R 1%
2 155
MEMCS#[1]/GPCIO[18] GNDDACP
3 154
MEMAD15 4 VDDP RSET 153
MEMAD16 MEMAD[15] C/B/U C_B_U
5 152
MEMAD14 MEMAD[16] VDDDAC
6 151
MEMAD13 MEMAD[14] Y/R/V Y_R_V
7 150
C MEMAD12 MEMAD[13] CVBS/C CVBS_C C
8 149
MEMDA15 9 MEMAD[12]/PLLCFGA
MEMDA[15]
ZR36862 VDDDAC
CVBS/G/Y
148
CVBS_G_Y
MEMAD11 10 147
MEMDA7 MEMAD[11]/PLLCFGP Y/C DSPVCC33
11 146
MEMDA[7] GNDDACD
12 145
MEMAD10 GNDP GNDDACD OSCIN R111 R110 R109 R108
13 144
MEMDA14 14 MEMAD[10] GCLK 143 OSCOUT VGND 75R 1% 75R 1% 75R 1% 75R 1%
MEMAD9 MEMDA[14] XO VDDA
15 142
MEMDA6 MEMAD[9] VDDA RESET R120
16 141
MEMAD8 MEMDA[6] RESET# 10K
17 140
MEMDA13 MEMAD[8] GNDA C108
18 139 +
MEMDA[13] GNDP
MEMDA5 19 138 10uF/16V VGND
MEMDA[5] VDD RESET
20 137 RESET
MEMAD[20]/GPCIO[19]/MEMCS#[2] IDGPCIO[2]
21 136 R114
3
MEMDA12 VDDP GPCIO[31] 100
22 135
MEMDA[12] DJTCK/ICGPCIO[3]/VID[0]
MEMWR- 23 134 Q101 1
MEMWR- MEMDA4 24 MEMWR# DJTDO/GPCIO[30]/VID[1] 133 MUTEC 9014
2
MEMDA[4] DJTDI/GPCIO[29]/VID[2]
25 132
VDDC DJTMS/GPCIO[28]/VID[3]
2
MEMDA11 26 131 C125 D101 R116
MEMDA3 MEMDA[11] VDDC 0.1uF LL4148 10K
27 130
MEMAD19 MEMDA[3] GNDC FS3
28 129
29 MEMAD[19]/PLLSEL DJTCK2/ICETCK/GPCIO[27]/VID[4] 128 FS2 FS3
MEMDA10 GNDC DJTDO2/ICETDO/IDGPCIO[1]/VID[5] FS1 FS2
1
30 127
MEMAD18 MEMDA[10] DJTDI2/ICETDI/ICGPCIO[2]/VID[6] FS1
31 126
MEMAD[18] DJTMS2/ICETMS/GPCIO[26]/VID[7]
32 125
MEMDA2 GNDP VDDP
33
MEMDA[2] COSYNC/CJTMS/ICGPCIO[1]/VCLKx2
124 TBR Huang fu kuan 2005/05/24
RAMDAT10
RAMDAT12
RAMDAT13
RAMDAT15
RAMADD4
RAMADD6
RAMADD7
RAMADD8
RAMADD9
MEMAD17 34 123
RAMDAT8
RAMDAT9
RAMDQM
RAMDAT11
RAMDAT14
RAMADD5
MEMDA9 MEMAD[17] GNDP HSYNC U102
35 122
MEMAD7 MEMDA[9] CJTDO/GPCIO[25]/HSYNC VSYNC HSYNC
36 121
PCLK
MEMDA1 MEMAD[7] CJTDI/GPCIO[24]/VSYNC VSYNC
37 120
MEMAD6 MEMDA[1] CJTCK/GPCIO[23]/AIN
38 119
MEMDA8 39 MEMAD[6] VDDP-A2 118 IAMCLK R117 33R AMCLK
MEMAD5 MEMDA[8] AMCLK AMCLK
40 117
MEMAD[5] GNDP-A2 IABCLK R118 33R ABCLK
41 116
MEMDA0 VDDP ABCLK R103 33R ALRCLK ABCLK
42 115
MEMDA[15:0] MEMDA[0] ALRCLK ALRCLK
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
MEMAD4 43 114
MEMRD- 44 MEMAD[4] GPAIO 113 IAOUT0 R190 33R AOUT0
MEMRD- MEMAD3 MEMRD# AOUT[0] AOUT0
45 112
UDQM
VSS
CKE
CLK
VSS
NC
NC
VDDQ
VSSQ
VDDQ
VSSQ
A4
A5
A6
A7
A8
A9
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
MEMAD2 MEMAD[3] GPCIO[22]/AOUT[1]
46 111
MEMCS0- MEMAD[2] GPCIO[21]/AOUT[2] SPDIF
47 110
MEMCS0- MEMCS#[0] SPDIF SPDIF
MEMAD1 48 109 SDRAM speed <=7ns
B MEMAD[1]/BOOTSEL2 IDGPCIO[0] B
MEMAD[19:0]
MEMAD0 49
MEMAD[0]/BOOTSEL1 ICGPCIO[0]
108 K4S161622C-TC/L70
50 107
GNDP GNDP
A10/AP
51 106
LDQM
VDDQ
VDDQ
VSSQ
VSSQ
VDD-IP CPUNMI/GPCIO[20]
RAMCS#[0]/RAMBA1
52 105
VDD
VDD
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
RAS
CAS
VDDP VDDP
WE
CS
BA
A3
A2
A1
A0
DSPVCC33
RAMADD[10]
RAMADD[11]
RAMDAT[10]
RAMDAT[11]
RAMDAT[12]
RAMDAT[13]
RAMDAT[14]
RAMDAT[15]
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
RAMADD[4]
RAMADD[3]
RAMADD[5]
RAMADD[2]
RAMADD[6]
RAMADD[1]
RAMADD[7]
RAMADD[0]
RAMADD[8]
RAMADD[9]
RAMCS#[1]
RAMDAT[8]
RAMDAT[7]
RAMDAT[9]
RAMDAT[6]
RAMDAT[5]
RAMDAT[4]
RAMDAT[3]
RAMDAT[2]
RAMDAT[1]
RAMDAT[0]
9
8
7
6
5
4
3
2
1
R122
GNDPCLK
RAMRAS#
RAMCAS#
VDDPCLK
RAMBA[0]
RAMDQM
RAMWE#
NM
[1K] MARK6
GNDC
GNDC
GNDP
GNDP
GNDP
GNDP
GNDP
VDDC
VDDC
VDDP
VDDP
VDDP
VDDP
VDDP
PCLK
RAMADD10
1
RAMADD3
RAMADD1
RAMADD0
RAMDAT7
RAMDAT6
RAMDAT5
RAMDAT3
RAMDAT2
RAMDAT0
RAMDQM
RAMADD2
RAMRAS-
RAMCAS-
RAMDAT4
RAMDAT1
RAMCS0-
RAMWE-
100
101
102
103
104
1
2
RAMBA
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
R125 R126
4.7K 4.7K
JP102
NM
[BOOTSEL1]
DSPVCC33
RAMADD10
RAMDAT10
RAMDAT11
RAMDAT12
RAMDAT13
RAMDAT14
RAMDAT15
RAMADD4
RAMADD3
RAMADD5
RAMADD2
RAMADD1
RAMADD7
RAMADD0
RAMADD8
RAMDAT7
RAMDAT9
RAMDAT6
RAMDAT5
RAMDAT3
RAMDAT2
RAMDAT0
RAMDQM
RAMADD6
RAMADD9
RAMCS0-
RAMDAT8
RAMDAT4
RAMDAT1
R123
PCLK
56R
C106
NM
[5pF]
DSPVCC33 DSPVCC33
A C130 C131 C133 C134 C135 C136 C137 C138 C139 C140 A
10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF
PCB layout guy: please put these bypass capacitors close to main chip
DSPVCC18
DSPVCC18
TECOBEST TECHNOLOGY
C146 C147 C148 C149
10nF 10nF 10nF 10nF
TB_V862
Title
ZR36862 & SDRAM
Size Document Number Rev
V1.2
OPUs Option:
DV342(default) 502W
R221,R224=10R R221,R224=2.2R
R294,R295=0R R294,R295=91R
R202=2KR R202=0R
R127=43K R127=51K
R205=10K R205=3.3K
R207=2.2K R207=3.3K
C C
B B
TECOBEST TECHNOLOGY
A A
TB_V862
Title
ZR36862 & SDRAM
Size Document Number Rev
V1.2
Date: Saturday, May 28, 2005 Sheet 2 of 6
5 4 3 2 1
TECOBEST TECHNOLOGY
A A
TB_V862
Title
FLASH & EEPROM
Size Document Number Rev
Custom V1.2
RF33V RF33V
RFA5V
2
Q202 R200
C231 + BT2907 1 10K
0.1uF C205 R221 DRVSB
+ 100uF/16V 10R C228
C201 C202 [2.2R] 47uF/16V
3
D 100uF/16V 0.1uF D
2
R202 R222
2K Q204 1 220R
DVD_LD
[0R] BT2907
RF33V
3
C212
1nF
OPU_HFM
2
R224 Q203 R201
10R + BT2907 1 10K
C207 C208 [2.2R]
CN201 0.1uF 0.1uF C229
24Pin OPU connector 47uF/16V
3
2
24 Q205 1 R223 220R
GND-LD DVDLD CD_LD
23 BT2907
DVD-LD 22
NC 21 3
HFM 20
MD 19 CDLD
CD-LD 18 PW5V
VR-DVD 17
1
VR-CD 16
NC 15 RFE RFE
1
E 14 D203
VCC 13 VREF R217 33R VC 2.1V 1N4001 D205
VC(VREF) VC VR_CD
12 R209 0R MD_DVD 1N4001
GND/PD 11 RFF
2
F RFF
10 RFB VR_DVD R210 0R MD_CD
B 9
22
RFA
2
A 8 RF Q210 Q211
RF RF
7 PDIC_SEL 3V3_DRV 1 S8550 DSPVCC33 1V8_DRV1 S8550 R553
CD/DVD_SW 6 DSPVCC18 0R
D RFD RF33V
C 5 RFC R294 R295 S8050/S8550 R551 0R C
C 4 TACT- 0R 0R DSPVCC33
3
T- DSPVCC33
3 TACT+ [91R] [91R]
T+ 2 FACT+
F+ RFA5V RF33V DSPVCC18
1 FACT- R552
2
F- 0R
GND
GND
25
R207 R206
2E
C204 R208 R204 2.2K 4.7K 3V3_FB 1V8_FB
1B
3C
+
0.1uF C209 3.3K 470R [3.3K] [NM] +
47uF/16V C275
R218 R238 220uF/10V
12K 1% 10K 1%
PDIC_SEL R235 NM [NM]
CD/DVD
Not assemble for HOP1250/SPU3153/DPD20428
OPUs, and assemble for other OPUs PDIC_SEL: CD_DVD :
CD=HIGH R205 CD=LOW
Default=SANYO HD62 []=502W DVD=LOW 10K DVD=HIGH FOR AM5888S, DEFAULT
3
[3.3K]
Q201 1
FOR AT5669,R219=0R,R218=NM
BT3904
2
R278 24K
CN504 P+12V
Close to Motor driver
R264
PW5V
VDDPWM R505 0R M5V
B 1 B
U202 DRVSB 1K 1% 1K 1% M5V
2
AM5888S/AT5669 DRVSB 3 P+5V1FB501 220Z R506 0R RFA5V
RF33V R243 R292 1K RFA5V
4
FOCUS_S 0R 1 28 R265 5 P+5V2FB502 220Z R507 0R D5V
FOCUS_S VINFC STBY D5V
3V3_DRV 2 27
R236 R237 CFCERR1(OP2IN-) BIAS C246 0.1uF HEADER 5 +
1V8_FB 3 26 R268 + C501
10K 10K R246 CFCERR2(OP2IN+) VINTK 0R TRACK_S C504 220uF/16V
CN204 SLED_S 0R 4 25 1V8_DRV
+5V: +5V(+-2.5%) 100uF/16V
SLED_S VINSL+ CTKERR1(OP1IN+)
1 LOAD-
2 LOAD+ 3V3_FB 5 24
VINSL-(OP2OUT) CTKERR2(OP1IN-)
3
OUTSW CLOSE
4 6 23 R269
CLOSE VOSL(CLOSE) VINLD SPINDLE_S
5 0R
INSW OPEN 7 22
OPEN VNFFC(OPEN) PREGND
TRAY M5V M5V
8 21 MARK1
VCC PVCC2
.
LOAD- 9 20
PVCC1(LOAD-) VNFTK(OP1OUT)
1
C244 C245 LOAD+ 10 19 H1 H2 MARK2
RF33V 100uF/16V 0.1uF PGND(LOAD+) PGND(VCC2)
.
3 4 3 4
SLED- MOT_SPDL- RF33V 3 4 3 4
11 18 2 5 2 5
VOSL- VOLD- 2 5 2 5
1 1
1
SLED+ MOT_SPDL+ 1 1 MARK3
12 17
VOSL+ VOLD+
9
8
7
6
9
8
7
6
CN203 R254
.
FACT- 13 16 TACT- H1 H2
SLED+ 10K VOFC- VOTK- R276 R277 R279
6
9
8
7
6
9
8
7
6
1
5 SLED- FACT+ 14 15 TACT+ 1K 1K 39R MARK4
VOFC+ VOTK+
GND1
.
4
GND
HOMESW R299
3
2 MOT_SPDL+ C251 2K
1
MOT_SPDL- 22nF SPDL_SENS-
1
29
30
A A
SPDL_SENS+
SLED & SPINDLE
C274
1 2 R203 0.1uF
D207 LL4148 120R
2 1 TECOBEST TECHNOLOGY
D206 LL4148
TB_V862
Title
OPU Connector & DRIVER & POWER
Size Document Number Rev
V1.2
Date: Saturday, May 28, 2005 Sheet 4 of 6
5 4 3 2 1
R322
Defult:CS4334 DSPVCC33 20K A-LMAIN
4
D D
CS4334 56R NC C320 R320 R323 120pF
A_LOUT 3.9K 2 - C323 R324
CEI2711 NC 10R R304 R309 1 1K LMAIN-OUT
56R NC 10uF/16V 10K C321 LMAIN-OUT
3 +
[NC] [10R] MJM4558E
2
1nF U303A 10uF/16V R325
U301 OP_12V MUTE 2K Q312
8
1
AOUT0 1 8 BT3904
AOUT0 ABCLK SDATA AOUTL
2 7
ABCLK ALRCLK SCLK VA R332
3
3 6
ALRCLK AMCLK LRCK VGND 20K A-RMAIN
4 5
AMCLK MCLK AOUTR
CS4334
[CEI2711] C332
4
C330 R330 R333 120pF
A_ROUT 3.9K 6 - C333 R334
7 1K RMAIN-OUT
10uF/16V 10K OP_BIAS RMAIN-OUT
5 +
+ MJM4558E
2
C304 C303 U303B 10uF/16V R335
MUTE
8
0.1uF 47uF/16V C331 OP_12V 2K 1 Q313
1nF BT3904
C C
3
R308
3
R307 R310 + C317
MUTEC 1 Q303 3.3K 10uF/16V
MUTEC BT3904
47K
2
R301
100R Q304 BT3906
P+12V D5V 2 3
OP_12V
R311 10K
1
R302 + R312 100K
10K C301 C302
47uF/25V 0.1uF D301 LL4148
B OP_BIAS 1 2 B
Q305 BT3906
2 3 MUTE
+
R303 C305 C306
10K 47uF/25V 0.1uF +
C318
1
2
VGND 220uF/10V
R313
D302 47K R314
LL4148 2K
1
C319
47uF/25V
A TECOBEST TECHNOLOGY A
TB_V862
Title
Audio
Size Document Number Rev
V1.2
JR501
AV-4-405A
Y_R_V 7
Y_R_V
3
P+12V
D502 9
FS1: H=RGB L=CVBS NM
[BAT54S]
R509 R513 COAX_SPDIF 8
D SCART/VGA PORT FS2 FS3 SCART CFG 2K 2K D
2
00 4:3 [NM] [NM]
VSYNC DSPVCC33
VGND
12 HSYNC VSYNC
01 TV AUDIO/TV/16:9
11 HSYNC
10
Video Status
Y_R_V 10 16:9 C_B_U 4
C_B_U
3
9 C_B_U R510
8 CVBS_G_Y 1K
7 SCART_SWITCH CVBS_G_Y [NM] D504 6
6 CVBS_OUT NM
5 AUDIO/TV/16:9 [BAT54S]
4
3
RMAIN-OUT 5
3 RMAIN-OUT
LMAIN-OUT 1 Q501
2
2 FS2
RMAIN-OUT BT3904
1 DSPVCC33
[NM] VGND
D5V
2
CN501
CVBS_G_Y 1
CVBS_G_Y
3
VGND
1 Q502 R514
FS3
BT3904 150R D503 3
[NM] [NM] NM
[BAT54S]
2
LMAIN-OUT 2
LMAIN-OUT
2
FS1 1 Q503
DSPVCC33
BT3904 VGND
[NM] VGND
SCART_SWITCH
2
RGB Status
R516
1K JR504
1
C C
[NM]
C520 11pF
1
SCART 8
8
CVBS_C L501 1.1uH CVBS_OUT 7 9
CVBS_C 7 9
1
C511 C521 Y_R_V 3
150pF 160pF D506 D505 3
LL4148 LL4148 C_B_U 4
4
2
DSPVCC33
2
DSPVCC33 VGND VGND
2
VGND
CVBS &
SVIDEO
R501 R502 R503 R504
10K 10K 10K 4.7K
CN503
D5V
1
2 R540 220R
IRRCV D5V
3
4 R541 220R
FPC_CLK
5 R542 220R
FPC_STB
6 R543 220R
FPC_DOUT R550
10R
VFD_PORT C542
C535
NM JR505
B B
+
[100pF] 3
GND
100uF/16V 2
R548 68R VCC
OPT_SPDIF 1
IN
KEY D5V
OPTI
3
R549 33R
SPDIF 1 Q505 C509
SPDIF
0.1uF
BT3904
2
Close to Q505
R529
56R
C528
R544
COAX_SPDIF
R530 62R
0.1uF
39R C510
22pF
A A
TECOBEST TECHNOLOGY
TB_V862
Title
AV output
Size Document Number Rev
V1.2
Date: Saturday, May 28, 2005 Sheet 6 of 6
5 4 3 2 1