TL071
TL071
TL071
s LOW INPUT BIAS AND OFFSET CURRENT s LOW NOISE en = 15nV/Hz (typ) s OUTPUT SHORT-CIRCUIT PROTECTION s HIGH INPUT IMPEDANCE JFET INPUT
STAGE
N DIP8 (Plastic Package)
s LOW HARMONIC DISTORTION : 0.01% (typ) s INTERNAL FREQUENCY COMPENSATION s LATCH UP FREE OPERATION s HIGH SLEW RATE : 16V/s (typ)
D SO8 (Plastic Micropackage)
DESCRIPTION The TL071, TL071A and TL071B are high speed JFET input single operational amplifiers incorporating well matched, high voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient. PIN CONNECTIONS (top view)
ORDER CODE
Package Part Number Temperature Range N TL071M/AM/BM -55C, +125C TL071I/AI/BI -40C, +105C TL071C/AC/BC 0C, +70C Example : TL071CN D
N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT)
1 2 3 4
8 7 6 5
12345678-
Offset null 1 Inverting input Non-inverting input VCCOffset null 2 Output VCC+ N.C.
March 2001
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SCHEMATIC DIAGRAM
V CC
100
200 Output
100 30k
8.2k
1.3k V CC
35k
1.3k
35k
100
Offset Null1
Offset Null2
N1
N2 100k V CC
Parameter Supply voltage - note Input Voltage - note Power Dissipation Output Short-circuit Duration - note Storage Temperature Range
4) 2) 3) 1)
TL071M, AM, BM
TL071I, AI, BI
TL071C, AC, BC
Unit V V V mW
C C
All voltage values, except differential voltage, are with respect to the zero reference level (ground) of the supply voltages where the zero reference level is the midpoint between VCC + and VCC -. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 volts, whichever is less. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded
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13
DVio Iio
Input Offset Voltage Drift Input Offset Current Tamb = +25C Tmin Tamb Tmax Input Bias Current -note 1) Tamb = +25C Tmin Tamb Tmax Large Signal Voltage Gain (RL = 2k, Vo = 10V) Tamb = +25C Tmin Tamb Tmax Supply Voltage Rejection Ratio (RS = 50) Tamb = +25C Tmin Tamb Tmax Supply Current, no load Tamb = +25C Tmin Tamb Tmax Input Common Mode Voltage Range Common Mode Rejection Ratio (RS = 50) Tamb = +25C Tmin Tamb Tmax Output Short-circuit Current Tamb = +25C Tmin Tamb Tmax Output Voltage Swing Tamb = +25C RL = 2k RL = 10k RL = 2k RL = 10k 11 50 25 80 80
10 5 100 10 200 20
V/C pA nA pA nA V/mV
Iib
20
20
Avd
200
200 dB
SVR
86
86 mA
2.5 2.5 V dB
80 80 10 10 10 12 10 12 8
70 70 60 60 10 10 10 12 10 12 8
mA 40 40 60 60 V 12 13.5 12 13.5
Ios
Vopp
SR tr Kov GBP Ri
Slew Rate (Tamb = +25C) Vin = 10V, RL = 2k, CL = 100pF, unity gain Rise Time (Tamb = +25C) Vin = 20mV, RL = 2k, CL = 100pF, unity gain Overshoot (Tamb = +25C) Vin = 20mV, RL = 2k, CL = 100pF, unity gain Gain Bandwidth Product (Tamb = +25C) Vin = 10mV, RL = 2k, CL = 100pF, f= 100kHz Input Resistance
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Symbol
Parameter Total Harmonic Distortion (Tamb = +25C, f= 1kHz, RL = 2k,CL = 100pF, Av = 20dB, Vo = 2Vpp) Equivalent Input Noise Voltage RS = 100, f = 1KHz Phase Margin
THD
0.01
0.01 nV ----------Hz
degrees
en m
1.
15 45
15 45
The input bias currents are junction leakage currents which approximately double for every 10C increase in the junction temperature.
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30 25
RL = 10 k Tamb = +25C
20
15 10
5
0 2 4 6 8 10 12 SUPPLY VOLTAGE ( V) 14 16
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0.01 -50
-25
25
50
75
100
125
-25
25
50
75
100
125
TEMPERATURE (C)
TEMPERATURE (C)
LARGE SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT versus FREQUENCY
180
10
1 100
90
100
250 225 200 175 150 125 100 75 50 25 0 -75 -50 -25 0 25 50 TEMPERATURE (C)
75
100
125
2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 -75 -50 -25 0 25 50 TEMPERATURE (C)
75
100
125
TEMPERATURE (C)
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6 INPUT
4 2 0 -2 -4 -6 0
24
OVERSHOOT
20 16 12 8 4
10%
90%
VCC=
15V
R L = 2 kW
0 -4 0
0.5
1.5
2.5
3.5
CC
= 15V
TIME (m s)
70 60 EQUIVALENT INPUT NOISE VOLTAGE (nV/VHz) 50 40 30 20 10 0 10 40 100 400 1k 4k 10k 40k 100k FREQUENCY (Hz)
400
1k
4k
10k
40k
100k
FREQUENCY (Hz)
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10k
eI
TL071
1k TL071 eo
CL = 100pF
RL = 2k
eo
eI
RL
CL = 100pF
9.1k
f osc=
TL071 R1 R2 fo = 1 = 1kHz 2 x R F CF
C3 C1 = C2 = C3 = 100pF 2
R3
R1 = R2 = 2R3 = 1.5M C1 C2
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Millimeters Dim. Min. A a1 B b b1 D E e e3 e4 F i L Z 0.51 1.15 0.356 0.204 7.95 2.54 7.62 7.62 6.6 5.08 3.81 1.52 Typ. 3.32 1.65 0.55 0.304 10.92 9.75 0.020 0.045 0.014 0.008 0.313 Max. Min.
Inches Typ. 0.131 0.065 0.022 0.012 0.430 0.384 0.100 0.300 0.300 0260 0.200 0.150 0.060 Max.
3.18
0.125
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Millimeters Dim. Min. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 0.1 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 3.8 0.4 4.0 1.27 0.6 8 (max.) 0.150 0.016 Typ. Max. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5.0 6.2 0.189 0.228 Min. 0.004 0.026 0.014 0.007 0.010
Inches Typ. Max. 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.197 0.244 0.050 0.150 0.157 0.050 0.024
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom http://www.st.com
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