7393

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04
OMNIFET II: FULLY AUTOPROTECTED POWER MOSFET
TYPE VNB14NV04 VND14NV04 VND14NV04-1 VNP14NV04 VNS14NV04
RDS(on)
Ilim
Vclamp
3 1
35 m
12 A
40 V
TO-252 (DPAK)
SO-8
3
3
2 1
LINEAR CURRENT LIMITATION I THERMAL SHUT DOWN I SHORT CIRCUIT PROTECTION I INTEGRATED CLAMP I LOW CURRENT DRAWN FROM INPUT PIN I DIAGNOSTIC FEEDBACK THROUGH INPUT PIN I ESD PROTECTION I DIRECT ACCESS TO THE GATE OF THE POWER MOSFET (ANALOG DRIVING) I COMPATIBLE WITH STANDARD POWER MOSFET
I
TO-220
TO-251 (IPAK) D2PAK

3 1
ORDER CODES
PACKAGE TUBE T&R VNB14NV04 VNB14NV0413TR D2PAK TO-252 (DPAK) VND14NV04 VND14NV0413TR TO-251 (IPAK) VND14NV04-1 TO-220 SO-8 VNP14NV04 VNS14NV04
DESCRIPTION The VNB14NV04, VND14NV04, VND14NV04-1, VNP14NV04, VNS14NV04, are monolithic devices designed in STMicroelectronics VIPower M0-3 Technology, intended for replacement of standard Power MOSFETS from DC up to 50KHz BLOCK DIAGRAM
applications. Built in thermal shutdown, linear current limitation |and overvoltage clamp protect the chip in harsh environments. Fault feedback can be detected by monitoring the voltage at the input pin.
DRAIN
2 Overvoltage Clamp
INPUT
Gate Control
Over Temperature
Linear Current Limiter
3
SOURCE
March 2004
1/29

ABSOLUTE MAXIMUM RATING
Symbol VDS VIN IIN RIN MIN ID IR VESD1 VESD2 Ptot EMAX Tj Tc Tstg Parameter Drain-source Voltage (VIN=0V) Input Voltage Input Current Minimum Input Series Impedance Drain Current Reverse DC Output Current Electrostatic Discharge (R=1.5K, C=100pF) Electrostatic Discharge on output pin only (R=330, C=150pF) Total Dissipation at Tc=25C Maximum Switching Energy (L=0.4mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=18A) Operating Junction Temperature Case Operating Temperature Storage Temperature SO-8 Value DPAK TO-220 IPAK Internally Clamped Internally Clamped +/-20 10 Internally Limited -15 4000 16500 4.6 74 93 Internally limited Internally limited -55 to 150 74 74 74 93 D2PAK Unit V V mA A A V V W mJ C C C
CONNECTION DIAGRAM (TOP VIEW) SO-8 Package (*)
SOURCE SOURCE SOURCE INPUT
DRAIN DRAIN DRAIN
DRAIN
(*) For the pins configuration related to DPAK, D2 PAK, IPAK, TO-220 see outlines at page 1.
CURRENT AND VOLTAGE CONVENTIONS
ID VDS DRAIN IIN RIN INPUT SOURCE
VIN
2/29

THERMAL DATA
Symbol Rthj-case Rthj-lead Rthj-amb
(*) When
Parameter Thermal Resistance Junction-case MAX Thermal Resistance Junction-lead MAX Thermal Resistance Junction-ambient MAX
SO-8 27 90 (*)
DPAK 1.7 65 (*)
Value TO-220 1.7 62
IPAK 1.7 102
D2PAK 1.7 52 (*)
Unit C/W C/W C/W
mounted on a standard single-sided FR4 board with 0.5cm2 of Cu (at least 35 m thick) connected to all DRAIN pins. Horizontal mounting and no artificial air flow.
ELECTRICAL CHARACTERISTICS (-40C < Tj < 150C, unless otherwise specified) OFF
Symbol VCLAMP VCLTH VINTH IISS VINCL IDSS Parameter Drain-source Clamp Voltage Drain-source Clamp Threshold Voltage Input Threshold Voltage Supply Current from Input Pin Input-Source Clamp Voltage Zero Input Voltage Drain Current (VIN=0V) Test Conditions VIN=0V; ID=7A VIN=0V; ID=2mA VDS=VIN; ID=1mA VDS=0V; VIN=5V IIN=1mA IIN=-1mA VDS=13V; VIN=0V; Tj=25C VDS=25V; VIN=0V 6 -1.0 Min 40 36 0.5 100 6.8 2.5 150 8 -0.3 30 75 Typ 45 Max 55 Unit V V V A V A
ON
Symbol RDS(on) Parameter Static Drain-source On Resistance Test Conditions VIN=5V; ID=7A; Tj=25C VIN=5V; ID=7A Min Typ Max 35 70 Unit m
3/29

ELECTRICAL CHARACTERISTICS (continued) (Tj=25C, unless otherwise specified) DYNAMIC
Symbol gfs (*) COSS Parameter Forward Transconductance Output Capacitance Test Conditions VDD=13V; ID=7A VDS=13V; f=1MHz; VIN=0V Min Typ 18 400 Max Unit S pF
SWITCHING
Symbol td(on) tr td(off) tf td(on) tr td(off) tf (di/dt)on Qi Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Current Slope Total Input Charge Test Conditions VDD=15V; ID=7A Vgen=5V; Rgen=RIN MIN=10 (see figure 1) VDD=15V; ID=7A Vgen=5V; Rgen=2.2K (see figure 1) VDD=15V; ID=7A Vgen=5V; Rgen=RIN MIN=10 VDD=12V; ID =7A; VIN=5V; Igen=2.13mA (see figure 5) Min Typ 80 350 450 150 1.5 9.7 9 10.2 16 36.8 Max 250 1000 1350 500 4.5 30.0 25.0 30.0 Unit ns ns ns ns s s s s A/s nC
SOURCE DRAIN DIODE

Symbol VSD (*) trr Qrr IRRM Parameter Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Test Conditions ISD =7A; VIN=0V ISD=7A; di/dt=40A/s Min Typ 0.8 300 0.8 5 Max Unit V ns C A
VDD=30V; L=200H Reverse Recovery Current (see test circuit, figure 2)
PROTECTIONS (-40C < Tj < 150C, unless otherwise specified)

Symbol Ilim tdlim Tjsh Tjrs Igf Eas Parameter Drain Current Limit Step Response Current Limit Overtemperature Shutdown Overtemperature Reset Fault Sink Current Single Pulse Avalanche Energy Test Conditions VIN=5V; VDS=13V VIN=5V; VDS=13V Min 12 Typ 18 45 150 135 10 400 175 200 Max 24 Unit A s C C mA mJ
VIN=5V; VDS=13V; Tj=Tjsh starting Tj=25C; VDD =24V VIN= 5V; Rgen=RIN MIN=10; L=24mH (see figures 3 & 4)
15
20
(*) Pulsed: Pulse duration = 300s, duty cycle 1.5%
4/29

PROTECTION FEATURES During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 50KHz. The only difference from the users standpoint is that a small DC current IISS (typ. 100A) flows into the INPUT pin in order to supply the internal circuitry. The device integrates: - OVERVOLTAGE CLAMP PROTECTION: internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. - LINEAR CURRENT LIMITER CIRCUIT: limits the drain current ID to Ilim whatever the INPUT pin voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. - OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the range 150 to 190 C, a typical value being 170 C. The device is automatically restarted when the chip temperature falls of about 15C below shut-down temperature. - STATUS FEEDBACK: in the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin will fall to 0V. This will not however affect the device operation: no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit.
5/29

Figure 1: Switching Time Test Circuit for Resistive Load
VD Rgen Vgen
ID 90%
tr td(on) Vgen
10% td(off)
tf t
t Figure 2: Test Circuit for Diode Recovery Times
A D I
A
FAST DIODE
OMNIFET
S 25 B
L=100uH B
Rgen
VDD
I
OMNIFET
S
Vgen
8.5
6/29

Figure 3: Unclamped Inductive Load Test Circuits Figure 4: Unclamped Inductive Waveforms
RGEN VIN PW
Figure 5: Input Charge Test Circuit
VIN
GEN
ND8003
7/29

Source-Drain Diode Forward Characteristics
Vsd (mV)
1000
Static Drain Source On Resistance

Rds(on) (mohms)
180 160
950
Vin=0V
900
Vin=2.5V
140 120
Tj=-40C
850 100 800 80

Tj=150C Tj=25C
750 60 700 40 20 0 2 4 6 8 10 12 14 16 18 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
650
Id (A)
Id(A)
Derating Curve
Static Drain-Source On resistance Vs. Input Voltage

Rds(on) (mohms)
80
70
Tj=150C
60
50
Id=12A Id=1A
40
Tj=25C
30
Tj=-40C Id=12A Id=1A Id=12A Id=1A
20
10 3 3.5 4 4.5 5 5.5 6
6.5
Vin(V)
Static Drain-Source On resistance Vs. Input Voltage

Rds(on) (mohms)
80
Transconductance
Gfs (S)
24 22
70
20
Vds=13V
Tj=-40C
Tj=25C
Id=7A
60
18 16
Tj=150C
50
Tj=150C
14 12
40
10 8
30
Tj=25C
6 4
Tj= - 40C
20
2 0
10 3 3.5 4 4.5 5 5.5 6 6.5
10
11
12
13
Vin(V)
Id(A)
8/29

Static Drain-Source On Resistance Vs. Id
Rds(on) (mohms)
70
Transfer Characteristics
Idon (A)
18 16
Vds=13.5V
Tj=25C
60
Vin=5V
50
Tj=150C
14 12
Tj=-40C
40
10 8
Tj=25C
Tj=150C
30
6 4
20
Tj=-40C
10
2 0
0 0 1 2 3 4 5 6 7 8 9 10 11 12 13
2 2.25
2.5 2.75
3 3.25
3.5 3.75
4 4.25
4.5 4.75
5 5.25
5.5
Id(A)
Vin (V)
Turn On Current Slope

di/dt(A/us)
20 17.5 15 12.5
Turn On Current Slope

di/dt(A/us)
6 5.5
Vin=5V Vdd=15V Id=7A
5 4.5 4 3.5
Vin=3.5V Vdd=15V Id=7A
10 7.5 5 2.5 0 0 250 500 750 1000 1250 1500 1750 2000 2250
3 2.5 2 1.5 1 0.5 0 0 250 500 750 1000 1250 1500 1750 2000 2250
Rg(ohm) Rg(ohm)
Input Voltage Vs. Input Charge

Vin (V)
8 7 6 5 4
Turn off drain source voltage slope

dv/dt(V/us)
300 275
Vds=12V Id=7A
250 225 200 175 150 125
Vin=5V Vdd=15V Id=7A
3 2 1 0 0 5 10 15 20 25 30 35 40 45
100 75 50 25 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500
Qg (nC)
Rg(ohm)
9/29

Turn Off Drain-Source Voltage Slope
dv/dt(v/us)
300 275 250 225 200 175 150 125 100 75 50 25 0 0 250 500 750 1000 1250 1500 1750 2000 2250 300 200 0 5 10 15 20 25 30 35 500 400 600
Capacitance Variations
C(pF)
1000 900
Vin=3.5V Vdd=15V Id=7A
800 700
f=1MHz Vin=0V
Rg(ohm)
Vds(V)
Switching Time Resistive Load

t(us)
11
Switching Time Resistive Load

t(ns)
1750
tf
10 9 8 7 6 5 750 4 3 2 1 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 500 1000
Vdd=15V Id=7A Vin=5V
tr td(off)
1500
1250
Vdd=15V Id=7A Rg=10ohm
td(off) tr
td(on)
250
tf td(on)
3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25
Rg(ohm)
Vin(V)
Output Characteristics
Id (A)
18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0.5 1 1.5 2 2.5 3
Normalized On Resistance Vs. Temperature

Rds(on) (mOhm)
4
Vin=5V Vin=4V
3.5 3
Vin=5V Id=7A
Vin=3V
2.5 2 1.5 1 0.5
Vin=2V
0
4.5 5 5.5 6
3.5
-50
-25
25
50
75
100
125
150
175
Vds (V)
Tc (C)
10/29

Normalized Input Temperature
Vinth (V)
2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 -50 -25 0 25 50 75 100 125 150 175
Threshold
Voltage
Vs.
Current Limit Vs. Junction Temperature

Ilim (A)
40 35
Vds=Vin Id=1mA
30 25 20 15 10 5 0 -50 -25
Vin=5V Vds=13V
25
50
75
100
125
150
175
Tc (C)
Tc (C)
Step Response Current Limit

Tdlim(us)
55 52.5 50 47.5 45 42.5 40 37.5 35 32.5 30 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5
Vin=5V Rg=10ohm
Vdd(V)
11/29

DPAK Maximum turn off current versus load inductance
ILMAX (A) 100
10
B C
1 0.01
0.1 L(mH )
10
A = Single Pulse at TJstart=150C B= Repetitive pulse at TJstart=100C C= Repetitive Pulse at TJstart=125C Conditions: VCC=13.5V Values are generated with RL=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization
12/29

D2PAK Maximum turn off current versus load inductance
ILMAX (A) 100
A B
10
1 0.01
0.1
1 L(mH)
10
100
A = Single Pulse at TJstart=150C B= Repetitive pulse at TJstart=100C C= Repetitive Pulse at TJstart=125C Conditions: VCC=13.5V Values are generated with RL=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization
13/29
DPAK THERMAL DATA

DPAK PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: from minimum pad lay-out to 8cm2).
Rthj-amb Vs PCB copper area in open box free air condition
RTH j_amb (C/W)
90 80 70 60 50 40 30 0 2 4 6 8 10
PCB CU heatsink area (cm^2)
14/29
SO-8 THERMAL DATA

SO-8 PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.14cm2, 0.6cm2, 1.6cm2).
RTHj_amb (C/W)
SO-8 at 4 pins connected to TAB
110 105 100 95 90 85 80 75 70 0 0.5 1 1.5 2 2.5

PCB CU heatsink area (cm^2)
15/29
D2PAK THERMAL DATA

D2PAK PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: from minimum pad lay-out to 8cm2).
RTHj_amb (C/W)
55
Tj-Tamb=50C
50 45 40 35 30
0 2 4 6 8 10
PCB Cu heatsink area (cm^2)
16/29

DPAK Thermal Impedance Junction Ambient Single Pulse
ZT H (C/W) 1000
100
Footprint 6 cm2
10
0.1 0.0001 0.001 0.01 0.1 1 T ime (s) 10 100 1000
Thermal fitting model of an OMNIFET II in DPAK
Pulse calculation formula
Z TH = R TH + Z THtp ( 1 )
where
= tp T
Footprint 0.1 0.35 1.20 2 15 61 0.0006 0.0021 0.05 0.3 0.45 0.8 6
Thermal Parameter
Area/island (cm2) R1 (C/W) R2 (C/W) R3 ( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C)
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
24
T_amb
17/29

D2PAK Thermal Impedance Junction Ambient Single Pulse
ZTH (C/W) 1000
100
Footprint 6 cm2
10
0.1 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000
Thermal fitting model of an OMNIFET II in D2PAK
Pulse calculation formula
Z TH = R TH + Z THtp ( 1 )
where
= tp T
Footprint 0.1 0.35 0.3 4 9 37 0.0006 2.10E-03 8.00E-02 0.45 2 3 6
Thermal Parameter
Area/island (cm2) R1 (C/W) R2 (C/W) R3 ( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C)
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
22
T_amb
18/29
TO-251 (IPAK) MECHANICAL DATA

mm. MIN. 2.2 0.9 0.7 0.64 5.2 0.3 0.95 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 TYP MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033
DIM. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2
H C A C2 L2 D B3 B6 A1 L
= =
B5
A3
=
B2
G
=
L1
19/29
D2PAK MECHANICAL DATA

DIM. A A1 A2 B B2 C C2 D D1 E E1 G L L2 L3 M R V2 0 4.88 15 1.27 1.4 2.4 0.4 8 10 8.5 5.28 15.85 1.4 1.75 3.2 mm. MIN. 4.4 2.49 0.03 0.7 1.14 0.45 1.23 8.95 8 10.4 TYP MAX. 4.6 2.69 0.23 0.93 1.7 0.6 1.36 9.35
P011P6
20/29
TO-252 (DPAK) MECHANICAL DATA

DIM. A A1 A2 B B2 C C2 D D1 E E1 e G H L2 L4 R V2 Package Weight 0 0.60 0.2 8 Gr. 0.29 4.40 9.35 0.8 1.00 6.40 4.7 2.28 4.60 10.10 mm. MIN. 2.20 0.90 0.03 0.64 5.20 0.45 0.48 6.00 5.1 6.60 TYP MAX. 2.40 1.10 0.23 0.90 5.40 0.60 0.60 6.20
P032P
21/29
TO-220 MECHANICAL DATA

mm. DIM. MIN. A b b1 c D E e e1 F H1 J1 L L1 L20 L30 4.40 0.61 1.15 0.49 15.25 10 2.40 4.95 1.23 6.20 2.40 13 3.50 16.40 28.90 3.75 2.65 1.9Gr. (Typ.) 3.85 2.95 TYP MAX. 4.60 0.88 1.70 0.70 15.75 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93
P
Q Package Weight
22/29
SO-8 MECHANICAL DATA

mm. DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M F 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 TYP MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 inch
23/29

D2PAK FOOTPRINT
A
TUBE SHIPMENT (no suffix)

C
16.90
12.20
1.60 3.50 9.75
5.08
B
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) All dimensions are in mm.
50 500 532 6 21.3 0.6
All dimensions are in millimeters
TAPE AND REEL SHIPMENT (suffix 13TR)
REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 60 30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 24 4 16 1.5 1.5 11.5 6.5 2
End
Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components
24/29

DPAK FOOTPRINT
A
TUBE SHIPMENT (no suffix)

1 .6
6 .7
1 .8
3 .0
2 .3 6 .7 2 .3
B
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) All dimensions are in mm.
75 3000 532 6 21.3 0.6
TAPE AND REEL SHIPMENT (suffix 13TR)
REEL DIMENSIONS
TAPE DIMENSIONS
End
25/29

SO-8 TUBE SHIPMENT (no suffix)
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1)

100 2000 532 3.2 6 0.6
TAPE AND REEL SHIPMENT (suffix 13TR) REEL DIMENSIONS

TAPE DIMENSIONS
End
26/29
TO-220 TUBE SHIPMENT (no suffix)

50 1000 532 5.5 31.4 0.75
27/29
IPAK TUBE SHIPMENT (no suffix)

A C

75 3000 532 6 21.3 0.6
MECHANICAL POLARIZATION
28/29
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2004 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04

OMNIFET II: FULLY AUTOPROTECTED POWER MOSFET

TYPE VNB14NV04 VND14NV04 VND14NV04-1 VNP14NV04 VNS14NV04

TO-251 (IPAK) D2PAK

Linear Current Limiter

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04

CONNECTION DIAGRAM (TOP VIEW) SO-8 Package (*)

SOURCE SOURCE SOURCE INPUT

DRAIN DRAIN DRAIN

CURRENT AND VOLTAGE CONVENTIONS

ID VDS DRAIN IIN RIN INPUT SOURCE

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04

DPAK 1.7 65 (*)

Value TO-220 1.7 62

IPAK 1.7 102

D2PAK 1.7 52 (*)

Unit C/W C/W C/W

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04

SOURCE DRAIN DIODE

VDD=30V; L=200H Reverse Recovery Current (see test circuit, figure 2)

PROTECTIONS (-40C < Tj < 150C, unless otherwise specified)

(*) Pulsed: Pulse duration = 300s, duty cycle 1.5%

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04

t Figure 2: Test Circuit for Diode Recovery Times

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04

Figure 5: Input Charge Test Circuit

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04

Static Drain Source On Resistance

850 100 800 80

Static Drain-Source On resistance Vs. Input Voltage

10 3 3.5 4 4.5 5 5.5 6

Static Drain-Source On resistance Vs. Input Voltage

10 3 3.5 4 4.5 5 5.5 6 6.5

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04

Turn On Current Slope

Turn On Current Slope

Vin=5V Vdd=15V Id=7A

Vin=3.5V Vdd=15V Id=7A

Input Voltage Vs. Input Charge

Turn off drain source voltage slope

250 225 200 175 150 125

Vin=5V Vdd=15V Id=7A

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04

Vin=3.5V Vdd=15V Id=7A

Switching Time Resistive Load

Switching Time Resistive Load

Vdd=15V Id=7A Vin=5V

Vdd=15V Id=7A Rg=10ohm

Normalized On Resistance Vs. Temperature

2.5 2 1.5 1 0.5

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04

Current Limit Vs. Junction Temperature

Step Response Current Limit

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04

ILMAX (A) 100

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04

ILMAX (A) 100

VNB14NV04 / VND14NV04 / VND14NV04-1 / VNP14NV04 / VNS14NV04