7485 Comparador Datasheet
7485 Comparador Datasheet
7485 Comparador Datasheet
4-Bit Magnitude
Comparator
The SN74LS85 is a 4-Bit Magnitude Camparator which compares
two 4-bit words (A, B), each word having four Parallel Inputs
(A0 A3, B0 B3); A3, B3 being the most significant inputs. Operation
is not restricted to binary codes, the device will work with any
monotonic code. Three Outputs are provided: A greater than B
(OA > B), A less than B (OA < B), A equal to B (OA = B). Three
Expander Inputs, IA > B, IA < B, IA = B, allow cascading without external
gates. For proper compare operation, the Expander Inputs to the least
significant position must be connected as follows: IA < B= IA > B = L,
IA = B = H. For serial (ripple) expansion, the OA > B, OA < B and OA = B
Outputs are connected respectively to the IA > B, IA < B, and IA = B
Inputs of the next most significant comparator, as shown in Figure 1.
Refer to Applications section of data sheet for high speed method of
comparing large words.
The Truth Table on the following page describes the operation of the
SN74LS85 under all possible logic conditions. The upper 11 lines
describe the normal operation under all conditions that will occur in a
single device or in a series expansion scheme. The lower five lines
describe the operation under abnormal conditions on the cascading
inputs. These conditions occur when the parallel expansion technique
is used.
Easily Expandable
Binary or BCD Comparison
OA > B, OA < B, and OA = B Outputs Available
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LOW
POWER
SCHOTTKY
16
1
PLASTIC
N SUFFIX
CASE 648
16
Parameter
Supply Voltage
Min
Typ
Max
Unit
4.75
5.0
5.25
25
70
TA
Operating Ambient
Temperature Range
IOH
0.4
mA
IOL
8.0
SOIC
D SUFFIX
CASE 751B
mA
ORDERING INFORMATION
Device
16 Pin DIP
2000 Units/Box
SN74LS85D
Shipping
SN74LS85N
Package
16 Pin
SN74LS85
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC
A3
B2
A2
A1
B1
A0
B0
16
15
14
13
12
11
10
9
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual In-Line Package.
B3
IA<B
IA=B
IA>B
OA>B OA=B
8
7
OA<B GND
LOADING (Note a)
HIGH
PIN NAMES
A0 A3, B0 B3
IA = B
IA < B, IA > B
OA > B
OA < B
OA = B
Parallel Inputs
A = B Expander Inputs
A < B, A > B, Expander Inputs
A Greater than B Output
B Greater than A Output
A Equal to B Output
LOW
1.5 U.L.
1.5 U.L.
0.5 U.L.
10 U.L.
10 U.L.
10 U.L.
0.75 U.L.
0.75 U.L.
0.25 U.L.
5 U.L.
5 U.L.
5 U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.
LOGIC SYMBOL
10 12 13 15 9 11 14 1
4
2
3
A0 A1 A2 A3 B0 B1 B2 B3
IA>B
OA>B
IA<B
OA<B
IA=B
OA=B
VCC = PIN 16
GND = PIN 8
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2
5
7
6
SN74LS85
LOGIC DIAGRAM
A3
B3
(15)
(1)
(5)
A2
B2
(13)
(14)
(2)
A<B (3)
A=B (4)
A>B
A1
B1
(6)
OA=B
(12)
(11)
(7)
A0
B0
OA>B
OA<B
(10)
(9)
TRUTH TABLE
CASCADING
INPUTS
COMPARING INPUTS
OUTPUTS
A3,B3
A2,B2
A1,B1
A0,B0
IA>B
IA<B
IA=B
OA>B
OA<B
OA=B
A3>B3
A3<B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
A3=B3
X
X
A2>B2
A2<B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
A2=B2
X
X
X
X
A1>B1
A1<B1
A1=B1
A1=B1
A1=B1
A1=B1
A1=B1
A1=B1
A1=B1
X
X
X
X
X
X
A0>B0
A0<B0
A0=B0
A0=B0
A0=B0
A0=B0
A0=B0
X
X
X
X
X
X
X
X
H
L
X
H
L
X
X
X
X
X
X
X
X
L
H
X
H
L
X
X
X
X
X
X
X
X
L
L
H
L
L
H
L
H
L
H
L
H
L
H
L
L
L
H
L
H
L
H
L
H
L
H
L
H
L
L
H
L
L
L
L
L
L
L
L
L
L
H
L
L
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3
H = HIGH Level
L = LOW Level
X = IMMATERIAL
A0 A1 A2 A3 B0 B1 B2
IA > B
L
L
H
IA < B
B3
IA > B
IA < B
OA = B
IA = B
IA = B
Bn
B n1
B n2
B n3
An
A0 A1 A2 A3 B0 B1 B2
OA > B
OA < B
SN74LS85
A n1
B3
A n2
A0 A1 A2 A3 B0 B1 B2
A n3
SN74LS85
B3
A>B
A<B
A=B
OA > B
OA < B
OA = B
SN74LS85
L = LOW LEVEL
H = HIGH LEVEL
APPLICATIONS
Figure 2 shows a high speed method of comparing two
24-bit words with only two levels of device delay. With the
technique shown in Figure 1, six levels of device delay result
Table 1
WORD LENGTH
NUMBER OF PKGS.
1 4 Bits
5 24 Bits
25 120 Bits
1
26
8 31
NOTE:
The SN74LS85 can be used as a 5-bit comparator only
when the outputs are used to drive the A0A3 and B0B3
inputs of another SN74LS85 as shown in Figure 2 in positions #1, 2, 3, and 4.
INPUTS
(MSB)
A20 A21 A22 A23 B20 B21 B22 B23
(LSB)
A0 A1 A2 A3 B0 B1 B2 B3
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
A19
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
IA < B
OA < B
B19
IA < B
IA = B
OA = B
IA = B
#5
#1
OA < B
OA = B
NC
INPUTS
A5 A6 A7 A8 B5 B6 B7 B8
A4
B4
L
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
#4
IA < B
OA < B
A9
IA > B
IA = B
OA = B
B9
NC
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
#3
OA < B
IA < B
IA > B
IA = B
OA = B
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
#2
OA < B
IA < B
IA > B
A14
B14
NC
IA = B
OA = B
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
IA < B
IA = B
#6
OA < B
OA = B
OUTPUTS
NC
SN74LS85
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Parameter
VIH
VIL
Typ
Max
VOH
VO
OL
0.8
0.65
Test Conditions
1.5
3.5
2.0
2.7
Unit
V
VIK
Min
0.25
0.4
IOL = 4.0 mA
0.35
0.5
IOL = 8.0 mA
20
60
mA
0.4
1.2
mA
100
mA
VCC = MAX
20
mA
VCC = MAX
IIH
A < B, A > B
Other Inputs
0.1
0.3
IIL
IOS
ICC
20
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
Parameter
Min
Typ
Max
Unit
tPLH
tPHL
24
20
36
30
ns
tPLH
tPHL
Any A or B to A = B
27
23
45
45
ns
tPLH
tPHL
A < B or A = B to A > B
14
11
22
17
ns
tPLH
tPHL
A = B to A = B
13
13
20
26
ns
tPLH
tPHL
A > B or A = B to A < B
14
11
22
17
Test Conditions
ns
VCC = 5.0 V
CL = 15 pF
AC WAVEFORMS
VIN
1.3 V
1.3 V
tPHL
VOUT
1.3 V
VIN
1.3 V
tPHL
tPLH
1.3 V
1.3 V
VOUT
Figure 3.
tPLH
1.3 V
1.3 V
Figure 4.
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SN74LS85
PACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 64808
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
A
16
S
T
SEATING
PLANE
H
G
16 PL
0.25 (0.010)
T A
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6
DIM
A
B
C
D
F
G
H
J
K
L
M
S
INCHES
MIN
MAX
0.740
0.770
0.250
0.270
0.145
0.175
0.015
0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008
0.015
0.110
0.130
0.295
0.305
0_
10 _
0.020
0.040
MILLIMETERS
MIN
MAX
18.80
19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01
SN74LS85
PACKAGE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B05
ISSUE J
A
16
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
8 PL
0.25 (0.010)
X 45 _
C
T
SEATING
PLANE
M
D
16 PL
0.25 (0.010)
T B
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DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
SN74LS85
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be
validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
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8
SN74LS85/D