IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO.

4, APRIL 2013 1503

A Boost Converter With Capacitor Multiplier and
Coupled Inductor for AC Module Applications
Shih-Ming Chen, Student Member, IEEE, Tsorng-Juu Liang, Senior Member, IEEE,
Lung-Sheng Yang, and Jiann-Fuh Chen, Member, IEEE
AbstractThe grid-connected AC module is an alternative so-
lution in photovoltaic (PV) generation systems. It combines a
PV panel and a micro-inverter connected to grid. The use of a
high step-up converter is essential for the grid-connected micro-
inverter because the input voltage is about 15 V to 40 V for a single
PV panel. The proposed converter employs a Zeta converter and a
coupled inductor, without the extreme duty ratios and high turns
ratios generally needed for the coupled inductor to achieve high
step-up voltage conversion; the leakage-inductor energy of the
coupled inductor is efciently recycled to the load. These features
improve the energy-conversion efciency. The operating principles
and steady-state analyses of continuous and boundary conduction
modes, as well as the voltage and current stresses of the active
components, are discussed in detail. A 25 V input voltage, 200 V
output voltage, and 250 W output power prototype circuit of the
proposed converter is implemented to verify the feasibility; the
maximum efciency is up to 97.3%, and full-load efciency is
94.8%.
Index TermsAC module, coupled-inductor, high step-up con-
verter, single switch, ZETA converter.
I. INTRODUCTION
T
HE European Photovoltaic Industry Association envisions
that the worlds photovoltaic (PV) market will grow up to
30 GW by 2014, due to the following policy-driven scenario
[1]; the role of grid-connected PV systems in distribution
energy systems will become important, and the PV inverter
will also play an irreplaceable role in this increasing market.
Conventional PV string-type inverters use series connections
with numerous modules to obtain higher dc-link voltage to the
main electricity through a dc-ac inverter [2], [4]. Although this
conguration is useful in terms of systemmonitoring and repair,
the partial shading, module mismatch, and dc connection cable
losses are inevitable problems and lead to signicantly reduced
system energy yields [3][7]. The ac module, which has been
proposed to improve these problems, consists of a single PV
panel and a micro-inverter. The micro-inverter receives the low
Manuscript received May 28, 2011; revised July 27, 2011; accepted
September 7, 2011. Date of publication September 26, 2011; date of current
version November 22, 2012. This work was supported by the National Science
Council of Taiwan under Project NSC-99-2220-E-006-006-.
S.-M. Chen, T.-J. Liang, and J.-F. Chen are with the Department of Electrical
Engineering/Advanced Optoelectronic Technology Center (AOTC)/Green En-
ergy Electronics Research Center (GREERC), National Cheng Kung Univer-
sity, Tainan 70101, Taiwan (e-mail: orion.chen@msa.hinet.net; tjliang@mail.
ncku.edu.tw; chenjf@mail.ncku.edu.tw).
L.-S. Yang is with the Department of Electrical Engineering, Far East
University, Tainan 74448, Taiwan (e-mail: yanglungsheng@yahoo.com.tw;
chow@eos.ncsu.edu).
Color versions of one or more of the gures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identier 10.1109/TIE.2011.2169642
Fig. 1. General conguration of grid-connected ac module.
dc voltage from the PV panel and transforms it to ac voltage,
then delivers it to the load or main electricity as would a small-
scale conventional PV inverter. Fig. 1 shows the energy of a
single PV panel through the micro-inverter output to the main
electricity; this is a general grid-connected ac module system.
The micro-inverter is inlaid in the rear bezel of the PV panel
and outputs the ac current to the load or to the main electricity;
this alternative solution not only immunizes the yield loss by
shadow effect, but also provides exible installation options
according to the users budget [5][7].
Fig. 2 shows that the maximum power point (MPP) voltage
range is from 15 V to 40 V with various power capacities of
about 100 W to 300 W for a single commercial PV panel.
When a wide input-voltage range is essential for the single-
stage micro-inverter, high efciency is difcult to achieve [3].
However, the dual-stage micro-inverter, which combines a high
step-up dc/dc converter and dc/ac inverter, is able to achieve
efciency as high as the conventional PV string-type inverter
[4]. Fig. 1 also shows that the micro-inverter integrates a high
step-up dc/dc converter and dc/ac inverter. The typical Zeta
converter provides either a step-up or a step-down function
to the output, in a manner similar to that of the buck-boost
or SEPIC converter topologies. The conventional Zeta con-
verter is congured of two inductors, a series capacitor and
a diode. Previous research work developed diverse Zeta con-
verter applications, as follows. A coupled inductor can be em-
ployed to reduce power supply dimensions [8]. Some Zeta and
yback combination converters extend the output range by us-
ing this coupled-inductor technique [9][11]. Employing soft-
switching technique, zero-voltage switching and zero-current
switching, on the Zeta converter [9], [12], [13]; changing the
input inductor of the ZETA converter to a coupled inductor
obtains a higher step-up conversion ratio [14],[31]. Many re-
search works on high step-up converter topology have included
analyses of the switched-inductor and switched-capacitor types
[15][17], transformerless switched-capacitor type [18], [19],
the boost type integrated with the coupled inductor [20], [21],
0278-0046/$26.00 2011 IEEE
1504 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 4, APRIL 2013
Fig. 2. MPP voltage (V
mp
) distribution with various power capacities of PV
panel.
Fig. 3. Circuit conguration of proposed converter.
the voltage-lift type [22], [23], and the capacitor-diode voltage
multiplier [24][26]. Some converters successfully combine
both boost and yback converters into one, and other converter
combinations have been developed to carry out high step-up
voltage gain by using the coupled-inductor technique [27][33].
However, the efciency and voltage gain of the dc-dc boost
converter are restrained by either the parasitic effect of power
switches or the reverse-recovery issue of diodes. In addition, the
equivalent series resistance (ESR) of the capacitor and the para-
sitic resistances of the inductor also affect overall efciency. In
regard to increasing voltage gain, this attribute is constricted by
the voltage stress on the active switch; however, if the leakage-
inductor energy of the coupled inductor can be recycled, then
the voltage stress on the active switch is reduced, meaning
the coupled-inductor and the voltage-multiplier or voltage-lift
techniques are able to accomplish the goal of achieving higher
voltage gain [8][33].
The proposed converter is shown in Fig. 3; its basic con-
guration came from a Zeta converter, but the input inductor
has been replaced by a coupled inductor. Employing the turns
ratio of the coupled inductor increases the voltage gain and
the secondary winding of the coupled inductor series with
a switched capacitor for further increasing the voltage. The
coupled-inductor Zeta converter is congured from a coupled
inductor T
1
with the oating active switch S
1
. The primary
winding N
1
of a coupled inductor T
1
is similar to the input
inductor of the conventional boost converter, except that ca-
Fig. 4. Simplied circuit model of proposed converter.
pacitor C
1
and diode D
1
are recycling leakage-inductor energy
from N
1
. The secondary winding N
2
is connected with another
pair of capacitors C
2
and with diode D
2
, all three of which are
in series with N
1
. The rectier diode D
3
connects to its output
capacitor C
3
and load R. The features of the proposed converter
are: 1) the leakage-inductor energy of the coupled inductor can
be recycled, increasing the efciency; and the voltage spike on
the active switch has been restrained; 2) the voltage-conversion
ratio is efciently increased by the switched-capacitor and
coupled-capacitor techniques; and 3) the oating active switch
isolates the PV panels energy during non-operating conditions,
thus preventing any potential electric hazard to humans or
facilities. The operating principles and steady-state analysis are
presented in the following sections.
II. OPERATING PRINCIPLES OF THE
PROPOSED CONVERTERS
The simplied circuit model of the proposed converter is
shown in Fig. 4. The coupled inductor T
1
includes a magne-
tizing inductor Lm, primary and secondary leakage inductors
L
k1
and L
k2
, and an ideal transformer primary winding N
1
and
secondary winding N
2
. To simplify the circuit analysis of the
proposed converter, the following assumptions are made.
1) All components are ideal, except for the leakage induc-
tance of coupled inductor T
1
. The ON-state resistance
R
DS(ON)
and all parasitic capacitances of the main switch
S
1
are neglected, as are the forward voltage drops of the
diodes D
1
D
3
.
2) The capacitors C
1
C
3
are sufciently large that the
voltages across them are considered to be constant.
3) The ESR of capacitors C
1
C
3
and the parasitic resis-
tance of coupled-inductor T
1
are neglected.
4) The turns ratio n of the coupled inductor T
1
winding is
equal to N
2
/N
1
.
The operating principles for continuous-conduction mode
(CCM) are now presented in detail. Fig. 5 shows the typical
waveform of several major components during one switching
period. The ve operating modes are described as follows.
A. CCM Operation
Mode I [t
0
, t
1
]: In this transition interval, the secondary
leakage inductor L
k2
is continuously releasing its energy to
capacitor C
2
. The current ow path is shown in Fig. 6(a); as
shown, switch S
1
and diodes D
2
are conducting. The current
i
Lm
is descending because source voltage V
in
is applied on
CHEN et al.: BOOST CONVERTER WITH CAPACITOR MULTIPLIER AND COUPLED INDUCTOR FOR AC MODULE APPLICATIONS 1505
Fig. 5. Typical waveforms of the proposed converter at CCM operation.
magnetizing inductor L
m
and primary leakage inductor L
k1
;
meanwhile, L
m
is also releasing its energy to the secondary
winding, as well as charging capacitor C
2
along with the
decrease in energy, the charging current i
D2
and i
C2
are also
decreasing. The secondary leakage inductor current i
LK2
is
declining according to i
Lm
/n. Once the increasing i
Lk1
equals
the decreasing i
Lm
at t = t
1
, this mode ends
i
I
in
(t) =i
I
DS
(t) = i
I
LK1
(t) (1)
di
I
Lm
(t)
dt
=
v
Lm
L
m
(2)
di
I
Lk1
(t)
dt
=
V
in
v
Lm
L
k1
(3)
i
I
Lk2
(t) =
i
I
Lm
(t) i
I
Lk1
(t)
n
. (4)
Mode II [t
1
, t
2
]: During this interval, source energy V
in
is
series connected with C
1
, C
2
, secondary winding N
2
, and L
k2
to charge output capacitor C
3
and load R; meanwhile, mag-
netizing inductor L
m
is also receiving energy from V
in
. The
current ow path is shown in Fig. 6(b); as illustrated, switch S
1
remains on, and only diode D
3
is conducting. The i
Lm
, i
Lk1
,
and i
D3
are increasing because the V
in
is crossing L
k1
, L
m
and
primary winding N
1
; L
m
and L
k1
are storing energy from V
in
;
meanwhile, V
in
is also in series with N
2
of coupled inductor
T
1
, and capacitors C
1
and C
2
are discharging their energy to
capacitor C
3
and load R, which leads to increases in i
Lm
, i
Lk1
,
Fig. 6. Current ow path in ve operating modes during one switching period
in CCM operation. (a) Mode I. (b) Mode II. (c) Mode III. (d) Mode IV.
(e) Mode V.
i
DS
, and i
D3
. This mode ends when switch S
1
is turned off at
t = t
2
i
II
Lm
(t) =i
II
Lk1
(t) ni
II
Lk2
(t) (5)
1506 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 4, APRIL 2013
di
II
Lm
(t)
dt
=
V
in
L
m
(6)
i
II
in
(t) =i
II
DS
(t) = i
II
Lm
(t) + (1 +n)i
II
Lk2
(t) (7)
di
II
Lk2
(t)
dt
=
di
II
D3
(t)
dt
=
(1 +n)V
in
+V
C1
+V
C2
L
k2
. (8)
Mode III [t
2
, t
3
]: During this transition interval, secondary
leakage inductor L
k2
keeps charging C
3
when switch S
1
is off.
The current ow path is shown in Fig. 6(c), and only diodes D
1
and D
3
are conducting. The energy stored in leakage inductor
L
k1
ows through diode D
1
to charge capacitor C
1
instantly
when S
1
turns off. Meanwhile, the L
k2
keeps the same current
direction as in the prior mode and is in series with C
2
to charge
output capacitor C
3
and load R. The voltage across S
1
is the
summation of V
in
, V
Lm
, and V
Lk1
. Currents i
Lk1
and i
Lk2
are
rapidly declining, but i
Lm
is increasing because L
m
is receiving
energy from L
k2
. Once current i
Lk2
drops to zero, this mode
ends at t = t
3
i
III
in
(t) =0 (9)
i
III
Lm
(t) =i
III
Lk1
(t) ni
III
Lk2
(t) (10)
di
III
Lk1
(t)
dt
=
V
C1
v
Lm
L
k1
(11)
di
III
Lk2
(t)
dt
=
di
III
D3
(t)
dt
=
nv
Lm
+V
C2
V
O
L
k2
. (12)
Mode IV [t
3
, t
4
]: During this transition interval, the energy
stored in magnetizing inductor L
m
releases simultaneously to
C
1
and C
2
. The current ow path is shown in Fig. 6(d). Only
diodes D
1
and D
2
are conducting. Currents i
Lk1
and i
D1
are persistently decreased because leakage energy still ows
through diode D
1
and continues charging capacitor C
1
. The
L
m
is delivering its energy through T
1
and D
2
to charge
capacitor C
2
. The energy stored in capacitors C
3
is constantly
discharged to the load R. The voltage across S
1
is the same
as previous mode. Currents i
Lk1
and i
Lm
are decreasing, but
i
D2
is increasing. This mode ends when current i
Lk1
is zero at
t = t
4
i
IV
Lm
(t) =i
IV
Lk1
(t) ni
IV
Lk2
(t) (13)
di
IV
Lk1
(t)
dt
=
V
C1
v
Lm
L
k1
(14)
di
IV
Lk2
(t)
dt
=
V
C2
+nv
Lm
L
k2
. (15)
Mode V [t
4
, t
5
]: During this interval, magnetizing inductor
L
m
is constantly transferring energy to C
2
. The current ow
path is shown in Fig. 6(e), and only diode D
2
is conducting.
The i
Lm
is decreasing due to the magnetizing inductor energy
owing continuously through the coupled inductor T
1
to sec-
ondary winding N
2
and D
2
to charge capacitor C
2
. The energy
stored in capacitors C
3
is constantly discharged to the load R.
The voltage across S
1
is the summation of V
in
and V
Lm
. This
mode ends when switch S
1
is turned on at the beginning of the
next switching period
di
V
Lm
(t)
dt
=
v
Lm
L
m
(16)
i
V
Lk1
(t) =0 (17)
di
V
Lk2
(t)
dt
=
nv
Lm
+V
C2
L
k2
. (18)
III. STEADY-STATE ANALYSIS OF PROPOSED CONVERTERS
A. CCM Operation
To simplify the steady-state analysis, only modes II and IV
are considered for CCM operation, and the leakage inductances
at primary and secondary sides are ignored. The following
equations can be written from Fig. 6(b):
v
Lm
=V
in
(19)
v
N2
=nV
in
. (20)
During mode IV, the following equations can be written:
v
Lm
= V
C1
(21)
v
N2
=V
C2
. (22)
Applying a volt-second balance on the magnetizing inductor
L
m
yields
DT
S

0
(V
in
)dt +
T
S

DT
S
(V
C1
)dt =0 (23)
DT
S

0
(nV
in
)dt +
T
S

DT
S
(V
C2
)dt =0 (24)
from which the voltage across capacitor C
1
and C
2
are obtained
as follows:
V
C1
=
D
1 D
V
in
(25)
V
C2
=
nD
1 D
V
in
. (26)
During mode II, the output voltage V
O
= V
in
+V
C1
+V
N2
+
V
C2
, as shown
V
O
= V
in
+
D
1 D
V
in
+nV
in
+
nD
1 D
V
in
=
1 +n
1 D
V
in
.
(27)
The dc voltage gain M
CCM
can be found as follows:
M
CCM
=
V
O
V
in
=
I
in
I
O
=
1 +n
1 D
. (28)
Fig. 7 shows voltage gain M
CCM
as a function of duty ratio
D by various turns ratios, and the straightness of the curve
accounts for the correction between turns ratio n and duty
CHEN et al.: BOOST CONVERTER WITH CAPACITOR MULTIPLIER AND COUPLED INDUCTOR FOR AC MODULE APPLICATIONS 1507
Fig. 7. Voltage gain M
CCM
as a function of duty ratio D by various turns
ratios, and the turns ratio versus duty ratio under voltage conversion is 8.
Fig. 8. Voltage gain M
CCM
as a function of duty ratio D for the proposed
converter, as compared with [14], [20] and [21] under CCM operation and
with n = 3.
ratio under the voltage gain M
CCM
= 8. The plot of voltage
gain M
CCM
as a function of duty ratio D of the proposed
converter is compared with three different converters [14], [20]
and [21]; all are under CCM operation and n = 3, as shown in
Fig. 8.
B. BCM Operating Condition
The valley current of the magnetizing inductor at the bound-
ary between CCM and the discontinuous-conduction mode is
equal to zero. When the proposed converter is operating in
BCM, the peak current of magnetizing inductor i
Lmp
is
i
Lmp
=
V
in
DT
S
L
m
= i
Lm
(29)
this current is similar to the ripple current of magnetizing
inductor i
Lm
. Substituting (28) into (29) yields
i
Lmp
=
I
O
R
M
CCM
DT
S
L
m
=
I
O
RD
f
S
L
m
1 D
1 +n
. (30)
Fig. 9. Boundary condition of the proposed converter with n = 3.
Under the boundary operating condition, the input current is
the highest value on the boundary load resistance R
B
. From (7),
the input peak current i
inp
is rewritten as
i
inp
= i
Lmp
+ (n + 1)i
Lk2p
(31)
where i
Lk2p
represents the peak value of the secondary winding
current of coupled inductor T
1
. When the duty ratio is 50%,
the average value of secondary winding current I
Lk2
is zero
in steady state, and the average value of magnetizing inductor
I
Lm
is half of the peak current of magnetizing inductor i
Lmp
.
Substituting (30) into (31) nds the average input current at the
boundary I
inB
to be
I
inB
=
(1 D)R
B
I
OB
D
(2 + 2n)f
S
L
m
. (32)
The boundary output current I
OB
is also presented as I
OB
=
V
O
/R
B
. The boundary normalized magnetizing inductor time
constant
LmB
is obtained as follows:

LmB
=
L
m
f
S
R
B
=
D
3
2D
2
+D
2n
2
+ 4n + 2
. (33)
The curve of
LmB
is plotted in Fig. 9. Once the
Lm
is
higher than the boundary curve
LmB
, the proposed converter
operates in CCM.
C. Voltage and Current Stresses on Active Components
Based on the operating principles, the voltage and current
stresses on the active components, such as MOSFET and
diodes, are discussed in this section. The leakage inductances
on the secondary and primary sides are ignored. During CCM
operation, the voltage stresses on S
1
and D
1
D
3
are given as
V
DS
=V
D1
=
V
O
1 +n
(34)
V
D2
=
nV
O
1 +n
(35)
V
D3
=V
O
. (36)
1508 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 4, APRIL 2013
Fig. 10. Association of magnetizing inductor L
m
, D
1
, and D
2
currents.
Since the average currents of capacitors I
C1
, I
C2
, and I
C3
are zero in the steady state, the average values of I
D1
, I
D2
, and
I
D3
are, respectively, equal to the average value of I
O
. The peak
current i
D3p
is equal to the peak current of secondary winding
i
Lkp
during mode II. The peak current of D
3
is obtained as
follows:
i
II
Lk2p
= i
D3P

2I
O
D
=
2V
O
DR
. (37)
During CCM operation, the PV panel energy ows through
the coupled inductor of the proposed converter to the output
load; hence, the average input current is equal to the average
magnetizing inductor current. The peak current of magnetizing
inductor i
II
Lmp
at mode II is obtained by
i
II
Lmp

= I
in
+
i
Lm
2
=

1 +n
(1 D)
+
DT
S
R(1 D)
2L
m
(1 +n)

I
O
.
(38)
Equation (31) depicts that the peak current of the input, the
active switch, and the diode D
1
are under BCM operation.
During CCM operation, these currents are rewritten as
i
inp
= i
DSp
= i
D1p
i
II
Lmp
+ (1 +n)i
II
Lk2p
. (39)
Substituting (37) and (38) into (39) yields the current stress over
the active switch S
1
and diode D
1
, as follows:
i
II
DSp
=i
II
D1p

1 +n
(1 D)
+
DT
S
R(1 D)
2L
m
(1 +n)
+
2(1 +n)
D

I
O
. (40)
The period of D
X
T
S
is dened as the D
2
current increasing
from zero to the peak current ni
D2p
; on the other hand, the D
1
current, i
D1p
, is decreasing from peak value current to zero.
Neglecting the transition period of mode III, the D
X
is de-
rived as
I
D1

i
II
Lmp
(D
X
T
S
)
2T
S
= I
O
(41)
D
X
=
2I
O
i
II
Lmp
. (42)
From Fig. 10, the average and the peak currents of diode D
2
are obtained, as follows:
I
D2
=
i
IV
D2p
D
X
T
S
2nT
S
+

i
IV
D2p
+I
in

i
Lm
2

(1 D D
X
)T
S
2nT
S
. (43)
TABLE I
SPECIFICATIONS OF THE PROTOTYPE
Substituting (29), (38), and (42) into (43) yields the peak
current of diode D
2
, as follows:
i
IV
D2p
=
2I
O
(1 D)

(1 +n)
(1 D)
2

DT
S
R
2L
m
(1 +n)

1 D
2
1+n
1D
+
DT
S
R(1D)
2L
m
(1+n)

I
O
n
. (44)
IV. EXPERIMENTAL RESULTS
A. Design Considerations of Proposed Converter
A 250 W experimental prototype is presented to verify the
feasibility of the proposed converter. The basic specications
are shown in Table I. The determination of component parame-
ter design and selection is as made as follows.
1) Duty Ratio and Turns Ratio: The nominal voltage gain is
8. Referring to (28) and Fig. 7, the turns ratio can be 2 to
6. When n = 1, that duty ratio is equal to 75%. A duty
ratio larger than 70% will cause conduction losses to be
signicantly increased. If turns ratio n 4 will result in
a small duty ratio, the boundary normalized magnetizing
inductor time constant
LmB
will be higher at the peak
level. Thus, n = 3 is the proper choice, and the duty ratio
D will be 50%, according to (28).
2) Magnetizing Inductor: Substituting the values of duty
ratio and turns ratio into (33), the proposed converter is
operated in BCM at 50 kHz operating frequency with
quarter-load condition such that the resistance R
q
=
650 . The boundary magnetizing inductance is found
as follows:
L
mB
=
f
S
R
q

D
3
2D
2
+D
2n
2
+ 4n + 2
= 50.78 H. (45)
The actual inductance of magnetizing inductor L
m
is
measured as 51.1 H.
3) Active Switch and Diodes: The general voltage-rating
active components can be obtained from (34)(36), as
follows:
V
DS
=V
D1
=
V
O
1 +n
=
200
1 + 3
= 50 V (46)
V
D2
=
nV
O
1 +n
=
3 200
1 + 3
= 150 V (47)
V
D3
=V
O
= 200 V. (48)
Regarding the parasitic capacitor and inductor effects on
the actual components and printed circuit board, the volt-
age rating of the MOSFET will be double the calculated
value. The IRFB4410PbF drain-source nominal voltage
CHEN et al.: BOOST CONVERTER WITH CAPACITOR MULTIPLIER AND COUPLED INDUCTOR FOR AC MODULE APPLICATIONS 1509
is 100 V, which is selected for S
1
. The diode D
1
is
STPS-30H100CW, the voltage rating of which is also
100 V. The diode D
2
is MRB20200CTG. The voltage
rating is 200 V higher than in (47), and DPG30C300HB
is a 300 V diode selected to be D
3
.
4) Switched Capacitors: The energy transfers from the input
through switched capacitors C
1
and C
2
to the output.
Calculating the minimum capacitance of the switched
capacitors depends on the maximum transferring power,
the capacitors voltage, and the operating frequency. The
voltage of C
1
and C
2
can be obtained by (25) and (26),
respectively. The estimated capacitances are
C
1

2 P
MAX
V
2
C1
f
S
=
2 250
50
2
50 10
3
= 4 F (49)
C
2

2 P
MAX
V
2
C2
f
S
=
2 250
75
2
50 10
3
= 1.8 F. (50)
In terms of low ESR, the capacitor is a low power
dissipation component during converter operation. The
ESR of an aluminum electrolytic capacitor characteristi-
cally becomes smaller as the capacitance increases. Thus,
the capacitance is selected to be much larger than the
calculated value; thus, C
1
and C
2
are 47 F, and C
3
is 100 F.
B. Estimation of Theoretical Efciency
Once the major parameters are chosen, the converter ef-
ciency can be estimated. The converter losses include conduc-
tion losses and switching losses on active switches and diodes,
power dissipation of the capacitor, and magnetic losses of the
coupled inductor, all of which are described as follows.
1) Active Switch Losses: The switching losses of active
switches are encountered at turn-off commutation. The
ON-state resistance of the active switch determines its
conduction loss. The RMS current of an active switch can
be approximated by
I
in_RMS
=
P
in
V
in

D =
250
25

0.5 = 7.07 A. (51)

The ON-state resistance of IRFB4410PbF is 10 m. Thus,
the conduction loss is obtained as follows:
P
CON
= I
2
in_RMS
R
DS_ON
= (7.07)
2
10
2
= 0.5 W.
(52)
The peak current at turn-off commutation can be approx-
imated by (40) at full load; i.e., R
F
= 160 , L
m
=
51.1 H are both substituted into (53), yielding
i
DSp

1 +n
(1 D)
+
DT
S
R(1 D)
2L
m
(1 +n)
+
2(1 +n)
D

I
O

= 26 A.
(53)
Assuming the turn-off duration is about 50 ns and the
switch-off voltage has been determined by (46), then the
switching loss is obtained as follows:
P
SW
=
I
DS_Peak
V
DS
t
off
2 T
=
26 50 50 10
9
2 20 10
6
=1.625 W. (54)
2) Diode Conduction Loss: The average current of I
D1
,
ID2
,
and I
D3
are, respectively, equal to the average value of
I
O
. The forward voltage drop of diode D
1
is equal to V
F1
:
0.8 V
MAX
; diode D
2
is equal to V
F_D2
: 0.9 V
MAX
; diode
D
3
is equal to V
F_D3
: 1.25 V
MAX
. The total conduction
loss of the diodes can be found as follows:
P
D
=
P
O
(V
F1
+V
F2
+V
F3
)
V
O
=
250(0.8 + 0.9 + 1.25)
200

= 3.7 W. (55)
3) Capacitor Loss: The capacitor loss occurs because of its
own ESR. The switched capacitors are receiving energy
from the input and delivering it to the output. The output
capacitor current can be approximated by
I
C3_RMS
=
P
O
V
O

D =
250
200

0.5 = 0.88 A (56)

I
C2_RMS
=
P
O
V
C2

D =
250
75

0.5 = 2.36 A (57)

I
C1_RMS
=
P
O
V
C1

D =
250
25

0.5 = 7.07 A. (58)

The impedance of the low-ESR-type capacitor can be
assigned as 70 m for 47 F/100 V for C
1
and C
2
; C
3
is
130 m for 100 F/400 V. Thus, the total capacitor losses
can be derived as follows:
P
C3
=I
2
C3_RMS
ESR
C3
=(0.88)
2
0.15 = 0.13 W (59)
P
C2
=I
2
C2_RMS
ESR
C2
=(2.36)
2
0.07 = 0.4 W (60)
P
C1
=I
2
C1_RMS
ESR
C1
=(7.07)
2
0.07 = 3.5 W (61)
P
CTotal
=
3

n=1
P
Cn
= 4.03 W. (62)
4) Total Converter Efciency: The enameled wire loss and
core loss of the EER-59 transformer is approximately 1
W. The estimated conversion efciency of the proposed
converter can be derived by
=
P
O
100%
(P
O
+P
CON
+P
SW
+P
D
+P
CTotal
+P
T
)
=
250100%
(250+0.5+1.625+3.7+4.03+1)
= 95.8%. (63)
1510 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 4, APRIL 2013
Fig. 11. Experimental waveforms are measured by the condition of f
S
=
50 kHz, V
in
= 25 V, and output 250 W.
C. Measurement Waveforms and Results
The prototype sample is made and measured. The results
reveal that high step-up voltage gain is achieved. Fig. 11 shows
the voltage and current waveforms, as measured from coupled
inductor T
1
, switch S
1
, diodes D
1
D
3
, and output voltage
V
O
. These experimental waveforms agree with the operating
Fig. 12. Measured efciency of proposed converter.
principles and the steady-state analysis. Fig. 12 shows that
the maximum efciency is up to 97.3% at about 50 W. The
full-load efciency still reaches 94.8%, which is just a 1%
deviation from the theoretical efciency of 95.8%. However,
the low ON-state resistance of the active switch and the low
forward voltage drop are less than those of the conventional
boost and Zeta converters. Meanwhile, the capacitors ESR is
one consideration factor that affects overall efciency.
V. CONCLUSION
The proposed converter employs the turns ratio of the cou-
pled inductor to achieve high step-up voltage gain; based on
the oating switch structure of the Zeta converter, this design
successfully isolates the energy from the PV panel when the
converter is non-operational, which helps to prevent injury to
humans or damage to facilities. The energy of the leakage
inductor of the coupled inductor is recycled, and the volt-
age stress across the active switch S
1
has been restrained;
these merits mean low ON-state resistance R
DS(ON)
can be
selected, which effectively improves the efciency of the pro-
posed converter. The experimental results show that applying a
coupled-inductor turns ratio of n = 3 to the eight-times step-up
voltage-conversion ratio yields a maximum efciency of 97.3%
measured at 20% load, and the full-load efciency remains
at 94.8%.
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Shih-Ming (Orion) Chen (S01) was born in
Tainan, Taiwan. He received the B.S. and Ph.D. de-
grees in electrical engineering from National Cheng
Kung University, Tainan, Taiwan, in 2003 and 2011,
respectively.
Since 2011, he is a doctoral fellow of Green
Energy Electronics Research Center (GEERC) in
the Department of Electrical Engineering, National
Cheng Kung University, Tainan. His research inter-
ests are dc-to-dc converters, photovoltaic inverter,
switching power supply, uninterrupted power sys-
tem, CCFL/EEFL inverter design, and LED driver and chromatics control.
Tsorng-Juu (Peter) Liang (M93SM10) was born
in Kaohsiung, Taiwan. He received the B.S. degree
in electrophysics from National Chiao-Tung Uni-
versity, Hsinchu, Taiwan, in 1985, and the M.S.
and Ph.D. degrees in electrical engineering from the
University of Missouri, Columbia, in 1990 and 1993,
respectively.
He is currently a Professor of Electrical Engi-
neering and Director of Green Energy Electronics
Research Center (GEERC), National Cheng Kung
University (NCKU), Tainan, Taiwan. Currently, he is
the Associate Editor of IEEE TRANSACTIONS ON POWER ELECTRONICS, the
Associate Editor of IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSI,
and the Technical Committee Chair of IEEE CAS Systems Power and Energy
Circuits and Systems Technical Committee. His research interests include high
efciency power converters, high efciency lighting systems, renewable energy
conversion, and power ICs design.
Lung-Sheng Yang was born in Tainan, Taiwan,
in 1967. He received the B.S. degree in electrical
engineering from National Taiwan Institute of Tech-
nology, Taipei, Taiwan, in 1990, the M.S. degree
in electrical engineering from National Tsing Hua
University, Hsinchu, Taiwan, in 1992, and the Ph.D.
degree in electrical engineering fromNational Cheng
Kung University, Tainan, in 2007.
Now, he is an Assistant Professor in the Depart-
ment of Electrical Engineering, Far East University,
Tainan. His research interests are power factor cor-
rection, dc-dc converters, renewable energy conversion, and electronic ballast.
Jiann-Fuh Chen (S79M80) was born in Chung-
Hua, Taiwan, in 1955. He received the B.S., M.S.,
and Ph.D. degrees in electrical engineering from
National Cheng Kung University (NCKU), Tainan,
Taiwan, in 1978, 1980, and 1985, respectively.
Since 1980, he has been with the Department
of Electrical Engineering at NCKU, where he is
currently a professor and the director of department
of electrical engineering. His research interests are
power electronics and energy conversion.