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Cc1350 Simplelink™ Ultra-Low-Power Dual-Band Wireless Mcu: 1 Device Overview

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CC1350
SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016

CC1350 SimpleLink™ Ultra-Low-Power Dual-Band Wireless MCU


1 Device Overview

1.1
1
Features
• World's First Dual-Band (Sub-1 GHz and 2.4 GHz) SPACER
Wireless Microcontroller SPACER
• Microcontroller • External System
– Powerful ARM® Cortex®-M3 Processor – On-Chip Internal DC-DC Converter
– EEMBC CoreMark® Score: 142 – Seamless Integration With the SimpleLink™
– EEMBC ULPBench™ Score: 158 CC1190 and CC2592 Range Extenders
– Clock Speed up to 48-MHz • Low Power
– 128KB of In-System Programmable Flash – Wide Supply Voltage Range: 1.8 to 3.8 V
– 8KB of SRAM for Cache – RX: 5.4 mA (Sub-1 GHz), 6.4 mA (Bluetooth low
(or as General-Purpose RAM) energy, 2.4 GHz)
– 20KB of Ultra-Low-Leakage SRAM – TX at +10 dBm: 13.4 mA (Sub-1 GHz)
– 2-Pin cJTAG and JTAG Debugging – TX at +9 dBm: 22.3 mA (Bluetooth low energy,
– Supports Over-the-Air (OTA) Update 2.4 GHz)
• Ultra-Low-Power Sensor Controller – TX at +0 dBm: 10.5 mA (Bluetooth low energy,
– Can Run Autonomously From the Rest of the 2.4 GHz)
System – Active-Mode MCU 48 MHz Running Coremark:
– 16-Bit Architecture 2.5 mA (51 µA/MHz)
– 2KB of Ultra-Low-Leakage SRAM for Code and – Active-Mode MCU: 48.5 CoreMark/mA
Data – Active-Mode Sensor Controller at 24 MHz:
• Efficient Code-Size Architecture, Placing Parts of 0.4 mA + 8.2 µA/MHz
TI-RTOS, Drivers, Bluetooth® low energy – Sensor Controller, One Wakeup Every Second
Controller and Bootloader in ROM Performing One 12-Bit ADC Sampling: 0.95 µA
• RoHS-Compliant Package – Standby: 0.7 µA (RTC Running and RAM and
– 7-mm × 7-mm RGZ VQFN48 (30 GPIOs) CPU Retention)
– 5-mm × 5-mm RHB VQFN32 (15 GPIOs) – Shutdown: 185 nA (Wakeup on External Events)
– 4-mm × 4-mm RSM VQFN32 (10 GPIOs) • RF Section
• Peripherals – 2.4-GHz RF Transceiver Compatible With
Bluetooth low energy 4.2 Specification
– All Digital Peripheral Pins Can Be Routed to
Any GPIO – Excellent Receiver Sensitivity –124 dBm Using
Long-Range Mode, –110 dBm at 50 kbps
– Four General-Purpose Timer Modules (Sub-1 GHz),
(Eight 16-Bit or Four 32-Bit Timers, PWM Each) –87 dBm at Bluetooth low energy
– 12-Bit ADC, 200 ksamples/s, 8-Channel Analog – Excellent Selectivity (±100 kHz): 56 dB
MUX
– Excellent Blocking Performance (±10 MHz):
– Continuous Time Comparator 90 dB
– Ultra-Low-Power Clocked Comparator – Programmable Output Power up to +15 dBm
– Programmable Current Source (Sub-1 GHz) and +9 dBm at 2.4 GHz (Bluetooth
– UART low energy)
– 2× SSI (SPI, MICROWIRE, TI) – Single-Ended or Differential RF Interface
– I2C, I2S – Suitable for Systems Targeting Compliance With
– Real-Time Clock (RTC) Worldwide Radio Frequency Regulations
– AES-128 Security Module – ETSI EN 300 220, EN 303 204 (Europe)
– True Random Number Generator (TRNG) – EN 300 440 Class 2 (Europe)
– Support for Eight Capacitive Sensing Buttons – EN 300 328 (Europe)
– Integrated Temperature Sensor – FCC CFR47 Part 15 (US)
SPACER – ARIB STD-T66 (Japan)
1
SPACER – ARIB STD-T108 (Japan)

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CC1350
SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com

– Wireless M-Bus and Selected IEEE® 802.15.4g – Packet Sniffer PC Software


PHY – Sensor Controller Studio
• Tools and Development Environment – SmartRF™ Studio
– Full-Feature and Low-Cost Development Kits – SmartRF Flash Programmer 2
– Multiple Reference Designs for Different RF – IAR Embedded Workbench® for ARM
Configurations – Code Composer Studio™

1.2 Applications
• 315-, 433-, 470-, 500-, 779-, 868-, 915-, • Wireless Healthcare Applications
920-MHz and 2.4-GHz ISM and SRD Systems • Wireless Sensor Networks
• Low-Power Wireless Systems • Active RFID
With 50-kHz to 5-MHz Channel Spacing • IEEE 802.15.4g, IP-Enabled Smart Objects
• Home and Building Automation (6LoWPAN), Wireless M-Bus, KNX Systems,
• Wireless Alarm and Security Systems Wi-SUN™, and Proprietary Systems
• Industrial Monitoring and Control • Energy-Harvesting Applications
• Bluetooth low energy Beacon Management • Electronic Shelf Label (ESL)
• Bluetooth low energy Commissioning • Long-Range Sensor Applications
• Smart Grid and Automatic Meter Reading • Heat-Cost Allocators

1.3 Description
The CC1350 is a member of the CC26xx and CC13xx family of cost-effective, ultra-low-power, 2.4-GHz
and Sub-1 GHz RF devices from Texas Instruments™. Very low active RF and microcontroller (MCU)
current consumption, in addition to flexible low-power modes, provide excellent battery lifetime and allow
long-range operation on small coin-cell batteries and in energy-harvesting applications.
The CC1350 is the first device in the CC13xx and CC26xx family of cost-effective, ultra-low-power
wireless MCUs capable of handling both Sub-1 GHz and 2.4-GHz RF frequencies. The CC1350 device
combines a flexible, very low-power RF transceiver with a powerful 48-MHz ARM® Cortex®-M3
microcontroller in a platform supporting multiple physical layers and RF standards. A dedicated Radio
Controller (Cortex®-M0) handles low-level RF protocol commands that are stored in ROM or RAM, thus
ensuring ultra-low power and flexibility to handle both Sub-1 GHz protocols and 2.4 GHz protocols (for
example Bluetooth® low energy). This enables the combination of a Sub-1 GHz communication solution
that offers the best possible RF range together with a Bluetooth low energy smartphone connection that
enables great user experience through a phone application. The Sub-1 GHz only device in this family is
the CC1310.
The CC1350 device is a highly integrated, true single-chip solution incorporating a complete RF system
and an on-chip DC-DC converter.
Sensors can be handled in a very low-power manner by a dedicated autonomous ultra-low-power MCU
that can be configured to handle analog and digital sensors; thus the main MCU (Cortex-M3) can
maximize sleep time.
The CC1350 power and clock management and radio systems require specific configuration and handling
by software to operate correctly, which has been implemented in the TI-RTOS. TI recommends using this
software framework for all application development on the device. The complete TI-RTOS and device
drivers are offered in source code free of charge.

Device Information (1)


PART NUMBER PACKAGE BODY SIZE (NOM)
CC1350F128RGZ VQFN (48) 7.00 mm × 7.00 mm
CC1350F128RHB VQFN (32) 5.00 mm × 5.00 mm
CC1350F128RSM VQFN (32) 4.00 mm × 4.00 mm
(1) For more information, see Section 9.

2 Device Overview Copyright © 2016, Texas Instruments Incorporated


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1.4 Functional Block Diagram


Figure 1-1 shows a block diagram for the CC1350 device.

SimpleLinkTM CC1350 Wireless MCU


cJTAG RF core
Main CPU: ROM
ADC
ADC
128-KB
ARM® Flash
Cortex®-M3 Digital PLL
DSP Modem
8-KB
4-KB
Cache ARM® SRAM
20-KB Cortex®-M0 ROM
SRAM

General Peripherals / Modules Sensor Controller

I 2C 4x 32-Bit Timers Sensor Controller


Engine
UART 2x SSI (SPI,µW,TI)
12-Bit ADC, 200ks/s
I2S Watchdog Timer
2x Analog Comparators
10 / 15 / 30 GPIOs TRNG
SPI / I2C Digital Sensor IF
AES Temp. / Batt. Monitor
Constant Current Source
32 ch. PDMA RTC
Time-to-Digital Converter

DC-DC Converter 2-KB SRAM

Copyright © 2016, Texas Instruments Incorporated

Figure 1-1. CC1350 Block Diagram

Copyright © 2016, Texas Instruments Incorporated Device Overview 3


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Table of Contents
1 Device Overview ......................................... 1 5.20 Thermal Characteristics ............................. 25
1.1 Features .............................................. 1 5.21 Timing and Switching Characteristics ............... 25
1.2 Applications ........................................... 2 5.22 Typical Characteristics .............................. 29
1.3 Description ............................................ 2 5.23 Typical Characteristics – Sub-1 GHz ............... 30
1.4 Functional Block Diagram ............................ 3 5.24 Typical Characteristics – 2.4 GHz .................. 35
2 Revision History ......................................... 5 6 Detailed Description ................................... 37
3 Device Comparison ..................................... 6 6.1 Overview ............................................ 37
3.1 Related Products ..................................... 6 6.2 Main CPU ........................................... 37
4 Terminal Configuration and Functions .............. 7 6.3 RF Core ............................................. 38
4.1 Pin Diagram – RSM Package ........................ 7 6.4 Sensor Controller ................................... 39
4.2 Signal Descriptions – RSM Package ................. 8 6.5 Memory .............................................. 40
4.3 Pin Diagram – RHB Package ........................ 9 6.6 Debug ............................................... 40
4.4 Signal Descriptions – RHB Package ................ 10 6.7 Power Management ................................. 41
4.5 Pin Diagram – RGZ Package ....................... 11 6.8 Clock Systems ...................................... 42
4.6 Signal Descriptions – RGZ Package ................ 12 6.9 General Peripherals and Modules .................. 42
5 Specifications ........................................... 14 6.10 Voltage Supply Domains ............................ 43
5.1 Absolute Maximum Ratings ......................... 14 6.11 System Architecture ................................. 43
5.2 ESD Ratings ........................................ 14 7 Application, Implementation, and Layout ......... 44
5.3 Recommended Operating Conditions ............... 14 7.1 SimplelinkTM CC1350 LaunchPad™ Bluetooth® and
5.4 Power Consumption Summary...................... 15 Sub-1 GHz Long Range Wireless Development Kit 44
5.5 RF Characteristics .................................. 16 8 Device and Documentation Support ............... 45
5.6 Receive (RX) Parameters, 861 MHz to 1054 MHz . 16 8.1 Device Nomenclature ............................... 45
5.7 Receive (RX) Parameters, 431 MHz to 527 MHz .. 17 8.2 Tools and Software ................................. 46
5.8 Transmit (TX) Parameters, 861 MHz to 1054 MHz . 19 8.3 Documentation Support ............................. 47
5.9 Transmit (TX) Parameters, 431 MHz to 527 MHz .. 20 8.4 Texas Instruments Low-Power RF Website ........ 47
5.10 1-Mbps GFSK (Bluetooth low energy) – RX ........ 20 8.5 Low-Power RF eNewsletter ......................... 47
5.11 1-Mbps GFSK (Bluetooth low energy) – TX ........ 21 8.6 Additional Information ............................... 47
5.12 PLL Parameters ..................................... 22 8.7 Community Resources .............................. 48
5.13 ADC Characteristics................................. 22 8.8 Trademarks.......................................... 48
5.14 Temperature Sensor ................................ 23 8.9 Electrostatic Discharge Caution ..................... 49
5.15 Battery Monitor ...................................... 23 8.10 Export Control Notice ............................... 49
5.16 Continuous Time Comparator ....................... 23 8.11 Glossary ............................................. 50
5.17 Low-Power Clocked Comparator ................... 24 9 Mechanical, Packaging, and Orderable
Information .............................................. 50
5.18 Programmable Current Source ..................... 24
5.19 DC Characteristics .................................. 24
9.1 Packaging Information .............................. 50

4 Table of Contents Copyright © 2016, Texas Instruments Incorporated


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2 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from June 20, 2016 to November 20, 2016 Page

• Added 4-mm × 4-mm and 5-mm × 5-mm packages ............................................................................. 1


• Added Figure 4-1 ..................................................................................................................... 7
• Added Figure 4-2 ..................................................................................................................... 9
• Added support for split supply rail to Section 5.1 ............................................................................... 14
• Added OOK modulation support to Section 5.4 ................................................................................. 15
• Added OOK modulation sensitivity to Section 5.6 .............................................................................. 17
• Added receive parameters for 431-MHz to 527-MHz band in Section 5.7 .................................................. 17
• Added transmit parameters for 431-MHz to 527-MHz band in Section 5.9 ................................................. 20
• Changed ADC reference voltage to correct value in Section 5.13 ........................................................... 23
• Added thermal characteristics for RHB and RSM packages in Section 5.20 ............................................... 25
• Added Figure 5-10 .................................................................................................................. 30
• Added Section 6.10 ................................................................................................................. 43
• Changed Figure 8-1 ................................................................................................................. 45

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3 Device Comparison
Table 3-1 lists the device family overview.

Table 3-1. Device Family Overview


FLASH RAM
DEVICE PHY SUPPORT GPIOs PACKAGE SIZE
(KB) (KB)
Proprietary, Wireless M-Bus, IEEE 802.15.4g,
CC1350F128RGZ 128 20 30 7 mm × 7 mm
Bluetooth low energy
Proprietary, Wireless M-Bus, IEEE 802.15.4g,
CC1350F128RHB 128 20 15 5 mm × 5 mm
Bluetooth low energy
Proprietary, Wireless M-Bus, IEEE 802.15.4g,
CC1350F128RSM 128 20 10 4 mm × 4 mm
Bluetooth low energy

3.1 Related Products


Wireless Connectivity The wireless connectivity portfolio offers a wide selection of low-power RF
solutions suitable for a broad range of application. The offerings range from fully customized
solutions to turnkey offerings with precertified hardware and software (protocol).
Sub-1 GHz Long-range, low power wireless connectivity solutions are offered in a wide range of
Sub-1 GHz ISM bands.
Companion Products Review products that are frequently purchased or used with this product.
Reference Designs for CC1350 The TI Designs Reference Design Library is a robust reference design
library spanning analog, embedded processor, and connectivity. Created by TI experts to
help you jump-start your system design, all TI Designs include schematic or block diagrams,
BOMs and design files to speed your time to market. Search and download designs at
ti.com/tidesigns.

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4 Terminal Configuration and Functions

4.1 Pin Diagram – RSM Package


Figure 4-1 shows the RSM pinout diagram.

19 VDDS_DCDC
18 DCDC_SW
21 RESET_N
24 DIO_7
23 DIO_6
22 DIO_5

20 VSS

17 VSS
DIO_8 25 16 DIO_4
DIO_9 26 15 DIO_3
VDDS 27 14 JTAG_TCKC
VDDR 28 13 JTAG_TMSC
VSS 29 12 DCOUPL
X24M_N 30 11 VDDS2
X24M_P 31 10 DIO_2
VDDR_RF 32 9 DIO_1
1
2
3
4
5
6
7
8
RF_P
RF_N
VSS
RX_TX
X32K_Q1
X32K_Q2
VSS
DIO_0

Figure 4-1. RSM (4-mm × 4-mm) Pinout, 0.4-mm Pitch


Top View

I/O pins marked in Figure 4-1 in bold have high-drive capabilities; they are as follows:
• Pin 8, DIO_0
• Pin 9, DIO_1
• Pin 10, DIO_2
• Pin 13, JTAG_TMSC
• Pin 15, DIO_3
• Pin 16, DIO_4
I/O pins marked in Figure 4-1 in italics have analog capabilities; they are as follows:
• Pin 22, DIO_5
• Pin 23, DIO_6
• Pin 24, DIO_7
• Pin 25, DIO_8
• Pin 26, DIO_9

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4.2 Signal Descriptions – RSM Package

Table 4-1. Signal Descriptions – RSM Package


PIN
TYPE DESCRIPTION
NAME NO.
DCDC_SW 18 Power Output from internal DC-DC (1)
DCOUPL 12 Power 1.27-V regulated digital-supply decoupling capacitor (2)
DIO_0 8 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_1 9 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_2 10 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_3 15 Digital I/O GPIO, high-drive capability, JTAG_TDO
DIO_4 16 Digital I/O GPIO, high-drive capability, JTAG_TDI
DIO_5 22 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_6 23 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_7 24 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_8 25 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_9 26 Digital or analog I/O GPIO, Sensor Controller, analog
EGP – Power Ground; exposed ground pad
JTAG_TMSC 13 Digital I/O JTAG TMSC
JTAG_TCKC 14 Digital I/O JTAG TCKC
RESET_N 21 Digital input Reset, active low. No internal pullup.
Negative RF input signal to LNA during RX
RF_N 2 RF I/O
Negative RF output signal from PA during TX
Positive RF input signal to LNA during RX
RF_P 1 RF I/O
Positive RF output signal from PA during TX
RX_TX 4 RF I/O Optional bias pin for the RF LNA
VDDS 27 Power 1.8-V to 3.8-V main chip supply (1)
VDDS2 11 Power 1.8-V to 3.8-V GPIO supply (1)
VDDS_DCDC 19 Power 1.8-V to 3.8-V DC-DC supply
VDDR 28 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (3)
VDDR_RF 32 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (4)
3, 7, 17,
VSS Power Ground
20, 29
X32K_Q1 5 Analog I/O 32-kHz crystal oscillator pin 1
X32K_Q2 6 Analog I/O 32-kHz crystal oscillator pin 2
X24M_N 30 Analog I/O 24-MHz crystal oscillator pin 1
X24M_P 31 Analog I/O 24-MHz crystal oscillator pin 2
(1) See the technical reference manual listed in Section 8.3 for more details.
(2) Do not supply external circuitry from this pin.
(3) If internal DC-DC is not used, this pin is supplied internally from the main LDO.
(4) If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO.

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4.3 Pin Diagram – RHB Package


Figure 4-2 shows the RHB pinout diagram.

18 VDDS_DCDC
17 DCDC_SW
19 RESET_N
24 DIO_11
23 DIO_10
22 DIO_9
21 DIO_8
20 DIO_7
DIO_12 25 16 DIO_6
DIO_13 26 15 DIO_5
DIO_14 27 14 JTAG_TCKC
VDDS 28 13 JTAG_TMSC
VDDR 29 12 DCOUPL
X24M_N 30 11 VDDS2
X24M_P 31 10 DIO_4
VDDR_RF 32 9 DIO_3
1
2
3
4
5
6
7
8
RF_P
RF_N
RX_TX
X32K_Q1
X32K_Q2
DIO_0
DIO_1
DIO_2

Figure 4-2. RHB (5-mm × 5-mm) Pinout, 0.5-mm Pitch


Top View

I/O pins marked in Figure 4-2 in bold have high-drive capabilities; they are as follows:
• Pin 8, DIO_2
• Pin 9, DIO_3
• Pin 10, DIO_4
• Pin 15, DIO_5
• Pin 16, DIO_6
I/O pins marked in Figure 4-2 in italics have analog capabilities; they are as follows:
• Pin 20, DIO_7
• Pin 21, DIO_8
• Pin 22, DIO_9
• Pin 23, DIO_10
• Pin 24, DIO_11
• Pin 25, DIO_12
• Pin 26, DIO_13
• Pin 27, DIO_14

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4.4 Signal Descriptions – RHB Package

Table 4-2. Signal Descriptions – RHB Package


PIN
TYPE DESCRIPTION
NAME NO.
DCDC_SW 17 Power Output from internal DC-DC (1)
DCOUPL 12 Power 1.27-V regulated digital-supply decoupling (2)
DIO_0 6 Digital I/O GPIO, Sensor Controller
DIO_1 7 Digital I/O GPIO, Sensor Controller
DIO_2 8 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_3 9 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_4 10 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_5 15 Digital I/O GPIO, high-drive capability, JTAG_TDO
DIO_6 16 Digital I/O GPIO, high-drive capability, JTAG_TDI
DIO_7 20 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_8 21 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_9 22 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_10 23 Digital or analog I/O GPIO, Sensor Controller, Analog
DIO_11 24 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_12 25 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_13 26 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_14 27 Digital or analog I/O GPIO, Sensor Controller, analog
EGP – Power Ground; exposed ground pad
JTAG_TMSC 13 Digital I/O JTAG TMSC, high-drive capability
JTAG_TCKC 14 Digital I/O JTAG TCKC
RESET_N 19 Digital input Reset, active low. No internal pullup.
Negative RF input signal to LNA during RX
RF_N 2 RF I/O
Negative RF output signal from PA during TX
Positive RF input signal to LNA during RX
RF_P 1 RF I/O
Positive RF output signal from PA during TX
RX_TX 3 RF I/O Optional bias pin for the RF LNA
VDDR 29 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (3)
VDDR_RF 32 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (4)
VDDS 28 Power 1.8-V to 3.8-V main chip supply (1)
VDDS2 11 Power 1.8-V to 3.8-V GPIO supply (1)
VDDS_DCDC 18 Power 1.8-V to 3.8-V DC-DC supply
X24M_N 30 Analog I/O 24-MHz crystal oscillator pin 1
X24M_P 31 Analog I/O 24-MHz crystal oscillator pin 2
X32K_Q1 4 Analog I/O 32-kHz crystal oscillator pin 1
X32K_Q2 5 Analog I/O 32-kHz crystal oscillator pin 2
(1) For more details, see the technical reference manual listed in Section 8.3.
(2) Do not supply external circuitry from this pin.
(3) If internal DC-DC is not used, this pin is supplied internally from the main LDO.
(4) If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO.

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4.5 Pin Diagram – RGZ Package


Figure 4-3 shows the RGZ pinout diagram.

34 VDDS_DCDC

25 JTAG_TCKC
33 DCDC_SW
35 RESET_N
36 DIO_23

32 DIO_22
31 DIO_21
30 DIO_20
29 DIO_19
28 DIO_18
27 DIO_17
26 DIO_16
DIO_24 37 24 JTAG_TMSC
DIO_25 38 23 DCOUPL
DIO_26 39 22 VDDS3
DIO_27 40 21 DIO_15
DIO_28 41 20 DIO_14
DIO_29 42 19 DIO_13
DIO_30 43 18 DIO_12
VDDS 44 17 DIO_11
VDDR 45 16 DIO_10
X24M_N 46 15 DIO_9
X24M_P 47 14 DIO_8
VDDR_RF 48 13 VDDS2
DIO_5 10
DIO_6 11
DIO_7 12
1
2
3
4
5
6
7
8
9
RF_P
RF_N
RX_TX
X32K_Q1
X32K_Q2
DIO_1
DIO_2
DIO_3
DIO_4

Figure 4-3. RGZ (7-mm × 7-mm) Pinout, 0.5-mm Pitch


Top View

I/O pins marked in Figure 4-3 in bold have high-drive capabilities; they are as follows:
• Pin 10, DIO_5
• Pin 11, DIO_6
• Pin 12, DIO_7
• Pin 24, JTAG_TMSC
• Pin 26, DIO_16
• Pin 27, DIO_17
I/O pins marked in Figure 4-3 in italics have analog capabilities; they are as follows:
• Pin 36, DIO_23
• Pin 37, DIO_24
• Pin 38, DIO_25
• Pin 39, DIO_26
• Pin 40, DIO_27
• Pin 41, DIO_28
• Pin 42, DIO_29
• Pin 43, DIO_30

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4.6 Signal Descriptions – RGZ Package

Table 4-3. Signal Descriptions – RGZ Package


PIN
TYPE DESCRIPTION
NAME NO.
DCDC_SW 33 Power Output from internal DC-DC (1) (2)
DCOUPL 23 Power 1.27-V regulated digital-supply (decoupling capacitor) (2)
DIO_1 6 Digital I/O GPIO, Sensor Controller
DIO_2 7 Digital I/O GPIO, Sensor Controller
DIO_3 8 Digital I/O GPIO, Sensor Controller
DIO_4 9 Digital I/O GPIO, Sensor Controller
DIO_5 10 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_6 11 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_7 12 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_8 14 Digital I/O GPIO
DIO_9 15 Digital I/O GPIO
DIO_10 16 Digital I/O GPIO
DIO_11 17 Digital I/O GPIO
DIO_12 18 Digital I/O GPIO
DIO_13 19 Digital I/O GPIO
DIO_14 20 Digital I/O GPIO
DIO_15 21 Digital I/O GPIO
DIO_16 26 Digital I/O GPIO, JTAG_TDO, high-drive capability
DIO_17 27 Digital I/O GPIO, JTAG_TDI, high-drive capability
DIO_18 28 Digital I/O GPIO
DIO_19 29 Digital I/O GPIO
DIO_20 30 Digital I/O GPIO
DIO_21 31 Digital I/O GPIO
DIO_22 32 Digital I/O GPIO
DIO_23 36 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_24 37 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_25 38 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_26 39 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_27 40 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_28 41 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_29 42 Digital or analog I/O GPIO, Sensor Controller, analog
DIO_30 43 Digital or analog I/O GPIO, Sensor Controller, analog
EGP – Power Ground; exposed ground pad
JTAG_TMSC 24 Digital I/O JTAG TMSC, high-drive capability
JTAG_TCKC 25 Digital I/O JTAG TCKC (3)
RESET_N 35 Digital input Reset, active-low. No internal pullup.
Negative RF input signal to LNA during RX
RF_N 2 RF I/O
Negative RF output signal from PA during TX
Positive RF input signal to LNA during RX
RF_P 1 RF I/O
Positive RF output signal from PA during TX
VDDR 45 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (4)

(1) See technical reference manual listed in Section 8.3 for more details.
(2) Do not supply external circuitry from this pin.
(3) For design consideration regrading noise immunity for this pin, see the JTAG Interface chapter in the CC13xx, CC26xx SimpleLink™
Wireless MCU Technical Reference Manual.
(4) If internal DC-DC is not used, this pin is supplied internally from the main LDO.
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Table 4-3. Signal Descriptions – RGZ Package (continued)


PIN
TYPE DESCRIPTION
NAME NO.
VDDR_RF 48 Power 1.7-V to 1.95-V supply, connect to output of internal DC-DC (2) (5)
VDDS 44 Power 1.8-V to 3.8-V main chip supply (1)
VDDS2 13 Power 1.8-V to 3.8-V DIO supply (1)
VDDS3 22 Power 1.8-V to 3.8-V DIO supply (1)
VDDS_DCDC 34 Power 1.8-V to 3.8-V DC-DC supply
X24M_N 46 Analog I/O 24-MHz crystal oscillator pin 1
X24M_P 47 Analog I/O 24-MHz crystal oscillator pin 2
RX_TX 3 RF I/O Optional bias pin for the RF LNA
X32K_Q1 4 Analog I/O 32-kHz crystal oscillator pin 1
X32K_Q2 5 Analog I/O 32-kHz crystal oscillator pin 2
(5) If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO.

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5 Specifications

5.1 Absolute Maximum Ratings


over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN MAX UNIT
VDDS,
VDDS2, Supply voltage –0.3 4.1 V
and VDDS3
Voltage on any digital pin (3) –0.3 VDDSn + 0.3, max 4.1 V
Voltage on crystal oscillator pins X32K_Q1, X32K_Q2,
–0.3 VDDR + 0.3, max 2.25 V
X24M_N, and X24M_P
Voltage scaling enabled –0.3 VDDS
Voltage on ADC
Vin Voltage scaling disabled, internal reference –0.3 1.49 V
input
Voltage scaling disabled, VDDS as reference –0.3 VDDS / 2.9
Input RF level 10 dBm
Tstg Storage temperature –40 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to ground, unless otherwise noted.
(3) Each pin is referenced to a specific VDDSn (VDDS, VDDS2 or VDDS3). For a pin-to-VDDS mapping table, see Table 6-3.

5.2 ESD Ratings


VALUE UNIT
(1)
Human body model (HBM), per ANSI/ESDA/JEDEC JS001 All pins ±3000
VESD Electrostatic discharge V
Charged device model (CDM), per JESD22-C101 (2) All pins ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

5.3 Recommended Operating Conditions


over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Ambient temperature –40 85 °C
For operation in battery-powered and 3.3-V
Operating supply voltage (VDDS) systems (internal DC-DC can be used to 1.8 3.8 V
minimize power consumption)
Rising supply voltage slew rate 0 100 mV/µs
Falling supply voltage slew rate 0 20 mV/µs
(1)
Falling supply voltage slew rate, with low-power flash setting 3 mV/µs
(2) No limitation for negative temperature
Positive temperature gradient in standby 5 °C/s
gradient, or outside standby mode
(1) For small coin-cell batteries, with high worst-case end-of-life equivalent source resistance, a 22-µF VDDS input capacitor must be used
to ensure compliance with this slew rate.
(2) Applications using RCOSC_LF as sleep timer must also consider the drift in frequency caused by a change in temperature (see
Section 5.21.3.4).

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5.4 Power Consumption Summary


Measured on the Texas Instruments CC1310EM-7XD-7793 reference design unless otherwise noted. Tc = 25°C, VDDS = 3.6 V
with DC-DC enabled, unless otherwise noted. Using boost mode (increasing VDDR to 1.95 V), will increase currents in this
table by 15% (does not apply to TX 14-dBm setting where this current is already included).
PARAMETER TEST CONDITIONS TYP UNIT
Reset. RESET_N pin asserted or VDDS below power-on-reset
100
threshold nA
Shutdown. No clocks running, no retention 185
Standby. With RTC, CPU, RAM, and (partial) register retention.
0.7
RCOSC_LF
Standby. With RTC, CPU, RAM, and (partial) register retention. µA
0.8
XOSC_LF
Idle. Supply Systems and RAM powered. 570
Active. MCU running CoreMark at 48 MHz 1.2 mA + 25.5 µA/MHz
Active. MCU running CoreMark at 48 MHz 2.5
mA
Active. MCU running CoreMark at 24 MHz 1.9
Radio RX, measured on CC1350EM-7XD-Dual Band reference
5.4 mA
design, 868 MHz
Radio RX, measured on CC1350EM-7XD-Dual Band reference
6.4 mA
Core current design, Bluetooth low energy, 2440 MHz
Icore
consumption Radio TX, 10-dBm output power, (G)FSK, 868 MHz 13.4 mA
Radio TX, 10-dBm output power, measured on CC1350EM-7XD-
14.2 mA
DualBand reference design, 868 MHz
Radio TX, OOK modulation, 10-dBm output power, AVG, 868 MHz 11.2 mA
Radio TX, boost mode (VDDR = 1.95 V), 14-dBm output power,
23.5 mA
(G)FSK, 868 MHz
Radio TX, boost mode (VDDR = 1.95 V), 14-dBm output power,
measured on CC1350EM-7XD-Dual Band reference design, 868 24.4 mA
MHz
Radio TX, OOK modulation, boost mode (VDDR = 1.95 V), 14-dBm,
14.8 mA
AVG, 868 MHz
Radio TX Bluetooth low energy, 0-dBm output power, measured on
10.5 mA
CC1350EM-7XD-DualBand reference design, 2440 MHz
Radio TX Bluetooth low energy, boost mode (VDDR = 1.95 V), 9-
dBm output power, measured on CC1350EM-7XD-Dual Band 22.3 mA
reference design, 2440 MHz
Radio TX, boost mode (VDDR = 1.95 V), 15-dBm output power,
25.1 mA
(G)FSK, measured on CC1310EM-7XD-4251, 433.92 MHz
Radio TX, 10-dBm output power, measured on CC1310EM-7XD-
13.2 mA
4251, 433.92 MHz
PERIPHERAL CURRENT CONSUMPTION
Peripheral power
Delta current with domain enabled 20
domain
Serial power
Delta current with domain enabled 13
domain
Delta current with power domain enabled,
RF core 237
clock enabled, RF core idle
Iperi µDMA Delta current with clock enabled, module idle 130 µA
Timers Delta current with clock enabled, module idle 113
I2C Delta current with clock enabled, module idle 12
I2S Delta current with clock enabled, module idle 36
SSI Delta current with clock enabled, module idle 93
UART Delta current with clock enabled, module idle 164

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5.5 RF Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER MIN TYP MAX UNIT
(287) (351)
(359) (439)
431 527
Frequency bands (1) MHz
(718) (878)
861 1054
2152 2635
(1) For more information, see the CC1350 SimpleLink Wireless MCU Silicon Errata.

5.6 Receive (RX) Parameters, 861 MHz to 1054 MHz


Measured on the Texas Instruments CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC
enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX
and TX path.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Data rate 50 kbps
50 kbps, GFSK, 25-kHz deviation, 100-kHz RX
Data rate offset tolerance,
bandwidth (same modulation format as IEEE 802.15.4g 1600 ppm
IEEE 802.15.4g PHY
mandatory mode), BER = 10–3
Data rate step size 1.5 bps
Digital channel filter programmable
Using VCO divide by 5 setting 40 4000 kHz
bandwidth
50 kbps, GFSK, 25-kHz deviation, 100-kHz RX
Receiver sensitivity, 50 kbps bandwidth (same modulation format as IEEE 802.15.4g –109 dBm
mandatory mode), BER = 10–2 868 MHz and 915 MHz
50 kbps, GFSK, 25-kHz deviation, 100-kHz RX
bandwidth (same modulation format as IEEE 802.15.4g
Receiver sensitivity, 50 kbps –110 dBm
mandatory mode), BER = 10–2 868 MHz and 915 MHz.
Measured on CC1310EM-7XD-7793.
50 kbps, GFSK, 25-kHz deviation, 100-kHz RX
Receiver saturation bandwidth (same modulation format as IEEE 802.15.4g 10 dBm
mandatory mode), BER = 10–2
Wanted signal 3 dB above sensitivity limit. 50 kbps,
GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same
Selectivity, ±200 kHz, 50 kbps 44, 47 dB
modulation format as IEEE 802.15.4g mandatory
mode), BER = 10–2
Wanted signal 3 dB above sensitivity limit. 50 kbps,
GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same
Selectivity, ±400 kHz, 50 kbps 48, 53 dB
modulation format as IEEE 802.15.4g mandatory
mode), BER = 10–2
Wanted signal 3 dB above sensitivity limit. 50 kbps,
GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same
Blocking ±1 MHz, 50 kbps 59, 62 dB
modulation format as IEEE 802.15.4g mandatory
mode), BER = 10–2
Wanted signal 3 dB above sensitivity limit. 50 kbps,
GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same
Blocking ±2 MHz, 50 kbps 64, 65 dB
modulation format as IEEE 802.15.4g mandatory
mode), BER = 10–2
Wanted signal 3 dB above sensitivity limit. 50 kbps,
GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same
Blocking ±5 MHz, 50 kbps 67, 68 dB
modulation format as IEEE 802.15.4g mandatory
mode), BER = 10–2
Wanted signal 3 dB above sensitivity limit. 50 kbps,
GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same
Blocking ±10 MHz, 50 kbps 76, 76 dB
modulation format as IEEE 802.15.4g mandatory
mode), BER = 10–2

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Receive (RX) Parameters, 861 MHz to 1054 MHz (continued)


Measured on the Texas Instruments CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC
enabled, fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX
and TX path.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Spurious emissions 1 GHz to 13 GHz
Radiated emissions measured according to
(VCO leakage at 3.5 GHz) and 30 MHz –70 dBm
ETSI EN 300 220
to 1 GHz
Wanted signal 3 dB above sensitivity limit. 50 kbps,
Image rejection (image compensation
GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same
enabled, the image compensation is 44 dB
modulation format as IEEE 802.15.4g mandatory
calibrated in production)
mode), BER = 10–2
50 kbps, GFSK, 25-kHz deviation, 100-kHz RX
bandwidth (same modulation format as IEEE 802.15.4g
RSSI dynamic range 95 dB
mandatory mode). Starting from the sensitivity limit. This
range will give an accuracy of ±2 dB.
50 kbps, GFSK, 25-kHz deviation, 100-kHz RX
bandwidth (same modulation format as IEEE 802.15.4g
RSSI accuracy ±2 dB
mandatory mode). Starting from the sensitivity limit
across the given dynamic range.
10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate),
Receiver sensitivity, long-range mode
DSSS = 8, 40-kHz RX bandwidth, BER = 10–2. –124 dBm
625 bps
868 MHz and 915 MHz.
Wanted signal 3 dB above sensitivity limit. 10 ksym/s,
Selectivity, ±100 kHz, long-range mode
GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 56, 56 dB
625 bps
40-kHz RX bandwidth, BER = 10–2
Wanted signal 3 dB above sensitivity limit. 10 ksym/s,
Selectivity, ±200 kHz, long-range mode
GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 62, 65 dB
625 bps
40-kHz RX bandwidth, BER = 10–2
Wanted signal 3 dB above sensitivity limit. 10 ksym/s,
Blocking ±1 MHz, long-range mode
GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 73, 77 dB
625 bps
40-kHz RX bandwidth, BER = 10–2
Wanted signal 3 dB above sensitivity limit. 10 ksym/s,
Blocking ±2 MHz, long-range mode
GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 79, 79 dB
625 bps
40-kHz RX bandwidth, BER = 10–2
Wanted signal 3 dB above sensitivity limit. 10 ksym/s,
Blocking ±10 MHz, long-range mode
GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 91, 91 dB
625 bps
40-kHz RX bandwidth, BER = 10–2
4.8 kbps, OOK, 40-kHz RX bandwidth, BER = 10–2
Receiver sensitivity, OOK 4.8 kbps 868 MHz and 915 MHz. Measured on CC1310EM-7XD- –115 dBm
7793.

5.7 Receive (RX) Parameters, 431 MHz to 527 MHz


Measured on the Texas Instruments CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC
enabled, fRF = 433.92 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined
RX and TX path.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
50 kbps, GFSK, 25-kHz deviation, 100-kHz RX
Receiver sensitivity, 50 kbps bandwidth (same modulation format as IEEE 802.15.4g –110 dBm
mandatory mode), BER = 10–2
50 kbps, GFSK, 25-kHz deviation, 100-kHz RX
Receiver saturation bandwidth (same modulation format as IEEE 802.15.4g 10 dBm
mandatory mode), BER = 10–2
Wanted signal 3 dB above sensitivity limit. 50 kbps,
GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same
Selectivity, ±200 kHz, 50 kbps 44, 47 dB
modulation format as IEEE 802.15.4g mandatory
mode), BER = 10–2
Wanted signal 3 dB above sensitivity limit. 50 kbps,
GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same
Selectivity, ±400 kHz, 50 kbps 42, 50 dB
modulation format as IEEE 802.15.4g mandatory
mode), BER = 10–2

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Receive (RX) Parameters, 431 MHz to 527 MHz (continued)


Measured on the Texas Instruments CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC
enabled, fRF = 433.92 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined
RX and TX path.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Wanted signal 3 dB above sensitivity limit. 50 kbps,
GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same
Blocking ±1 MHz, 50 kbps 53, 58 dB
modulation format as IEEE 802.15.4g mandatory
mode), BER = 10–2
Wanted signal 3 dB above sensitivity limit. 50 kbps,
GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same
Blocking ±2 MHz, 50 kbps 59, 60 dB
modulation format as IEEE 802.15.4g mandatory
mode), BER = 10–2
Wanted signal 3 dB above sensitivity limit. 50 kbps,
GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same
Blocking ±10 MHz, 50 kbps 74, 74 dB
modulation format as IEEE 802.15.4g mandatory
mode), BER = 10–2
Spurious emissions 1 GHz to 13 GHz
Radiated emissions measured according to ETSI EN
(VCO leakage at 3.5 GHz) and 30 MHz –74 dBm
300 220
to 1 GHz
Wanted signal 3 dB above sensitivity limit. 50 kbps,
Image rejection (image compensation
GFSK, 25-kHz deviation, 100-kHz RX bandwidth (same
enabled, the image compensation is 43 dB
modulation format as IEEE 802.15.4g mandatory
calibrated in production)
mode), BER = 10–2
10 ksym/s, GFSK, 5-kHz deviation, FEC (half rate),
Receiver sensitivity, long-range mode
DSSS = 8, 40-kHz RX bandwidth, BER = 10–2. –124 dBm
625 bps
868 MHz and 915 MHZ.
Wanted signal 3 dB above sensitivity limit. 10 ksym/s,
Selectivity, ±100 kHz, long-range mode
GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 56, 56 dB
625 bps
40-kHz RX bandwidth, BER = 10–2
Wanted signal 3 dB above sensitivity limit. 10 ksym/s,
Selectivity, ±200 kHz, long-range mode
GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 62, 65 dB
625 bps
40-kHz RX bandwidth, BER = 10–2
Wanted signal 3 dB above sensitivity limit. 10 ksym/s,
Blocking ±1 MHz, long-range mode
GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 68, 73 dB
625 bps
40-kHz RX bandwidth, BER = 10–2
Wanted signal 3 dB above sensitivity limit. 10 ksym/s,
Blocking ±2 MHz, long-range mode
GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 74, 74 dB
625 bps
40-kHz RX bandwidth, BER = 10–2
Wanted signal 3 dB above sensitivity limit. 10 ksym/s,
Blocking ±10 MHz, long-range mode
GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 88, 89 dB
625 bps
40-kHz RX bandwidth, BER = 10–2
Image rejection (image compensation
Wanted signal 3 dB above sensitivity limit. 10 ksym/s,
enabled, the image compensation is
GFSK, 5-kHz deviation, FEC (half rate), DSSS = 8, 55 dB
calibrated in production), long-range
40-kHz RX bandwidth, BER = 10–2
mode 625 bps

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5.8 Transmit (TX) Parameters, 861 MHz to 1054 MHz


Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC enabled,
fRF = 868 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX
path.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VDDR = 1.95 V
Maximum output power, boost mode Minimum VDDS for boost mode is 2.1 V 14 dBm
868 MHz and 915 MHz
Maximum output power 868 MHz and 915 MHz 12 dBm
Output power programmable range 24 dB
Output power variation Tested at +10-dBm setting ±0.9 dB
Output power variation, boost mode +14 dBm ±0.5 dB
Transmitting +14 dBm
<–59
ETSI restricted bands
Spurious emissions 30 MHz to 1 GHz
Transmitting +14 dBm
(excluding <–51 dBm
outside ETSI restricted bands
harmonics) (1)
Transmitting +14 dBm
1 GHz to 12.75 GHz <–37
measured in 1-MHz bandwidth (ETSI)
Transmitting +14 dBm, conducted
Second harmonic –52, –55
868 MHz, 915 MHz
Transmitting +14 dBm, conducted
Harmonics Third harmonic –58, –55 dBm
868 MHz, 915 MHz
Transmitting +14 dBm, conducted
Fourth harmonic –56, –56
868 MHz, 915 MHz
30 MHz to 88 MHz
Transmitting +14 dBm, conducted <–66
(within FCC restricted bands)
88 MHz to 216 MHz
Transmitting +14 dBm, conducted <–65
(within FCC restricted bands)
Spurious emissions 216 MHz to 960 MHz
Transmitting +14 dBm, conducted <–65
out-of-band, (within FCC restricted bands) dBm
915 MHz (1)
960 MHz to 2390 MHz and
above 2483.5 MHz (within Transmitting +14 dBm, conducted <–52
FCC restricted band)
1 GHz to 12.75 GHz
Transmitting +14 dBm, conducted <–43
(outside FCC restricted bands)
Below 710 MHz
Transmitting +14 dBm, conducted <–50
(ARIB T-108)
710 MHz to 900 MHz
Transmitting +14 dBm, conducted <–60
(ARIB T-108)
900 MHz to 915 MHz
Spurious emissions Transmitting +14 dBm, conducted <–57
(ARIB T-108)
out-of-band, dBm
920.6 MHz (1) 930 MHz to 1000 MHz
Transmitting +14 dBm, conducted <–57
(ARIB T-108)
1000 MHz to 1215 MHz
Transmitting +14 dBm, conducted <–59
(ARIB T-108)
Above 1215 MHz
Transmitting +14 dBm, conducted <–45
(ARIB T-108)
(1) Suitable for systems targeting compliance with EN 300 220, EN 54-25, EN 303 204, FCC CFR47 Part 15, ARIB STD-T108.

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5.9 Transmit (TX) Parameters, 431 MHz to 527 MHz


Measured on the Texas Instruments CC1310EM-7XD-4251 reference design with Tc = 25°C, VDDS = 3.0 V, DC-DC enabled,
fRF = 433.92 MHz, unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX
path.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VDDR = 1.95 V
Maximum output power, boost mode 15 dBm
Minimum VDDS for boost mode is 2.1 V
Maximum output power 14 dBm
Transmitting +10 dBm, 433 MHz
<–63
Inside ETSI restricted bands
30 MHz to 1 GHz
Transmitting +10 dBm, 433 MHz
<–39
Outside ETSI restricted bands
Spurious emissions Transmitting +10 dBm, 433 MHz dBm
(excluding harmonics) (1) Outside ETSI restricted bands, measured <–52
in 1-MHz bandwidth (ETSI)
1 GHz to 12.75 GHz
Transmitting +10 dBm, 433 MHz
Inside ETSI restricted bands, measured in <–58
1-MHz bandwidth (ETSI)
(1) Suitable for systems targeting compliance with EN 300 220, EN 54-25, EN 303 204, FCC CFR47 Part 15, ARIB STD-T108.

5.10 1-Mbps GFSK (Bluetooth low energy) – RX


Measured on the TI CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless
otherwise noted. All tests with Bluetooth low energy PHY (1 Mbps), 37-byte payload unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Differential mode. Measured at the CC1350_7XD-
Receiver sensitivity Dual Band SMA connector, –87 dBm
37-byte payload BER = 10–3
Differential mode. Measured at the CC1350_7XD-
Receiver sensitivity Dual Band SMA connector, –86 dBm
255-byte payload BER = 10–3
Differential mode. Measured at the CC1350_7XD-
Receiver saturation 0 dBm
Dual Band SMA connector, BER = 10–3
Difference between the incoming carrier frequency
Frequency error tolerance and the internally generated carrier frequency. –350 350 kHz
Input signal 10 dB above sensitivity limit
Difference between incoming data rate and the
Data rate error tolerance internally generated data rate. Input signal 10 dB –750 750 ppm
above sensitivity limit
Wanted signal at –67 dBm, modulated interferer in
Co-channel rejection (1) –6 dB
channel, BER = 10–3
Wanted signal at –67 dBm, modulated interferer at
Selectivity, ±1 MHz (1) 7 / 4 (2) dB
±1 MHz, BER = 10–3
Wanted signal at –67 dBm, modulated interferer at
Selectivity, +2 MHz (1) 38 dB
+2 MHz, BER = 10–3
Wanted signal at –67 dBm, modulated interferer at
±3 MHz, BER = 10–3.
Selectivity, ±3 MHz (1) 36 / 41 (2) dB
Note that –3 MHz is –1 MHz from the image
frequency.
Wanted signal at –67 dBm, modulated interferer at
Selectivity, ±4 MHz (1) 39 / 38 (2) dB
±4 MHz, BER = 10–3
Wanted signal at –67 dBm, modulated interferer at
Selectivity, ±5 MHz (1) 35 / 39 (2) dB
±5 MHz, BER = 10–3
Wanted signal at –67 dBm, modulated interferer at
Selectivity, ±6 MHz (1) 42 / 37 (2) dB
≥ ±6 MHz, BER = 10–3
Wanted signal at –67 dBm, modulated interferer at
Selectivity, ±15 MHz or more (1) 55 dB
≥ ±15 MHz or more, BER = 10–3

(1) Numbers given as I/C dB.


(2) X / Y, where X is +N MHz and Y is –N MHz.
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1-Mbps GFSK (Bluetooth low energy) – RX (continued)


Measured on the TI CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless
otherwise noted. All tests with Bluetooth low energy PHY (1 Mbps), 37-byte payload unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Selectivity, Image frequency
(image compensation enabled, Wanted signal at –67 dBm, modulated interferer at
37 dB
the image compensation is image frequency, BER = 10–3
calibrated in production) (1)
Wanted signal at –67 dBm, modulated interferer at
Selectivity, Image frequency
±1 MHz from image (–3 MHz and –1 MHz from 4 / 41 (2) dB
±1 MHz (1)
wanted) frequency, BER = 10–3
Out-of-band blocking (3) 30 MHz to 2000 MHz –25 dBm
Out-of-band blocking 2003 MHz to 2399 MHz >–20 dBm
Out-of-band blocking 2484 MHz to 2997 MHz >–20 dBm
Out-of-band blocking 3000 MHz to 12.75 GHz >–30 dBm
Wanted signal at 2402 MHz, –64 dBm. Two
Intermodulation interferers at 2405 and 2408 MHz, respectively, at –30 dBm
the given power level
Conducted measurement in a 50-Ω single-ended
Spurious emissions, load. Suitable for systems targeting compliance
–72 dBm
30 to 1000 MHz with EN 300 328, EN 300 440 class 2, FCC
CFR47, Part 15 and ARIB STD-T-66
Conducted measurement in a 50-Ω single-ended
Spurious emissions, load. Suitable for systems targeting compliance
–65 dBm
1 to 12.75 GHz with EN 300 328, EN 300 440 class 2, FCC
CFR47, Part 15 and ARIB STD-T-66
RSSI dynamic range 70 dB
RSSI accuracy ±4 dB
(3) Excluding one exception at Fwanted / 2, per Bluetooth Specification.

5.11 1-Mbps GFSK (Bluetooth low energy) – TX


Measured on the TI CC1350_7XD-Dual Band reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless
otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Differential mode, delivered to a single-ended 50-Ω load
through a balun.
Output power, boost mode 9 dBm
VDDR = 1.95 V
Minimum VDDS for boost mode is 2.1 V.
Differential mode, delivered to a single-ended 50-Ω load
Output power 5 dBm
through a balun.
Output power, lowest setting Delivered to a single-ended 50-Ω load through a balun –21 dBm
f < 1 GHz, outside restricted bands –59
Spurious emission conducted f < 1 GHz, restricted bands ETSI –55
dBm
measurement (1) f < 1 GHz, restricted bands FCC –61
f > 1 GHz, including harmonics –47
(1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2
(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).

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5.12 PLL Parameters


Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
±100-kHz offset –101
±200-kHz offset –108
±400-kHz offset –115
Phase noise in the 868-MHz band dBc/Hz
±1000-kHz offset –124
±2000-kHz offset –131
±10000-kHz offset –140
±100-kHz offset –98
±200-kHz offset –106
±400-kHz offset –114
Phase noise in the 915-MHz band dBc/Hz
±1000-kHz offset –122
±2000-kHz offset –130
±10000-kHz offset –140

5.13 ADC Characteristics


Tc = 25°C, VDDS = 3.0 V, DC-DC disabled. Input voltage scaling enabled, unless otherwise noted. (1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range 0 VDDS V
Resolution 12 Bits
Sample rate 200 ksamples/s
Offset Internal 4.3-V equivalent reference (2) 2.1 LSB
Gain error Internal 4.3-V equivalent reference (2) –0.14 LSB
DNL (3) Differential nonlinearity >–1 LSB
(4)
INL Integral nonlinearity ±2 LSB
Internal 4.3-V equivalent reference (2), 200 ksamples/s,
10.0
9.6-kHz input tone
ENOB Effective number of bits VDDS as reference, 200 ksamples/s, 9.6-kHz input tone 10.2 Bits
Internal 1.44-V reference, voltage scaling disabled,
11.1
32 samples average, 200 ksamples/s, 300-Hz input tone
(2)
Internal 4.3-V equivalent reference , 200 ksamples/s,
–65
9.6-kHz input tone
THD Total harmonic distortion VDDS as reference, 200 ksamples/s, 9.6-kHz input tone –72 dB
Internal 1.44-V reference, voltage scaling disabled,
–75
32 samples average, 200 ksamples/s, 300-Hz input tone
(2)
Internal 4.3-V equivalent reference , 200 ksamples/s,
62
9.6-kHz input tone
SINAD
Signal-to-noise and
and VDDS as reference, 200 ksamples/s, 9.6-kHz input tone 63 dB
distortion ratio
SNDR
Internal 1.44-V reference, voltage scaling disabled,
69
32 samples average, 200 ksamples/s, 300-Hz input tone
(2)
Internal 4.3-V equivalent reference , 200 ksamples/s,
74
9.6-kHz input tone
Spurious-free dynamic
SFDR VDDS as reference, 200 ksamples/s, 9.6-kHz input tone 75 dB
range
Internal 1.44-V reference, voltage scaling disabled,
75
32 samples average, 200 ksamples/s, 300-Hz input tone
Conversion time Including sampling time 5 µs
Current consumption Internal 4.3-V equivalent reference (2) 0.66 mA
Current consumption VDDS as reference 0.75 mA

(1) Using IEEE Std 1241™ 2010 for terminology and test methods.
(2) Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V. Applied voltage must be within the absolute
maximum ratings (see Section 5.1) at all times.
(3) No missing codes. Positive DNL typically varies from 0.3 to 1.7, depending on the device (see Figure 5-7).
(4) For a typical example, see Figure 5-6.
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ADC Characteristics (continued)


Tc = 25°C, VDDS = 3.0 V, DC-DC disabled. Input voltage scaling enabled, unless otherwise noted.(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
(2)
Equivalent fixed internal reference(voltage scaling enabled)
For best accuracy, the ADC conversion should be initiated
Reference voltage 4.3 V
through the TI-RTOS API in order to include the gain/offset
compensation factors stored in FCFG1.
Fixed internal reference (input voltage scaling disabled). (2)
For best accuracy, the ADC conversion should be initiated
through the TI-RTOS API in order to include the gain/offset
Reference voltage 1.48 V
compensation factors stored in FCFG1. This value is derived
from the scaled value (4.3 V) as follows:
Vref = 4.3 V × 1408 / 4095
VDDS as reference (Also known as RELATIVE) (input voltage
Reference voltage VDDS V
scaling enabled)
VDDS as reference (Also known as RELATIVE) (input voltage
Reference voltage VDDS / 2.82 V
scaling disabled)
200 ksamples/s, voltage scaling enabled. Capacitive input,
Input Impedance input impedance depends on sampling frequency and sampling >1 MΩ
time

5.14 Temperature Sensor


Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise
noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Resolution 4 °C
Range –40 85 °C
Accuracy ±5 °C
Supply voltage coefficient (1) 3.2 °C/V
(1) Automatically compensated when using supplied driver libraries.

5.15 Battery Monitor


Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise
noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Resolution 50 mV
Range 1.8 3.8 V
Accuracy 13 mV

5.16 Continuous Time Comparator


Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range 0 VDDS V
External reference voltage 0 VDDS V
Internal reference voltage DCOUPL as reference 1.27 V
Offset 3 mV
Hysteresis <2 mV
Decision time Step from –10 mV to 10 mV 0.72 µs
Current consumption when enabled (1) 8.6 µA
(1) Additionally, the bias module must be enabled when running in standby mode.

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5.17 Low-Power Clocked Comparator


Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range 0 VDDS V
Clock frequency 32.8 kHz
Internal reference voltage, VDDS / 2 1.49 to 1.51 V
Internal reference voltage, VDDS / 3 1.01 to 1.03 V
Internal reference voltage, VDDS / 4 0.78 to 0.79 V
Internal reference voltage, DCOUPL / 1 1.25 to 1.28 V
Internal reference voltage, DCOUPL / 2 0.63 to 0.65 V
Internal reference voltage, DCOUPL / 3 0.42 to 0.44 V
Internal reference voltage, DCOUPL / 4 0.33 to 0.34 V
Offset <2 mV
Hysteresis <5 mV
Decision time Step from –50 mV to 50 mV 1 clock-cycle
Current consumption when enabled 362 nA

5.18 Programmable Current Source


Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Current source programmable output range 0.25 to 20 µA
Resolution 0.25 µA
Including current source at maximum
Current consumption (1) 23 µA
programmable output
(1) Additionally, the bias module must be enabled when running in standby mode.

5.19 DC Characteristics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TA = 25°C, VDDS = 1.8 V
GPIO VOH at 8-mA load IOCURR = 2, high-drive GPIOs only 1.32 1.54 V
GPIO VOL at 8-mA load IOCURR = 2, high-drive GPIOs only 0.26 0.32 V
GPIO VOH at 4-mA load IOCURR = 1 1.32 1.58 V
GPIO VOL at 4-mA load IOCURR = 1 0.21 0.32 V
GPIO pullup current Input mode, pullup enabled, Vpad = 0 V 71.7 µA
GPIO pulldown current Input mode, pulldown enabled, Vpad = VDDS 21.1 µA
IH = 0, transition between reading 0 and reading
GPIO high/low input transition, no hysteresis 0.88 V
1
GPIO low-to-high input transition, with hysteresis IH = 1, transition voltage for input read as 0 → 1 1.07 V
GPIO high-to-low input transition, with hysteresis IH = 1, transition voltage for input read as 1 → 0 0.74 V
IH = 1, difference between 0 → 1
GPIO input hysteresis 0.33 V
and 1 → 0 voltage transition points
TA = 25°C, VDDS = 3.0 V
GPIO VOH at 8-mA load IOCURR = 2, high-drive GPIOs only 2.68 V
GPIO VOL at 8-mA load IOCURR = 2, high-drive GPIOs only 0.33 V
GPIO VOH at 4-mA load IOCURR = 1 2.72 V
GPIO VOL at 4-mA load IOCURR = 1 0.28 V

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DC Characteristics (continued)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TA = 25°C, VDDS = 3.8 V
GPIO pullup current Input mode, pullup enabled, Vpad = 0 V 277 µA
GPIO pulldown current Input mode, pulldown enabled, Vpad = VDDS 113 µA
IH = 0, transition between reading 0 and reading
GPIO high/low input transition, no hysteresis 1.67 V
1
GPIO low-to-high input transition, with hysteresis IH = 1, transition voltage for input read as 0 → 1 1.94 V
GPIO high-to-low input transition, with hysteresis IH = 1, transition voltage for input read as 1 → 0 1.54 V
IH = 1, difference between 0 → 1 and 1 → 0
GPIO input hysteresis 0.4 V
voltage transition points
Lowest GPIO input voltage reliably interpreted as
VIH 0.8 VDDS (1)
a High
Highest GPIO input voltage reliably interpreted
VIL 0.2 VDDS (1)
as a Low
(1) Each GPIO is referenced to a specific VDDS pin. See the technical reference manual listed in Section 8.3 for more details.

5.20 Thermal Characteristics


CC1350
RSM RHB RGZ
THERMAL METRIC (1) UNIT (2)
(VQFN) (VQFN) (VQFN)
32 PINS 32 PINS 48 PINS
RθJA Junction-to-ambient thermal resistance 36.9 32.8 29.6 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 30.3 24.0 15.7 °C/W
RθJB Junction-to-board thermal resistance 7.6 6.8 6.2 °C/W
ψJT Junction-to-top characterization parameter 0.4 0.3 0.3 °C/W
ψJB Junction-to-board characterization parameter 7.4 6.8 6.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 2.1 1.9 1.9 °C/W
(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
(2) °C/W = degrees Celsius per watt.

5.21 Timing and Switching Characteristics

5.21.1 Reset Timing


MIN TYP MAX UNIT
RESET_N low duration 1 µs

5.21.2 Switching Characteristics: Wakeup and Timing


Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise
noted. The times listed here do not include RTOS overhead.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
MCU, Idle → Active 14 µs
MCU, Standby → Active 174 µs
MCU, Shutdown → Active 1097 µs

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5.21.3 Clock Specifications

5.21.3.1 24-MHz Crystal Oscillator (XOSC_HF)


Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise
noted. (1)
MIN TYP MAX UNIT
Crystal frequency 24 MHz
ESR equivalent series resistance 20 60 Ω
LM motional inductance, relates to the load capacitance that is used for the
< 1.6 × 10–24 / CL 2 H
crystal (CL in Farads)
CL crystal load capacitance 5 9 pF
Start-up time (2) 150 µs
(1) Probing or otherwise stopping the crystal while the DC-DC converter is enabled may cause permanent damage to the device.
(2) The crystal start-up time is low because it is kick-started by using the RCOSC_HF oscillator (temperature and aging compensated) that
is running at the same frequency.

5.21.3.2 32.768-kHz Crystal Oscillator (XOSC_LF)


Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise
noted. (1)
MIN TYP MAX UNIT
Crystal frequency 32.768 kHz
ESR equivalent series resistance 30 100 kΩ
Crystal load capacitance (CL) 6 12 pF
(1) Probing or otherwise stopping the crystal while the DC-DC converter is enabled may cause permanent damage to the device.

5.21.3.3 48-MHz RC Oscillator (RCOSC_HF)


Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise
noted.
MIN TYP MAX UNIT
Frequency 48 MHz
Uncalibrated frequency accuracy ±1%
Calibrated frequency accuracy (1) ±0.25%
Startup time 5 µs
(1) Accuracy relative to the calibration source (XOSC_HF)

5.21.3.4 32-kHz RC Oscillator (RCOSC_LF)


Measured on the Texas Instruments CC1310EM-7XD-7793 reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise
noted.
MIN TYP MAX UNIT
(1)
Calibrated frequency 32.768 kHz
Temperature coefficient 50 ppm/°C
(1) The frequency accuracy of the Real Time Clock (RTC) is not directly dependent on the frequency accuracy of the 32-kHz RC Oscillator.
The RTC can be calibrated to an accuracy within ±500 ppm of 32.768 kHz by measuring the frequency error of RCOSC_LF relative to
XOSC_HF and compensating the RTC tick speed.

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5.21.4 Flash Memory Characteristics


Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Supported flash erase cycles before failure 100 k Cycles
Flash page or sector erase current Average delta current 12.6 mA
Flash page or sector erase time (1) 8 ms
Flash page or sector size 4 KB
Flash write current Average delta current, 4 bytes at a time 8.15 mA
Flash write time (1) 4 bytes at a time 8 µs
(1) This number is dependent on flash aging and increases over time and erase cycles.

5.21.5 Synchronous Serial Interface (SSI) Characteristics


Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.
PARAMETER
PARAMETER MIN TYP MAX UNIT
NO.
S1 tclk_per SSIClk cycle time 12 65024 system clocks
(1)
S2 tclk_high SSIClk high time 0.5 × tclk_per
S3 (1) tclk_low SSIClk low time 0.5 × tclk_per
(1) See the SSI timing diagrams, Figure 5-1, Figure 5-2, and Figure 5-3.

S1
S2

SSIClk

S3

SSIFss

SSITx
MSB LSB
SSIRx
4 to 16 bits

Figure 5-1. SSI Timing for TI Frame Format (FRF = 01), Single Transfer Timing Measurement

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S2 S1

SSIClk

S3

SSIFss

SSITx MSB LSB

8-bit control

SSIRx 0 MSB LSB

4 to 16 bits output data

Figure 5-2. SSI Timing for MICROWIRE Frame Format (FRF = 10), Single Transfer

S1

S2

SSIClk
(SPO = 0)

S3

SSIClk
(SPO = 1)

SSITx
(Master) MSB LSB

SSIRx
(Slave) MSB LSB

SSIFss

Figure 5-3. SSI Timing for SPI Frame Format (FRF = 00), With SPH = 1

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5.22 Typical Characteristics

5 7
Active Mode Current
6
4.5

Current Consumption (PA)


Current Consumption (mA)

5
4
4
3.5
3
3
2

2.5 1

2 0
1.8 2.3 2.8 3.3 3.8 -40 -20 0 20 40 60 80 100 110
VDDS (V) Temperature (qC) D037
D007

Figure 5-4. Active Mode (MCU) Current Consumption vs Figure 5-5. Standby MCU Current Consumption, 32-kHz Clock,
Supply Voltage (VDDS) RAM and MCU Retention

2 1.5
Differential Nonlinearity (LSB)
1
Integral Nonlinearity (LSB)

0.5
0
0

-1
-0.5

-2 -1
0 500 1000 1500 2000 2500 3000 3500 4000 0 500 1000 1500 2000 2500 3000 3500 4000
Digital Output Code D007
Digital Output Code D008

Figure 5-6. SoC ADC, Integral Nonlinearity vs Figure 5-7. SoC ADC, Differential Nonlinearity vs
Digital Output Code Digital Output Code

1006.4 1007.5

1006.2 1007

1006 1006.5

1005.8 1006
ADC Code
ADC Code

1005.6 1005.5

1005.4 1005

1005.2 1004.5

1005 1004

1004.8 1003.5
1.8 2.3 2.8 3.3 3.8 -40 -20 0 20 40 60 80 100
VDDS (V) Termperature (qC) D036
D012

Figure 5-8. SoC ADC Output vs Supply Voltage Figure 5-9. SoC ADC Output vs Temperature
(Fixed Input, Internal Reference, No Scaling) (Fixed Input, Internal Reference, No Scaling)

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Figure 5-10. RX, (50-kbps) Packet Error Rate (PER) vs


Input RF Level vs Frequency Offset, 868 MHz

5.23 Typical Characteristics – Sub-1 GHz


Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the
internal DC-DC converter enabled.

-100 -100

-102 -102
Sensitivity (dBm)
Sensitivity (dBm)

-104 -104

-106 -106

-108 -108

-110 -110

-112 -112
863 865 867 869 871 873 875 876 903 908 913 918 923 928
Frequency (MHz) D001
Frequency (MHz) D002

Figure 5-11. RX (50 kbps) Sensitivity Figure 5-12. RX (50 kbps) Sensitivity
vs Frequency 863 MHz to 876 MHz vs Frequency 902 MHz to 928 MHz

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Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the
internal DC-DC converter enabled.
-104 -106

-107
-106
Sensitivity (dBm)

Sensitivity (dBm)
-108

-108 -109

-110
-110
-111

-112 -112
-40 -20 0 20 40 60 80 100 110 -40 -20 0 20 40 60 80 100 110
Temperature (qC) D003
Temperature (qC) D004

Figure 5-13. RX (50 kbps) Sensitivity vs Temperature 868 MHz Figure 5-14. RX (50 kbps) Sensitivity vs Temperature 915 MHz

-107 -107

-107.5 -107.5

-108 -108
Sensitivity (dBm)

Sensitivity (dBm)

-108.5 -108.5

-109 -109

-109.5 -109.5

-110 -110

-110.5 -110.5

-111 -111
1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8
Voltage (V) D005
Voltage (V) D006

Figure 5-15. RX (50 kbps) Sensitivity vs Voltage 868 MHz Figure 5-16. RX (50 kbps) Sensitivity vs Voltage 915 MHz

8 8

7.5 7.5

7 7
Current (mA)

Current (mA)

6.5 6.5

6 6

5.5 5.5

5 5

4.5 4.5

4 4
-40 -20 0 20 40 60 80 100 110 -40 -20 0 20 40 60 80 100 110
Temperature (qC) D007
Temperature (qC) D008

Figure 5-17. RX (50 kbps) Current vs Temperature at 868 MHz Figure 5-18. RX (50 kbps) Current vs Temperature at 915 MHz

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Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the
internal DC-DC converter enabled.
12 12

11 11

10 10
Current (mA)

Current (mA)
9 9

8 8

7 7

6 6

5 5

4 4
1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8
Voltage (V) D009
Voltage (V) D010

Figure 5-19. RX (50 kbps) Current vs Voltage at 868 MHz Figure 5-20. RX (50 kbps) Current vs Voltage at 915 MHz

80 80

70 70

60 60

50 50
Selectivity (dB)
Selectivity (dB)

40 40

30 30

20 20

10 10

0 0

-10 -10
-10 -8 -6 -4 -2 0 2 4 6 8 10 -10 -8 -6 -4 -2 0 2 4 6 8 10
Frequency Offset (MHz) D011
Frequency Offset (MHz) D012

Figure 5-21. RX (50 kbps) Selectivity With Wanted Signal at Figure 5-22. RX (50 kbps) Selectivity With Wanted Signal at
868 MHz, 3 dB Above Sensitivity Limit 915 MHz, 3 dB Above Sensitivity Limit

80 80

70 70

60 60

50 50
Selectivity (dB)

Selectivity (dB)

40 40

30 30

20 20

10 10

0 0

-10 -10
-10 -8 -6 -4 -2 0 2 4 6 8 10 -10 -8 -6 -4 -2 0 2 4 6 8 10
Frequency Offset (MHz) D013
Frequency Offset (MHz) D014

Figure 5-23. RX (50 kbps) Selectivity With Wanted Signal at Figure 5-24. RX (50 kbps) Selectivity With Wanted Signal at
868 MHz, –96 dBm 915 MHz, –96 dBm

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Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the
internal DC-DC converter enabled.
15 15

14.5 14.5
Output Power (dBm)

Output Power (dBm)


14 14

13.5 13.5

13 13

12.5 12.5

12 12
863 865 867 869 871 873 875 876 903 908 913 918 923 928
Frequency (MHz) D015
Frequency (MHz) D016

Figure 5-25. TX Maximum Output Power, 863 MHz to 876 MHz Figure 5-26. TX Maximum Output Power, 902 MHz to 928 MHz

15 15

14.5 14.5
Output Power (dBm)

Output Power (dBm)

14 14

13.5 13.5

13 13

12.5 12.5

12 12
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
Temperature (qC) D017
Temperature (qC) D018

Figure 5-27. TX Maximum Output Power vs Temperature, Figure 5-28. TX Maximum Output Power vs Temperature,
868 MHz 915 MHz

15 15
14.5 14.5
14 14
13.5 13.5
Current (mA)

Current (mA)

13 13
12.5 12.5
12 12
11.5 11.5
11 11
10.5 10.5
10 10
2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7
Voltage (V) D019
Voltage (V) D020

Figure 5-29. TX Maximum Output Power vs VDDS, 868 MHz Figure 5-30. TX Maximum Output Power vs VDDS, 915 MHz

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Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the
internal DC-DC converter enabled.
26 26

25.5 25.5

25 25
Current (mA)

Current (mA)
24.5 24.5

24 24

23.5 23.5

23 23
863 865 867 869 871 873 875 876 903 908 913 918 923 928
Frequency (MHz) D021
Frequency (MHz) D022

Figure 5-31. TX Current With Maximum Output Power, Figure 5-32. TX Current With Maximum Output Power,
863 MHz to 876 MHz 902 MHz to 928 MHz

27 27
26.5 26.5
26 26
25.5 25.5
Current (mA)

Current (mA)

25 25
24.5 24.5
24 24
23.5 23.5
23 23
22.5 22.5
22 22
-40 -20 0 20 40 60 80 100 110 -40 -20 0 20 40 60 80 100 110
Temperature (qC) D023
Temperature (qC) D024

Figure 5-33. TX Current With Maximum Output Power Figure 5-34. TX Current With Maximum Output Power
vs Temperature, 868 MHz vs Temperature, 915 MHz

40 40

38 38

36 36

34 34
Current (mA)

Current (mA)

32 32

30 30

28 28

26 26

24 24

22 22
2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7
Voltage (V) D025
Voltage (V) D026

Figure 5-35. TX Current With Maximum Output Power Figure 5-36. TX Current With Maximum Output Power
vs Voltage, 868 MHz vs Voltage, 915 MHz

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5.24 Typical Characteristics – 2.4 GHz


Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the
internal DC-DC converter enabled.

-80 -80
-81 -81
-82 -82
-83 -83
Sensitivity (dBm)

Current (mA)
-84 -84
-85 -85
-86 -86
-87 -87
-88 -88
-89 -89
-90 -90
2400 2410 2420 2430 2440 2450 2460 2470 2480 -40 -20 0 20 40 60 80 100 110
Frequency (MHz) D027
Temperature (qC) D028

Figure 5-37. RX Bluetooth low energy Sensitivity Figure 5-38. RX Bluetooth low energy Sensitivity
vs Frequency 2402 MHz to 2480 MHz vs Temperature 2440 MHz

-80 8
-81
7.5
-82
-83
Sensitivity (dBm)

7
Current (mA)

-84
-85 6.5
-86
6
-87
-88
5.5
-89
-90 5
1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 -40 -20 0 20 40 60 80 100 110
Voltage (V) D029
Temperature (qC) D030

Figure 5-39. RX Bluetooth low energy Sensitivity Figure 5-40. RX Bluetooth low energy Current
vs Voltage, 2440 MHz vs Temperature at 2440 MHz

14 70

13 60
12
50
11
Selectivity (dB)
Current (mA)

40
10
30
9
20
8
10
7

6 0

5 -10
1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 -40 -30 -20 -10 0 10 20 30 40 45
Voltage (V) D031
Frequency Offset (MHz) D032

Figure 5-41. RX Bluetooth low energy Current vs Voltage at Figure 5-42. RX Bluetooth low energy Selectivity
2440 MHz vs Frequency Offset

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Unless otherwise stated, all performance figures represent an average over six typical parts at room temperature and with the
internal DC-DC converter enabled.
10 10

9.5
9.5
9
Output Power (dBm)

Output Power (dBm)


9
8.5

8.5 8

7.5
8
7
7.5
6.5

7 6
2400 2410 2420 2430 2440 2450 2460 2470 2480 -40 -20 0 20 40 60 80 100 110
Frequency (MHz) D033
Temperature (qC) D034

Figure 5-43. TX Bluetooth low energy Maximum Output Power, Figure 5-44. TX Bluetooth low energy Maximum Output Power
2402 MHz to 2480 MHz vs Temperature, 2440 MHz

10

9.5
Output Power (dBm)

8.5

7.5

7
2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7
Voltage (V) D035

Figure 5-45. TX Bluetooth low energy Maximum Output Power


vs VDDS, 2440 MHz

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6 Detailed Description

6.1 Overview
Section 1.4 shows a block diagram of the core modules of the CC13xx product family.

6.2 Main CPU


The CC1350 SimpleLink Wireless MCU contains an ARM Cortex-M3 (CM3) 32-bit CPU, which runs the
application and the higher layers of the protocol stack.
The CM3 processor provides a high-performance, low-cost platform that meets the system requirements
of minimal memory implementation and low-power consumption, while delivering outstanding
computational performance and exceptional system response to interrupts.
The CM3 features include the following:
• 32-bit ARM Cortex-M3 architecture optimized for small-footprint embedded applications
• Outstanding processing performance combined with fast interrupt handling
• ARM Thumb®-2 mixed 16- and 32-bit instruction set delivers the high performance expected of a 32-bit
ARM core in a compact memory size usually associated with 8- and 16-bit devices, typically in the
range of a few kilobytes of memory for microcontroller-class applications:
– Single-cycle multiply instruction and hardware divide
– Atomic bit manipulation (bit-banding), delivering maximum memory use and streamlined peripheral
control
– Unaligned data access, enabling data to be efficiently packed into memory
• Fast code execution permits slower processor clock or increases sleep mode time
• Harvard architecture characterized by separate buses for instruction and data
• Efficient processor core, system, and memories
• Hardware division and fast digital-signal-processing oriented multiply accumulate
• Saturating arithmetic for signal processing
• Deterministic, high-performance interrupt handling for time-critical applications
• Enhanced system debug with extensive breakpoint and trace capabilities
• Serial wire trace reduces the number of pins required for debugging and tracing
• Migration from the ARM7™ processor family for better performance and power efficiency
• Optimized for single-cycle flash memory use
• Ultra-low power consumption with integrated sleep modes
• 1.25 DMIPS per MHz

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6.3 RF Core
The RF core is a highly flexible and capable radio system that interfaces the analog RF and baseband
circuits, handles data to and from the system side, and assembles the information bits in a given packet
structure.
The RF core can autonomously handle the time-critical aspects of the radio protocols, thus offloading the
main CPU and leaving more resources for the user application. The RF core offers a high-level,
command-based API to the main CPU.
The RF core supports a wide range of modulation formats, frequency bands, and accelerator features,
which include the following (not all of the features have been characterized yet, see the CC1350
SimpleLink Wireless MCU Silicon Errata for more information):
• Wide range of data rates:
– From 625 bps (offering long range and high robustness) to as high as 4 Mbps
• Wide range of modulation formats:
– Multilevel (G) FSK and MSK
– On-Off Keying (OOK) with optimized shaping to minimize adjacent channel leakage
– Coding-gain support for long range
• Dedicated packet handling accelerators:
– Forward error correction
– Data whitening
– 802.15.4g mode-switch support
– Automatic CRC
• Automatic listen-before-talk (LBT) and clear channel assist (CCA)
• Digital RSSI
• Highly configurable channel filtering, supporting channel spacing schemes from 40 kHz to 4 MHz
• High degree of flexibility, offering a future-proof solution
The RF core interfaces a highly flexible radio, with a high-performance synthesizer that can support a wide
range of frequency bands.

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6.4 Sensor Controller


The Sensor Controller contains circuitry that can be selectively enabled in standby mode. The peripherals
in this domain may be controlled by the Sensor Controller Engine, which is a proprietary power-optimized
CPU. This CPU can read and monitor sensors or perform other tasks autonomously; thereby significantly
reducing power consumption and offloading the main CM3 CPU.
A PC-based development tool called Sensor Controller Studio is used to write, test, and debug code for
the Sensor Controller. The tool produces C driver source code, which the System CPU application uses to
control and exchange data with the Sensor Controller. Typical use cases may be (but are not limited to)
the following:
• Analog sensors using integrated ADC
• Digital sensors using GPIOs with bit-banged I2C or SPI
• Capacitive sensing
• Waveform generation
• Pulse counting
• Key scan
• Quadrature decoder for polling rotational sensors
The peripherals in the Sensor Controller include the following:
• The low-power clocked comparator can be used to wake the device from any state in which the
comparator is active. A configurable internal reference can be used with the comparator. The output of
the comparator can also be used to trigger an interrupt or the ADC.
• Capacitive sensing functionality is implemented through the use of a constant current source, a time-
to-digital converter, and a comparator. The continuous time comparator in this block can also be used
as a higher-accuracy alternative to the low-power clocked comparator. The Sensor Controller takes
care of baseline tracking, hysteresis, filtering, and other related functions.
• The ADC is a 12-bit, 200-ksamples/s ADC with 8 inputs and a built-in voltage reference. The ADC can
be triggered by many different sources, including timers, I/O pins, software, the analog comparator,
and the RTC.
• The analog modules can be connected to up to eight different GPIOs (see Table 6-1).
The peripherals in the Sensor Controller can also be controlled from the main application processor.

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Table 6-1. GPIOs Connected to the Sensor Controller (1)


CC13x0
ANALOG CAPABLE 7 × 7 RGZ 5 × 5 RHB 4 × 4 RSM
DIO NUMBER DIO NUMBER DIO NUMBER
Y 30 14
Y 29 13
Y 28 12
Y 27 11 9
Y 26 9 8
Y 25 10 7
Y 24 8 6
Y 23 7 5
N 7 4 2
N 6 3 1
N 5 2 0
N 4 1
N 3 0
N 2
N 1
N 0
(1) Depending on the package size, up to 15 pins can be connected to the Sensor Controller. Up to eight
of these pins can be connected to analog modules.

6.5 Memory
The flash memory provides nonvolatile storage for code and data. The flash memory is in-system
programmable.
The SRAM (static RAM) is split into two 4-KB blocks and two 6-KB blocks and can be used to store data
and execute code. Retention of the RAM contents in standby mode can be enabled or disabled
individually for each block to minimize power consumption. In addition, if flash cache is disabled, the 8-KB
cache can be used as general-purpose RAM.
The ROM provides preprogrammed, embedded TI-RTOS kernel and Driverlib. The ROM also contains a
bootloader that can be used to reprogram the device using SPI or UART.

6.6 Debug
The on-chip debug support is done through a dedicated cJTAG (IEEE 1149.7) or JTAG (IEEE 1149.1)
interface.

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6.7 Power Management


To minimize power consumption, the CC1350 device supports a number of power modes and power-
management features (see Table 6-2).

Table 6-2. Power Modes


SOFTWARE-CONFIGURABLE POWER MODES RESET PIN
MODE
ACTIVE IDLE STANDBY SHUTDOWN HELD
CPU Active Off Off Off Off
Flash On Available Off Off Off
SRAM On On On Off Off
Radio Available Available Off Off Off
Supply System On On Duty Cycled Off Off
Current 1.2 mA + 25.5 µA/MHz 570 µA 0.6 µA 185 nA 0.1 µA
Wake-up Time to CPU Active (1) – 14 µs 174 µs 1015 µs 1015 µs
Register Retention Full Full Partial No No
SRAM Retention Full Full Full No No
XOSC_HF or XOSC_HF or
High-Speed Clock Off Off Off
RCOSC_HF RCOSC_HF
XOSC_LF or XOSC_LF or XOSC_LF or
Low-Speed Clock Off Off
RCOSC_LF RCOSC_LF RCOSC_LF
Peripherals Available Available Off Off Off
Sensor Controller Available Available Available Off Off
Wake-up on RTC Available Available Available Off Off
Wake-up on Pin Edge Available Available Available Available Off
Wake-up on Reset Pin Available Available Available Available Available
Brown Out Detector (BOD) Active Active Duty Cycled Off N/A
Power On Reset (POR) Active Active Active Active N/A
(1) Not including RTOS overhead

In active mode, the application CM3 CPU is actively executing code. Active mode provides normal
operation of the processor and all of the peripherals that are currently enabled. The system clock can be
any available clock source (see Table 6-2).
In idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not
clocked and no code is executed. Any interrupt event returns the processor to active mode.
In standby mode, only the always-on (AON) domain is active. An external wake-up event, RTC event, or
Sensor Controller event is required to return the device to active mode. MCU peripherals with retention do
not need to be reconfigured when waking up again, and the CPU continues execution from where it went
into standby mode. All GPIOs are latched in standby mode.
In shutdown mode, the device is entirely turned off (including the AON domain and Sensor Controller),
and the I/Os are latched with the value they had before entering shutdown mode. A change of state on
any I/O pin defined as a wake from shutdown pin wakes up the device and functions as a reset trigger.
The CPU can differentiate between reset in this way and reset-by-reset pin or POR by reading the reset
status register. The only state retained in this mode is the latched I/O state and the flash memory
contents.
The Sensor Controller is an autonomous processor that can control the peripherals in the Sensor
Controller independent of the main CPU. This means that the main CPU does not have to wake up, for
example to execute an ADC sample or poll a digital sensor over SPI, thus saving both current and wake-
up time that would otherwise be wasted. The Sensor Controller Studio lets the user configure the Sensor
Controller and choose which peripherals are controlled and which conditions wake up the main CPU.

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6.8 Clock Systems


The CC1350 device supports two external and two internal clock sources.
A 24-MHz external crystal is required as the frequency reference for the radio. This signal is doubled
internally to create a 48-MHz clock.
The 32.768-kHz crystal is optional. The low-speed crystal oscillator is designed for use with a 32.768-kHz
watch-type crystal.
The internal high-speed RC oscillator (48-MHz) can be used as a clock source for the CPU subsystem.
The internal low-speed RC oscillator (32-kHz) can be used as a reference if the low-power crystal
oscillator is not used.
The 32-kHz clock source can be used as external clocking reference through GPIO.

6.9 General Peripherals and Modules


The I/O controller controls the digital I/O pins and contains multiplexer circuitry to assign a set of
peripherals to I/O pins in a flexible manner. All digital I/Os are interrupt and wake-up capable, have a
programmable pullup and pulldown function, and can generate an interrupt on a negative or positive edge
(configurable). When configured as an output, pins can function as either push-pull or open-drain. Five
GPIOs have high-drive capabilities, which are marked in bold in Section 4.
The SSIs are synchronous serial interfaces that are compatible with SPI, MICROWIRE, and TI's
synchronous serial interfaces. The SSIs support both SPI master and slave up to 4 MHz.
The UART implements a universal asynchronous receiver and transmitter function. The UART supports
flexible baud-rate generation up to a maximum of 3 Mbps.
Timer 0 is a general-purpose timer module (GPTM) that provides two 16-bit timers. The GPTM can be
configured to operate as a single 32-bit timer, dual 16-bit timers, or as a PWM module.
Timer 1, Timer 2, and Timer 3 are also GPTMs; each timer is functionally equivalent to Timer 0.
In addition to these four timers, a separate timer in the RF core handles timing for RF protocols; the RF
timer can be synchronized to the RTC.
The I2S interface is used to handle digital audio (for more information, see the CC13xx, CC26xx
SimpleLink™ Wireless MCU Technical Reference Manual).
The I2C interface is used to communicate with devices compatible with the I2C standard. The I2C interface
can handle 100-kHz and 400-kHz operation, and can serve as both I2C master and I2C slave.
The TRNG module provides a true, nondeterministic noise source for the purpose of generating keys,
initialization vectors (IVs), and other random number requirements. The TRNG is built on 24 ring
oscillators that create unpredictable output to feed a complex nonlinear-combinatorial circuit.
The watchdog timer is used to regain control if the system fails due to a software error after an external
device fails to respond as expected. The watchdog timer can generate an interrupt or a reset when a
predefined time-out value is reached.

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The device includes a direct memory access (µDMA) controller. The µDMA controller provides a way to
offload data-transfer tasks from the CM3 CPU, thus allowing for more efficient use of the processor and
the available bus bandwidth. The µDMA controller can perform transfer between memory and peripherals.
The µDMA controller has dedicated channels for each supported on-chip module and can be programmed
to automatically perform transfers between peripherals and memory when the peripheral is ready to
transfer more data.
Some features of the µDMA controller follow (this is not an exhaustive list):
• Highly flexible and configurable channel operation of up to 32 channels
• Transfer modes: memory-to-memory, memory-to-peripheral, peripheral-to-memory, and peripheral-to-
peripheral
• Data sizes of 8, 16, and 32 bits
The AON domain contains circuitry that is always enabled, except when in shutdown mode (where the
digital supply is off). This circuitry includes the following:
• The RTC can be used to wake the device from any state where it is active. The RTC contains three
compare registers and one capture register. With software support, the RTC can be used for clock and
calendar operation. The RTC is clocked from the 32-kHz RC oscillator or crystal. The RTC can also be
compensated to tick at the correct frequency even when the internal 32-kHz RC oscillator is used
instead of a crystal.
• The battery monitor and temperature sensor are accessible by software and provide a battery status
indication as well as a coarse temperature measure.

6.10 Voltage Supply Domains


The CC1350 device can interface to two or three different voltage domains depending on the package
type. On-chip level converters ensure correct operation as long as the signal voltage on each input/output
pin is set with respect to the corresponding supply pin (VDDS, VDDS2, or VDDS3). Table 6-3 lists the pin-
to-VDDS mapping.

Table 6-3. Pin Function to VDDS Mapping Table


Package
VQFN 7 × 7 (RGZ) VQFN 5 × 5 (RHB) VQFN 4 × 4 (RSM)
DIO 23–30 DIO 7–14 DIO 5–9
VDDS (1)
Reset_N Reset_N Reset_N
DIO 0–6 DIO 0–4
VDDS2 DIO 1–11 JTAG_TCKC JTAG_TCKC
JTAG_TMSC JTAG_TMSC
DIO 12–22
VDDS3 JTAG_TCKC NA NA
JTAG_TMSC
(1) The VDDS_DCDC pin must always be connected to the same voltage as the VDDS pin.

6.11 System Architecture


Depending on the product configuration, the CC1350 device can function as a wireless network processor
(WNP – a device running the wireless protocol stack, with the application running on a separate host
MCU), or as a system-on-chip (SoC) with the application and protocol stack running on the ARM CM3
core inside the device.
In the first case, the external host MCU communicates with the device using SPI or UART. In the second
case, the application must be written according to the application framework supplied with the wireless
protocol stack.

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7 Application, Implementation, and Layout

NOTE
Information in the following Applications section is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes. Customers should validate and test
their design implementation to confirm system functionality.

Few external components are required for the operation of the CC1350 device. Figure 7-1 shows a typical
application circuit.
The board layout greatly influences the RF performance of the CC1350 device.
On the Texas Instruments CC1350_7XD-Dual Band reference design, the optimal differential impedance
seen from the RF pins into the balun and filter and antenna is 44 + j15.

To VDDR pins Sub-1 GHz Antenna


(50 Ohm)

Optional Sub-1 GHz Match


inductor.
Only
RF_SW_VDDS
needed for RF_SW_CTL
DCDC
operation

CC 1350
DCDC_SW Pin 2 (RF N)
RF Switch
VDDS_DCDC Pin 1 (RF P)

input decoupling Pin 3/4 (RXTX)


2.4 GHz Antenna
(50 Ohm)

24MHz
XTAL
(Load caps 2.4 GHz Match
on chip)

Copyright © 2016, Texas Instruments Incorporated


Figure 7-1 does not show decoupling capacitors for power pins. For a complete reference design, see the product
folder on www.ti.com.

Figure 7-1. Differential Reference Design

7.1 SimplelinkTM CC1350 LaunchPad™ Bluetooth® and Sub-1 GHz Long Range Wireless
Development Kit
The CC1350 LaunchPad combines a Bluetooth® Smart® with a Sub-1 GHz radio for the ultimate
combination of easy mobile phone integration with long range connectivity including a 32-bit ARM®
Cortex®-M3 processor on a single chip.
The CC1350 device is a wireless MCU targeting low power, long range wireless applications. The CC1350
device contains a 32-bit ARM® Cortex®-M3 processor that runs at 48 MHz as the main processor and a
rich peripheral feature set that includes a unique ultra-low power sensor controller. This sensor controller
is ideal for interfacing external sensors and for collecting analog and digital data autonomously while the
rest of the system is in sleep mode.

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8 Device and Documentation Support


TI offers an extensive line of development tools. Tools and software to evaluate the performance of the
device, generate code, and develop solutions are listed in the following.

8.1 Device Nomenclature


To designate the stages in the product development cycle, TI assigns prefixes to all part numbers and/or
date-code. Each device has one of three prefixes/identifications: X, P, or null (no prefix) (for example,
CC1350 is in production; therefore, no prefix/identification is assigned).
Device development evolutionary flow:
X Experimental device that is not necessarily representative of the final device's electrical
specifications and may not use production assembly flow.
P Prototype device that is not necessarily the final silicon die and may not necessarily meet
final electrical specifications.
null Production version of the silicon die that is fully qualified.
Production devices have been characterized fully, and the quality and reliability of the device have been
demonstrated fully. TI's standard warranty applies.
Predictions show that prototype devices (X or P) have a greater failure rate than the standard production
devices. Texas Instruments recommends that these devices not be used in any production system
because their expected end-use failure rate still is undefined. Only qualified production devices are to be
used.
TI device nomenclature also includes a suffix with the device family name. This suffix indicates the
package type (for example, RGZ).
For orderable part numbers of CC1350 devices in the RSM (4-mm × 4-mm), RHB (5-mm × 5-mm), or
RGZ (7-mm × 7-mm) package types, see the Package Option Addendum of this document, the TI website
(www.ti.com), or contact your TI sales representative.

CC1350 F128 XXX (R/T)

PREFIX
X = Experimental device
Blank = Qualified device
R = Large Reel
T = Small Reel
DEVICE
SimpleLink™ Ultra-Low-Power
Dual-Band Wireless MCU

PACKAGE
FLASH SIZE RGZ = 48-pin VQFN (Very Thin Quad Flatpack No-Lead)
128KB RHB = 32-pin VQFN
RSM = 32-pin VQFN

Figure 8-1. Device Nomenclature

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8.2 Tools and Software


Development Kit:
Simplelink™ CC1350 LaunchPad™ Bluetooth® and Sub-1 GHz Long Range Wireless Development
Kit
The CC1350 LaunchPad™ development kit combines a Bluetooth Smart radio with a Sub-1
GHz radio for the ultimate combination of easy mobile phone integration with long-range
connectivity including a 32-bit ARM Cortex-M3 processor on a single chip. The CC1350
device is a wireless MCU targeting low power, long-range wireless applications.
The CC1350 device contains a 32-bit ARM Cortex-M3 processor that runs at 48 MHz as the
main processor and a rich peripheral feature set that includes a unique ultra-low-power
sensor controller. This sensor controller is great for interfacing external sensors and for
collecting analog and digital data autonomously while the rest of the system is in sleep
mode.
Software Tools:
SmartRF™ Studio 7 SPACER
SmartRF Studio is a PC application that helps designers of radio systems to easily evaluate
the RF-IC at an early stage in the design process.
• Test functions for transmitting and receiving radio packets, continuous wave transmit and
receive
• Evaluate RF performance on custom boards by wiring it to a supported evaluation board
or debugger
• Can also be used without any hardware, but then only to generate, edit and export radio
configuration settings
• Can be used in combination with several development kits for Texas Instruments’
CC1350 RF-ICs
Sensor Controller Studio SPACER
Sensor Controller Studio provides a development environment for the CC1350 Sensor
Controller. The Sensor Controller is a proprietary, power-optimized CPU inside the CC1350 ,
which can perform simple background tasks autonomously and independent of the System
CPU state.
• Allows for Sensor Controller task algorithms to be implemented using a C-like
programming language
• Outputs a Sensor Controller Interface driver, which incorporates the generated Sensor
Controller machine code and associated definitions
• Allows for rapid development by using the integrated Sensor Controller task testing and
debugging functionality. This allows for live visualization of sensor data and algorithm
verification.
IDEs and Compilers:
Code Composer Studio™ SPACER
• An integrated development environment with project management tools and editor
• Code Composer Studio (CCS) 6.1 and later has built-in support for the CC1350 device
family
• Best support for XDS debuggers; XDS100v3, XDS110 and XDS200
• High integration with TI-RTOS with support for TI-RTOS Object View
IAR Embedded Workbench® for ARM SPACER
• Integrated development environment with project management tools and editor
• IAR EWARM 7.30.3 and later has built-in support for the CC1350 device family
• Broad debugger support, supporting XDS100v3, XDS200, IAR I-Jet and Segger J-Link
• Integrated development environment with project management tools and editor
• RTOS plugin available for TI-RTOS
For a complete listing of development-support tools for the CC1350 platform, visit the Texas Instruments
website at www.ti.com. For information on pricing and availability, contact the nearest TI field sales office
or authorized distributor.

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8.3 Documentation Support


To receive notification of documentation updates, navigate to the device product folder on ti.com
(CC1350). In the upper right corner, click on Alert me to register and receive a weekly digest of any
product information that has changed. For change details, review the revision history included in any
revised document.
The current documentation that describes the CC1350, related peripherals, and other technical collateral
is listed in the following.
Technical Reference Manual
CC13xx, CC26xx SimpleLink™ Wireless MCU Technical Reference Manual SPACER
Reference Guide
CC26xx/CC13xx Power Management Software Developer's Reference Guide SPACER
Application Reports
Using GCC/GDB With SimpleLink™ CC26xx/CC13xx
CC-Antenna-DK2 and Antenna Measurements Summary

8.4 Texas Instruments Low-Power RF Website


TI's Low-Power RF website has all the latest products, application and design notes, FAQ section, news
and events updates. Go to www.ti.com/longrange.

8.5 Low-Power RF eNewsletter


The Low-Power RF eNewsletter is up-to-date on new products, news releases, developers’ news, and
other news and events associated with low-power RF products from TI. The Low-Power RF eNewsletter
articles include links to get more online information.
Sign up at: www.ti.com/lprfnewsletter

8.6 Additional Information


Texas Instruments offers a wide selection of cost-effective, low-power RF solutions for proprietary and
standard-based wireless applications for use in industrial and consumer applications. The selection
includes RF transceivers, RF transmitters, RF front ends, and Systems-on-Chips as well as various
software solutions for the Sub-1 GHz and 2.4-GHz frequency bands.
In addition, Texas Instruments provides a large selection of support collateral such as development tools,
technical documentation, reference designs, application expertise, customer support, third-party and
university programs.
Other than providing technical support forums, videos, and blogs, the Low-Power RF E2E Online
Community also presents the opportunity to interact with engineers from all over the world.
With a broad selection of product solutions, end-application possibilities, and a range of technical support,
Texas Instruments offers the broadest low-power RF portfolio.

Copyright © 2016, Texas Instruments Incorporated Device and Documentation Support 47


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Product Folder Links: CC1350
CC1350
SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com

8.7 Community Resources


The following links connect to TI community resources. Linked contents are provided "AS IS" by the
respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views;
see TI's Terms of Use.
TI E2E™ Online Community The TI engineer-to-engineer (E2E) community was created to foster
collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge,
explore ideas and help solve problems with fellow engineers.
TI Embedded Processors Wiki Texas Instruments Embedded Processors Wiki. Established to help
developers get started with Embedded Processors from Texas Instruments and to foster
innovation and growth of general knowledge about the hardware and software surrounding
these devices.
Low-Power RF Online Community Wireless Connectivity Section of the TI E2E Support Community
• Forums, videos, and blogs
• RF design help
• E2E interaction
Join here.
Low-Power RF Developer Network Texas Instruments has launched an extensive network of low-power
RF development partners to help customers speed up their application development. The
network consists of recommended companies, RF consultants, and independent design
houses that provide a series of hardware module products and design services, including:
• RF circuit, low-power RF, and ZigBee® design services
• Low-power RF and ZigBee module solutions and development tools
• RF certification services and RF circuit manufacturing
For help with modules, engineering services or development tools:
Search the Low-Power RF Developer Network to find a suitable partner.
www.ti.com/lprfnetwork

8.8 Trademarks
SimpleLink, SmartRF, Code Composer Studio, Texas Instruments, LaunchPad, E2E are trademarks of
Texas Instruments.
ARM7 is a trademark of ARM Limited (or its subsidiaries).
ARM, Cortex, Thumb are registered trademarks of ARM Limited (or its subsidiaries).
Bluetooth is a registered trademark of Bluetooth SIG, Inc.
ULPBench is a trademark of Embedded Microprocessor Benchmark Consortium.
CoreMark is a registered trademark of Embedded Microprocessor Benchmark Consortium.
IAR Embedded Workbench is a registered trademark of IAR Systems AB.
IEEE Std 1241 is a trademark of Institute of Electrical and Electronics Engineers, Incorporated.
IEEE is a registered trademark of Institute of Electrical and Electronics Engineers, Incorporated.
Wi-SUN is a trademark of Wi-SUN Alliance, Inc.
ZigBee is a registered trademark of Zigbee Alliance.
All other trademarks are the property of their respective owners.

48 Device and Documentation Support Copyright © 2016, Texas Instruments Incorporated


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www.ti.com SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016

8.9 Electrostatic Discharge Caution


This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

8.10 Export Control Notice


Recipient agrees to not knowingly export or re-export, directly or indirectly, any product or technical data
(as defined by the U.S., EU, and other Export Administration Regulations) including software, or any
controlled product restricted by other applicable national regulations, received from disclosing party under
nondisclosure obligations (if any), or any direct product of such technology, to any destination to which
such export or re-export is restricted or prohibited by U.S. or other applicable laws, without obtaining prior
authorization from U.S. Department of Commerce and other competent Government authorities to the
extent required by those laws.

Copyright © 2016, Texas Instruments Incorporated Device and Documentation Support 49


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Product Folder Links: CC1350
CC1350
SWRS183A – JUNE 2016 – REVISED NOVEMBER 2016 www.ti.com

8.11 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.

9 Mechanical, Packaging, and Orderable Information


9.1 Packaging Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and
revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

50 Mechanical, Packaging, and Orderable Information Copyright © 2016, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: CC1350
PACKAGE OPTION ADDENDUM

www.ti.com 4-Aug-2017

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

CC1350F128RGZR ACTIVE VQFN RGZ 48 2500 Green (RoHS CU NIPDAU | Level-3-260C-168 HR -40 to 85 CC1350
& no Sb/Br) CU NIPDAUAG F128
CC1350F128RGZT ACTIVE VQFN RGZ 48 250 Green (RoHS CU NIPDAU | Level-3-260C-168 HR -40 to 85 CC1350
& no Sb/Br) CU NIPDAUAG F128
CC1350F128RHBR ACTIVE VQFN RHB 32 3000 Green (RoHS CU NIPDAU | Level-3-260C-168 HR -40 to 85 CC1350
& no Sb/Br) CU NIPDAUAG F128
CC1350F128RHBT ACTIVE VQFN RHB 32 250 Green (RoHS CU NIPDAU | Level-3-260C-168 HR -40 to 85 CC1350
& no Sb/Br) CU NIPDAUAG F128
CC1350F128RSMR ACTIVE VQFN RSM 32 3000 Green (RoHS CU NIPDAU | Level-3-260C-168 HR -40 to 85 CC1350
& no Sb/Br) CU NIPDAUAG F128
CC1350F128RSMT ACTIVE VQFN RSM 32 250 Green (RoHS CU NIPDAU | Level-3-260C-168 HR -40 to 85 CC1350
& no Sb/Br) CU NIPDAUAG F128

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

Addendum-Page 1
PACKAGE OPTION ADDENDUM

www.ti.com 4-Aug-2017

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
PACKAGE MATERIALS INFORMATION

www.ti.com 26-Sep-2017

TAPE AND REEL INFORMATION

*All dimensions are nominal


Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CC1350F128RGZR VQFN RGZ 48 2500 330.0 16.4 7.3 7.3 1.1 12.0 16.0 Q2
CC1350F128RGZT VQFN RGZ 48 250 180.0 16.4 7.3 7.3 1.1 12.0 16.0 Q2
CC1350F128RHBR VQFN RHB 32 3000 330.0 12.4 5.3 5.3 1.1 8.0 12.0 Q2
CC1350F128RHBT VQFN RHB 32 250 180.0 12.4 5.3 5.3 1.1 8.0 12.0 Q2
CC1350F128RSMR VQFN RSM 32 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2
CC1350F128RSMT VQFN RSM 32 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2

Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION

www.ti.com 26-Sep-2017

*All dimensions are nominal


Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
CC1350F128RGZR VQFN RGZ 48 2500 367.0 367.0 38.0
CC1350F128RGZT VQFN RGZ 48 250 210.0 185.0 35.0
CC1350F128RHBR VQFN RHB 32 3000 367.0 367.0 35.0
CC1350F128RHBT VQFN RHB 32 250 210.0 185.0 35.0
CC1350F128RSMR VQFN RSM 32 3000 367.0 367.0 35.0
CC1350F128RSMT VQFN RSM 32 250 210.0 185.0 35.0

Pack Materials-Page 2
IMPORTANT NOTICE

Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its
semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers
should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated
circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and
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Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced
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