Vol. 35, No.

11 Journal of Semiconductors November 2014

Comparative study of leakage power in CNTFET over MOSFET device

Sanjeet Kumar SinhaŽ and Saurabh ChaudhuryŽ
Department of Electrical Engineering, NIT Silchar, Assam-788010, India

Abstract: A comparison of the CNTFET device with the MOSFET device in the nanometer regime is reported.
The characteristics of both devices are observed as varying the oxide thickness. Thereafter, we have analyzed the
effect of the chiral vector and the temperature on the threshold voltage of the CNTFET device. After simulation
on the HSPICE tool, we observed that the high threshold voltage can be achieved at a low chiral vector pair. It is
also observed that the effect of temperature on the threshold voltage of the CNTFET is negligibly small. After that,
we have analyzed the channel length variation and their impact on the threshold voltage of the CNTFET as well as
MOSFET devices. We found an anomalous effect from our simulation result that the threshold voltage increases
with decreasing the channel length in CNTFET devices; this is contrary to the well known short channel effect.
It is observed that at below the 10 nm channel length, the threshold voltage is increased rapidly in the case of the
CNTFET device, whereas in the case of the MOSFET device, the threshold voltage decreases drastically.

Key words: MOSFET; CNTFET; temperature; oxide thickness; threshold voltage; channel length
DOI: 10.1088/1674-4926/35/11/114002 EEACC: 2520

1. Introduction proving the device performance for carbon nanotube field ef-
fect transistorsŒ3 6 . One of the basic ideas is to replace the
The MOSFET (metal oxide semiconductor field effect silicon MOSFETs with CNTFETs, which should overcome all
transistor) has become the most important device for the in- the limitations of silicon MOSFETs such as the exponential in-
tegrated circuit in semiconductor devices. The theme of semi- crease of leakage currents in scaled devicesŒ7 9 . These limits
conductor technology is scaling down the size of the transistor can be overcome to some extent and facilitate the further scal-
and increasing the integration of transistors in a single chip. ing down of device dimensions by modifying the channel ma-
The advanced semiconductor devices have been scaled down terial in the traditional MOSFET structure with a single carbon
to nanoscale size, and the device size is further shrinking as nanotube. Much progress has been made in recent years show-
predicted by Moore’s lawŒ1 . A sub-100-nm MOSFET was first ing that CNT based FETs can outperform the state of the art
developed in the 1980s. Continued success in device scaling is silicon FETs in many ways.
indispensible for the successive improvements in the technol-
ogy of semiconductor devices. The basic MOS transistor size
has shrunk from a feature size of several microns to less than
2. Device structure of MOSFET
45 nm during the last two decades. The short channel effects, The MOSFET is a voltage controlled device, which has
threshold voltage roll-off and drain induced barrier lowering four terminals. If no positive voltage is applied between the
become increasingly significant as the channel length of semi- gate and the source, the MOSFET is always non-conducting.
conductor devices is reduced. The short channel effect limits When we apply a positive voltage (in the case of an N-type
the scaling capability of MOSFETs. MOSFET) to the gate, the positive gate voltage will push away
The lateral geometric dimensions of devices and intercon- the holes inside the p-type substrate and attract the electrons in
nects are reduced, this reduction in size is referred to as scaling the n-type regions under the source and drain electrodes. This
of the geometric dimensions of the integrated circuit. As the produces a layer on the silicon surface just under the gate oxide
oxide thickness scales below 1.5 nm, leakage currents increase through which electrons can get into and move along from the
drastically, leading to high power consumption and reduced de- source to the drain. The positive gate voltage therefore creates
vice reliability. When the channel length of the MOSFET gets a channel in the top layer of the material between the oxide and
below 10 nm, silicon based technology will reach its limits. p-Si.
The semiconductor industry is looking for different ma- Increasing the value of the positive gate voltage pushes the
terials and devices to integrate with the current silicon based p-type holes further away and enlarges the thickness of the cre-
technology for a long term future. The new devices, such as ated channel. As a result, we find that the size of the channel
SOI MOSFET, FinFETs or nanowire MOSFETs obtained ad- increases with the size of the gate voltage and enhances the
ditional performance improvements that overcome the device amount of current that can go from the source to the drain. As
scaling difficultyŒ2 . shown in Fig. 1, the gate contact is separated from the channel
Among the number of investigated solutions, carbon nano by an insulating silicon dioxide (SiO2 / layer in silicon MOS-
tubes (CNTs) are a promising material. Significant advances FET. The charge carriers of the conducting channel constitute
have been achieved in understanding device physics and im- an inversion charge, that is, electrons in the case of a p-type

† Corresponding author. Email: sanjeetksinha@gmail.com, saurabh1971@gmail.com

Received 22 April 2014, revised manuscript received 4 June 2014 © 2014 Chinese Institute of Electronics

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Fig. 1. Schematic of MOSFET device. Fig. 3. Schematic of CNTFET device.

Fig. 2. Rolled up sheet of grapheme.

substrate (n-channel device) or holes in the case of an n-type

substrate (p-channel device), induced in the semiconductor at
the silicon insulator interface by the voltage applied to the gate
electrode.
The continuous scaling of the semiconductor devices and
Fig. 4. Qc versus gate voltage of MOSFET device.
the increase in components on a single chip results in more
complex technology, device and circuit designs. As the gate
length is reduced, the characteristics of a MOSFET change tube (MWNT), depending upon the number of tubes used as
due to the short channel effects. At short gate lengths, MOS- the channel. Semiconducting SWNTs are of special interest be-
FETs suffer from parameters such as threshold voltage shift, in- cause they are promising in producing semiconducting devices
creased leakage current and increased output conductance. The that rival devices made by traditional Si technologyŒ11 14 .
minimum feature size of integrated circuits has shrunk con- The structure of CNTFET is almost the same as silicon
siderably over the last several decades. As a consequence, the MOSFET except the CNT is attached in the transistor and acts
number of transistors has increased over time. as the channel. CNTFET operates on the same principle as
MOSFET, as the electrons travel from the source terminal to
3. Device structure of CNTFET the drain terminal.

The carbon nanotube (CNT) is a promising alternative to 4. CNTFET versus MOSFET

conventional silicon technology for future nanoelectronics be-
cause of their unique electrical properties. Carbon nanotubes MOSFET will reach technological and, most importantly,
are a new modification of carbon, discovered in 1991 by Iji- fundamental physical limits in the nanometer regime. Further-
imaŒ10 . A carbon nanotube field effect transistor (CNTFET) is more, the defect and failure rate at the device and circuit level
a transistor that utilizes a single CNT as the channel material is expected to be much higher than with MOSFET. Therefore,
instead of bulk silicon in the traditional MOSFET structure. it is of great importance for the industry to develop technolo-
CNT’s have unique properties such as stiffness, strength, and gies that will enable continued implementation of increasingly
tenacity compared to other materials especially to siliconŒ7 . higher performance devices. The CNTFET is among the most
Carbon nanotubes are rolled up sheets of grapheme, as shown promising new technologies that could take the place of silicon
in Fig. 2. Graphene appears to be the strongest material ever based electronics.
tested, however, the process of separating it from graphite will A plot of the gate voltage versus the quantum capacitance
require some technological development before it is econom- for the MOSFET is shown in Fig. 4, where we can see that after
ical to be used in industrial processes. CNT is exceptional in decreasing the gate oxide thickness, the quantum capacitance
that it has a perfect crystalline structure, which is composed of increases for the different gate voltages. Whereas in the case of
strong covalent C–C bonds. Carbon has a unique characteris- the CNTFET (Fig. 5) under identical simulating conditions as
tic, among all the elements, of forming long chains of its own in the case of the single gate MOSFET, we observe that as the
atoms, a property called catenation. oxide thickness reduces from 1.5 to 0.7 nm, the quantum ca-
CNTFET uses CNT as a channel between the source and pacitance decreases, when we apply a gate voltage from 0.5 V
the drain in conventional silicon MOSFET, as shown in Fig. 3. and above .
It may be a single wall nanotube (SWNT) or a multi wall nano- Quantum capacitance (Qc) has an important impact in

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Fig. 6. Graphene atomic structure with chiral vector.

Table 1. Threshold voltage W.R.T different Chiral vector.

Fig. 5. Qc versus gate voltage of CNTFET device. Chiral vector (m; n) (m n) Threshold voltage (V)
(4, 0) 4 0.69
(6, 2) 4 0.66
nanoscale devicesŒ15 : it is the properties of the channel ma- (16, 12) 4 0.17
terial. Since the density of state is finite in a semiconductor (8, 0) 8 0.59
quantum well, the Fermi level needs to move up above the con- (9, 1) 8 0.51
duction band edge as the charge in the quantum well increases. ( 17, 9) 8 0.18
This movement of the Fermi level requires energy and this con- (11, 0) 11 0.45
(13, 2) 11 0.33
ceptually corresponds to quantum capacitanceŒ16 .
(24, 13) 11 0.12
Through the results shown in Figs. 4 and 5, we can con- (14, 0) 14 0.33
clude that in the nanoscale regime, CNTFET devices are ad- (17, 3) 14 0.24
vantageous over MOSFET due to their lower quantum capac- (26, 12) 14 0.12
itance, while in MOSFET, the value of quantum capacitance
goes on increasing, which leads to increased propagation de-
lay and hence performance degradation.
.n C m/=2
cos  D p : (2)
n2 C m2 C mn
5. Simulation analysis and result The differences in the chiral angle and the diameter cause
5.1. Effect of chiral vector the differences in the properties of the carbon nanotubes.
p
A carbon nano tube can act as either a conductor or a semi- Vth D a.V… /= 3qDCNT ; (3)
conductor, depending on the angle of the atom arrangement
where q D electronic charge, a D 2.49 Å is the lattice constant,
along the tube. This is referred to as the chirality vector and
and V… D 3.033 eV is the carbon  to  bond energy.
is represented by the integer pair (m, n). The circumference of
CNTFETs provide a unique opportunity to control the
a carbon nanotube can be expressed in terms of a chiral vec-
threshold voltage by changing the chirality vector, or the dia-
tor, C D na1 C ma2 , which connects two equivalent sites of
meter of the CNT (from Eqs. (1) to (3)). The gate-to-source
the two dimensional graphene sheet, as shown in Fig. 6, where
voltage that generates the same reference current is taken as
n and m are integers and a1 and a2 are the unit vectors of the
the threshold voltage for the transistor that has different chi-
hexagonal honeycomb lattice. A simple method to determine if
rality. The chiral vector has an important role in deciding the
a CNT is metallic or semiconducting is to consider its indices
diameter of the carbon nanotube. Through the simulation result
(m, n). The nanotube is metallic if n D m or n m D 3i , where
shown below, it is very much clear that the threshold voltage of
i is an integer. Otherwise, the tube is semiconductingŒ17 .
CNTFET devices can be controlled by varying the chiral vec-
The geometry of the grapheme lattice and the chiral vec-
tor. In Table 1, we have considered 12 such combinations of
tor of the tube determine the structural parameters like the dia-
chiral vector and analyzed them.
meter, unit cell, and its carbon atoms, as well as the size and
When the difference of the chiral vector (m; n) is small e.g.
shape of the Brillouin zone. The diameter of the CNT can be
(m; n) D (4, 0), the threshold voltage is larger (0.69 V), but
calculated based on the following equation:
at the same time, when the difference is small and the chiral
p vector (m; n) is large e.g. (m; n) D (16, 12), then the threshold
3a0 p 2
DCNT D n C m2 C mn; (1) voltage is 0.17 V.
 As the Chiral vector (m; n) goes on increasing, the thresh-
where a0 D 0.142 nm is the inter-atomic distance between each old voltage goes on decreasing.
carbon atom and its neighbor. The direction of the chiral vector We have considered thirteen different chiral vector pairs
is measured by the chiral angle . The chiral angle  can be starting from (4, 0) to (26, 12) and analyzed their corresponding
calculated as threshold voltages. A higher threshold voltage can be achieved

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Table 3. Threshold voltage W.R.T. temperature.

Temperature (ıC) Threshold voltage (V)
10 0.221
20 0.229
30 0.238
40 0.243
50 0.249
60 0.256

Fig. 7. Threshold voltage decreases with increase in chiral vector

(m; n).

Table 2. Threshold voltage W.R.T. temperature.

Temperature (ıC) Threshold voltage (V)
27 0.210
47 0.210
67 0.210
87 0.210
Fig. 8. Threshold voltage versus temperature.
107 0.202
127 0.198
147 0.194
167 0.191
187 0.187
207 0.180
227 0.164

at a smaller value of ‘m’ and at n D 0. The threshold voltage

goes on decreasing while increasing in (m; n), which is shown
in Fig. 7.

5.2. Effect of temperature

The MOSFET device characteristics and circuit behavior
are changes with the increase in temperature. The maximum
tolerable operating temperature for silicon devices is 150 de-
grees. Because of the strong covalent carbon–carbon bond- Fig. 9. Threshold voltage versus temperature.
ing in the sp2 configuration, carbon nanotubes are chemically
inert and are able to transport large amounts of electric cur-
rentŒ18; 19 . Carbon nanotubes are able to conduct heat nearly
as well as diamond. change at higher temperature.
In CNTFET devices, the effect of temperature on thresh- It is observed from the plot shown in Fig. 8, that there is
old voltage is negligibly small. As shown in Table 2, we have slight deviation in the threshold voltage at higher temperatures.
taken eleven such different temperatures starting from 27 to It is shown in the plot given in Fig. 9 that while lower down
227 ıC and analyzed the effect of temperature on threshold the temperature in the negative domain, a 3.5% increment in
voltage. The analysis of negative temperature is shown in Table the threshold voltage is observed, which negligibly affects the
3, where we have considered six negative values of tempera- characteristics of the CNTFET device. Simulation analysis of
ture starting from 10 to 60 ıC and observed the effect on the CNTFET characteristic at different temperatures is shown
the threshold voltage of CNTFET devices. in Figs. 8 and 9. We have analyzed the drain current versus the
In analysis, we found that temperature hardly affects the gate voltage at different drain voltages of the CNTFET device
threshold voltage as there is only 4.6% variation recorded while and observed that the threshold voltage is almost the same in all
raising the temperature from 27 to 227 ıC, which is not pos- temperatures considered and there is small variation in thresh-
sible in the case of the MOSFET, as it operates at maximum old voltage while increasing and decreasing the temperature,
at 150 ıC and the characteristics of the device’s parameters which is negligibly small.

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Fig. 10. Characteristics of MOSFET at different channel lengths.

Fig. 11. Threshold voltage with respect to the channel length of CNT-
FET and MOSFET devices
Table 4. Threshold voltage W.R.T different channel lengths.
Threshold voltage (V)
Channel length (nm)
CNTFET MOSFET
100 0.227 0.241
90 0.227 0.241
80 0.227 0.241
70 0.228 0.242
60 0.228 0.242
50 0.229 0.243
40 0.231 0.245
30 0.239 0.247
20 0.263 0.248
10 0.605 0.168

5.3. Effect of channel length

Fig. 12. Threshold voltage w.r.t channel length.
The channel length is a key parameter in MOSFET de-
vices. In 1960, when the MOSFET was first developed, the
channel length was longer than 20 m. Today channel lengths have considered the channel length from 100 to 10 nm. It can
less than 1 m have been fabricated in volume production, be observed from Table 4 that in CNTFET as the channel length
and lengths less than 0.1 m have been created in research goes down from 20 to 10 nm, the threshold voltage increases
laboratories. Integrated circuit MOSFET devices have became rapidly. A plot of the characteristics of the threshold voltage
smaller and smaller in order to achieve higher packing den- with respect to different channel lengths of CNTFET devices is
sity. Minimization of leakage currents is enormously impor- shown in Fig. 11, whereas in the case of MOSFET devices, the
tant in VLSI these days. As the devices are scaled down in threshold voltage decreases sharply while the channel length
the nanometer regime, the threshold voltage is also scaled, and reduces from 20 to 10 nm.
consequently the leakage power increasesŒ20 23 . Leakage cur- A comparison of threshold voltages with respect to the
rent has become the limiting factor for oxide thickness thin- channel length of CNTFET and MOSFET devices is shown
ner than 1.5 nm. Decreasing the channel length increases the in Fig. 12, where we can see that at below the 20 nm channel
current drive of the transistor. Much of the scaling is there- length, the threshold voltage is increased rapidly in the case
fore driven by a decrease in channel length. If only this para- of the CNTFET device and the threshold voltage goes on de-
meter is scaled, many problems are encountered, such as an in- creasing beyond the 20 nm channel length in the case of the
creased electric field. If the channel length becomes too short, MOSFET, which leads to more leakage power and finally the
the depletion region from the drain can reach the source side device degrades in terms of its performance.
and reduces the barrier for electron injection. This is known as The advantage of using a CNTFET device in the nanome-
punch through, and because of this, device characteristics are ter regime is to increase the threshold voltage at 10 nm and
degraded, as shown in Fig. 10. beyond the channel length. In the case of the MOSFET while
In long channel length devices, the gate is completely re- reducing the channel length, the threshold voltage is also re-
sponsible for depleting the semiconductor. In short channel de- duced, which lead to more leakage power.
vices, part of the depletion is accomplished by the drain and
source bias. Since less gate voltage is required to transistor de- 6. Conclusion
plete, the barrier for electron injection from source to drain
decreases. This is known as drain induced barrier lowering Through the simulation result of the nanoHUB, we have
(DIBL). observed that the CNTFET has a unique property of decreas-
For both the CNTFET as well as MOSFET devices, we ing the quantum capacitance, while reducing the thickness of

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