OZ964

Change Summary
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered

CHANGES
No. Applicable Section Description Page(s)
1 Title Change the title to read ‘Phase-Shift PWM Controller’ 1
Add OZ964GN, OZ964IG, OZ964IGN, OZ964D &
2 Ordering Information 1
OZ964DN
st
3 General Description Add 1 paragraph ‘OZ964 is a high…LCD.’ 1
Functional Block Diagram st st
4 Add 1 paragraph 1 sentence ‘Specific DC/CD…’ 5
Description
Reference Application
5 Add DC/DC Reference Application Circuit 10
Circuit
6 Package information Correct 20 Pin SOIC 300mil drawing 12
7 Throughout data sheet Miscellaneous corrections ---

REVISION HISTORY
Revision No. Description of change Release Date
0.95 Initial Release 1/13/2004
0.96 1. Ordering information: add OZ964SN & OZ964ISN. 2. Pin 3/19/2004
Description: modified pin description of CTIMR, DIM. 3. Electrical
Characteristics: revise a) ‘Nominal Voltage’ Typ limit, b) ‘Normal
Operating Frequency’ Typ limit, c) ‘Ramp Peak’ Typ limit, d)
‘Operating Frequency’ Typ limit, e) ‘Negative-Going Threshold
Voltage’ Max limit, f) ‘SST Current’ Typ limit, g) ‘CTIMR Current 1’
Typ limit, h) ‘Protection Release Threshold’ Typ limit, i) ‘PDR_A/
PDR_C’ Typ`limit, j) ‘Enable’ Min limit, k) ‘NDR_B/ NDR_D’ Typ limit,
l) ‘BBM Time Between PDR and NDR’ Typ limit, m) ‘Minimum
Overlap’ Typ limit. 4. Simplified Functional Block Diagram. 5. Modified
formula in No. 4 Ignition & No. 5 Normal Operation in Functional
Information. 6. Revise Application Circuit. 7. Miscellaneous
corrections.
1.0 1. Electrical Characteristics: a) Fill in Min & Max limits of all 4/5/2004
parameters b) Correct ‘SST Protection Release Threshold’ Typ limit.
2. Application Circuit: Correct a) C10 to 6.8n, b) T1 to 28:2200. 3.
Miscellaneous corrections.
1.1 1. Footer: Add patent number 6,259,615 2. Application circuit: a.) 7/29/2004
Delete R3, R7, R6 & R11. b) Change R9 value from 45.3k to 47K
recipients.

09/03/04 OZ964-DS-1.2 Page 0

Copyright  2004 by O2Micro All Rights Reserved U.S. Patent No. 6,259,615
CONFIDENTIAL
 OZ964
Phase-Shift PWM Controller
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered

FEATURES OZ964 operates in a zero-voltage switching

mode that minimizes electromagnetic
• Controller for high-voltage DC/DC and interference (EMI). In addition, OZ964 achieves a
DC/AC converters high power-conversion efficiency resulting in a
• High efficiency, zero-voltage switching lower operating temperature and higher system
• Supports wide input voltage range reliability.
• Constant operating frequency
• Built-in PWM dimming control with wide OZ964 supports a wide input voltage range and
dimming range provides a constant, user-defined, operating
• Soft start function frequency, ensuring that the CCFLs operate at a
• Built-in intelligence for ignition and normal fixed frequency. This eliminates interference
operation of CCFLs among CCFLs and the LCD panel. Interference
• Built-in open-lamp protection and over- causes electromagnetic compatibility (EMC)
voltage protection problems and may create visual effects
• Shutdown delay for input voltage brownout (waterfall) on LCD panels. The controller
condition provides a phase-shift square wave output that is
• Built-in under-voltage lockout protection able to drive a full bridge power train.
• Toggle pin to reset the IC after shutdown
• Low stand-by power OZ964 utilizes a pulse width modulation (PWM)
dimming method to achieve a wide dimming
range. The IC performs the CCFL dimming
function with an analog or low frequency PWM
ORDERING INFORMATION control. The PWM frequency is user-defined.

Part To avoid over-shoot and in-rush current to the

Temp Range Package CCFLs during ignition, a soft start function is
Number
provided for reliable CCFL operation.
OZ964S 0° C to 70° C 20-pin SSOP
20-pin SSOP, The controller provides open-lamp protection and
OZ964SN 0° C to 70° C
Leadfree over-voltage protection, while providing an
OZ964IS -40° C to +85°C 20-pin SSOP appropriate response for either open-lamp
20-pin SSOP, ignition or removal of a CCFL during normal
OZ964ISN -40° C to +85°C
Leadfree operation. Intelligent open-lamp protection and
OZ964G 0° C to 70° C 20-pin SOIC over voltage protection provides design flexibility
20-pin SOIC, with various transformer characteristics. Open-
OZ964GN 0° C to 70° C
Leadfree lamp protection time is user-defined.
OZ964IG -40° C to +85°C 20-pin SOIC
20-pin SOIC, In addition, OZ964 provides a shutdown delay
OZ964IGN -40° C to +85°C
Leadfree function that will keep the inverter module in
OZ964D 0° C to 70° C 20-pin PDIP normal operation for a short period of time if the
20-pin PDIP, input voltage suddenly drops and subsequently
OZ964DN 0° C to 70° C
Leadfree resumes to a normal level. The shutdown delay
time is user-defined.

OZ964 provides under-voltage lockout protection

GENERAL DESCRIPTION and will disable the IC if VDDA falls below a
threshold. OZ964 will resume normal operation
OZ964 is a high efficiency, Pulse Width when VDDA exceeds the threshold.
Modulation (PWM) controller designed for both
DC/DC and DC/AC high-voltage applications. To reset the IC, toggle the enable (ENA) pin.
The average current mode control is suitable for OZ964 operates with a standby current of
recipients.

DC/DC converters where both voltage and approximately 200uA.

current feedback are required, as well as for Cold
Cathode Fluorescent Lamp (CCFL)_ backlight
applications for small and large Liquid Crystal
Displays (LCD).

09/03/04 OZ964-DS-1.2 Page 1

Copyright  2004 by O2Micro All Rights Reserved U.S. Patent No. 6,259,615
CONFIDENTIAL
 OZ964
PIN DESCRIPTION
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered

Names Pin No. Description

Timing capacitor to provide striking time and timing resistor to provide
CTIMR 1
shutdown delay time
OVP 2 Voltage feedback
ENA 3 Enable input
SST 4 Timing capacitor to provide Soft-Start Time
VDDA 5 Supply voltage
GNDA 6 Signal ground
REF 7 Reference voltage output
RT1 8 Timing resistor to provide striking frequency
FB 9 Current sense feedback
CMP 10 Voltage control loop compensation
NDR_D 11 N-MOSFET gate drive output
PDR_C 12 P-MOSFET gate drive output
LPWM 13 Low-frequency PWM signal for dimming control
DIM 14 DC voltage input for LPWM duty cycle
LCT 15 Timing capacitor to provide LPWM frequency
PGND 16 Power MOSFET driver ground
RT 17 Timing resistor to provide striking and operating frequency
CT 18 Timing capacitor to provide striking and operating frequency
PDR_A 19 P-MOSFET gate drive output
NDR_B 20 N-MOSFET gate drive output

ABSOLUTE MAXIMUM RATINGS(1)

VDDA 7.0V
GNDA, PGND +/- 0.3V
Signal inputs -0.3V to (VDDA +0.3)V

OZ964 OZ964I
Operating Temp.
0oC to 70oC -40oC to +85oC

Operating junction temp. 125 oC

Storage temp. -55 C to 150 oC
o

RECOMMENDED OPERATING RANGE

VDDA 4.6V to 5.5V
fOP- operating frequency 40 kHz to 150kHz(2)
Resistor connected to RT (RRT) 20 kΩ to 150 kΩ
Capacitor connected to CT (CCT) 100pF to 470pF
fLF- LPWM frequency 100Hz to 500Hz
Thermal Impedance (θJ-A)
o
- 20-pin SSOP 80 C/W
o
- 20-pin SOIC 105 C/W

Note (1): The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be
recipients.

guaranteed. The device should not be operated at these limits. The “Functional Specifications” table will
define the conditions for actual device operation. Exposure to absolute maximum rated conditions for
extended periods may affect device reliability.

Note (2): The frequency of PDR_A, NDR_B, PDR_C, and NDR_D outputs pulses, fOP, is half of fosc value,
fOP =(fosc/2).

CONFIDENTIAL OZ964-DS-1.2 Page 2

 OZ964
ELECTRICAL CHARACTERISTICS
Parameter Symbol Test Conditions Limits Unit
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered

o
VDDA=5V; Tamb=25 C; Min Typ Max
Reference Voltage
Nominal voltage Vref Iload = 30µA 3.22 3.35 3.48 V
Temp coefficient o
o - 125 - ppm/ C
(Tamb=25 C)
Line regulation KL VDDA=4.6V to 5.5V - 2 - mV/V
Load regulation KV Iload = 5 µA to 80 µA - 2 - mV
Operating Frequency
(1)
Normal Operating Frequency fop CCT =220pF ;
(1)
61.5 63.0 65.5 kHz
RRT =47kΩ
Temp coefficient o
o - 125 - ppm/ C
(Tamb=25 C)
Ramp peak CT Vpeak 2.35 2.50 2.65 V
Ramp valley CT Vvalley 1.00 1.05 1.12 V
Low Frequency Oscillator
Operating frequency fLF CLCT=6.8nF(2); VDIM=1.2V 209 220 225 Hz
Temp coefficient o
o - 470 - ppm/ C
(Tamb=25 C)
Ramp peak LCT Vpeak 1.96 2.06 2.18 V
Ramp valley LCT Vvalley 0.27 0.31 0.33 V
Duty Cycle Range LPWM 0 - 100 %
Error Amplifier
Reference voltage at non- VADJ VSST=0V 0.49 0.50 0.55 V
inverting input pin (internal) VSST=2V 0.79 0.80 0.81 V
VSST=4V 1.19 1.24 1.29 V
Under-Voltage Lockout
Positive-Going Threshold Voltage 4.3 - - V
Negative-Going Threshold Voltage - - 3.2 V
Supply
Stand-by Current IOFF ENA=low - 200 300 µA
Supply Current ION DIM=1.2V; LPWM=50kΩ
(3)
Ca=Cb=Cc=Cd=0.5nF
(1)
- 3.0 4.2 mA
CCT =220pF ,
(1) (2)
RRT =47kΩ ;CLCT=6.8nF
Soft Start
SST current 4.5 5.5 6.2 µA
Temp coefficient o
o - 420 - ppm/ C
(Tamb=25 C)
SST Protection Release Threshold VDDA VDDA VDDA
V
-1.25 -1.0 -0.93
recipients.

CTIMR
CTIMR current 1 2.0 2.5 2.9 µA
Temp coefficient o
o - 395 - ppm/ C
(Tamb=25 C)
CTIMR current 2 20 30 40 µA
Protection release threshold 2.9 3.1 3.3 V

CONFIDENTIAL OZ964-DS-1.2 Page 3

 OZ964
ELECTRICAL CHARACTERISTICS (CONTINUED)
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered

Parameter Symbol Test Conditions Limits Unit

o
VDDA=5V; Tamb=25 C; Min Typ Max
Output Driver Rds(on)
PDR_A / PDR_C Sourcing=75mA 12 25 35 Ω
NDR_B / NDR_D Sinking=75mA 13 25 36 Ω
Enable Thresholds
Enable 2.3 - - V
Disable - - 1.0 V
Over-Voltage Protection
Threshold Voltage OVP 1.95 2.00 2.20 V
Open-Lamp Protection Threshold
Open-Lamp Threshold CMP> open-lamp threshold
2.54 2.70 2.82 V
causes shutdown
Break-Before-Make (BBM)
BBM Time Between PDR and NDR 150 200 220 ns
Temp coefficient o
o - 495 - ppm/ C
(Tamb=25 C)
Maximum / Minimum Duty Cycle
Maximum Overlap Vsst = 3.75V ;
91 95 - %
Vcmp = 3.24V
Minimum Overlap Vsst = 0.8V ;
- 2.5 3.9 %
Vcmp = 3.5V

(1)
Note
CCT: capacitor from ”CT” (Pin 18) to ground
RRT: resistor from “RT” (Pin 17) to ground
(2)
Note
CLCT: capacitor from “LCT” (Pin 15) to ground
(3)
Note
Ca: capacitor from PDR_A (Pin 19) to VDDA
Cb: capacitor from NDR_B (Pin 20) to ground
Cc: capacitor from PDR_C (Pin 12) to VDDA
Cd: capacitor from NDR_D (Pin 11) to ground
recipients.

CONFIDENTIAL OZ964-DS-1.2 Page 4

 OZ964
FUNCTIONAL BLOCK
DIAGRAM DESCRIPTION
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered

Specific DC/DC applications can be shown with a The Protection Block intelligently monitors and
Reference Application Circuit in Figure 3, page differentiates the striking condition and open-
10. The following discussions will address the lamp condition. The open-lamp protection
OZ964 driving a DC/AC CCFL application. Refer function disables the drive circuit if a fault
to the Functional Block Diagram in Figure 1, page condition is encountered.
6 and the Reference Application Circuit in Figure
2 , page 9. The drive circuit consists of four A current source of 30uA coupled with an
outputs, PDR_A, NDR_B, PDR_C and NDR_D, external capacitor and external resistor
(pins 19, 20, 12 and 11) respectively. The drive connected to pin 1 controls the shutdown delay
circuit is designed to achieve high efficiency, time. The shutdown delay time will keep the
zero-voltage switching operation. The four power inverter module in normal operation for a short
MOSFET gate output drives, PDR_A, NDR_B, period of time if the input voltage suddenly drops
PDR_C and NDR_D are designed such that and subsequently increases to a normal level.
switches QA/QB and QC/QD never turn-on The shutdown delay time is user-defined.
simultaneously. The configuration prevents any
shoot-through issues associated with bridge-type The Under-Voltage Lockout block provides a
power conversion applications. CCFL current brown-out period during which the output signals
regulation is achieved by adjusting the overlap are disabled while the VDDA voltage drops below
conduction between diagonal switches QA/QD a ~3.4V threshold. OZ964 resumes normal
and QB/QC. The overlap is adjusted when the operation once VDDA voltage reaches a voltage
power source voltage varies. threshold of greater than ~4.3V.

The Reference Block provides a precision The LPWM Generator Block provides a low
reference voltage for both internal and external frequency PWM (LPWM) function that provides
uses. wide dimming control for the CCFLs. The LPWM
frequency is user-defined by connecting an
OZ964 is enabled with a voltage greater than 2V external capacitor to LCT (pin 15). An analog
applied to ENA (pin 3). A voltage of less than 1V voltage at DIM (pin 14) is compared with the LCT
to ENA pin will disable the controller. Toggling waveform that yields a LPWM signal to control
ENA (pin 3) from High-Low-High will reset the the power delivered to the CCFLs.
controller.

Soft-start circuitry provides a gradual increase in

power to the drive circuit to power the CCFLs
during the ignition period. The Soft-Start Time
(SST) is user-defined by an external capacitor
connected to SST (pin 4) coupled with an SST
current source of 5.5uA.

A High Frequency Oscillator Block generates a

user-defined operating frequency determined by
an external capacitor (C5) and timing resistor
(R9) connected to CT (pin 18) and RT (pin 17)
respectively. An external resistor (R10)
connected to RT1 (pin 8) in parallel with RT
determines the striking frequency.

The current control loop monitors CCFL current

that is sensed with a voltage at FB (pin 9). The
voltage at FB (pin 9) is input to an Error Amplifier
and the output, CMP (pin 10), regulates the
CCFL current.
recipients.

OZ964 provides an Over-Voltage Protection

(OVP) function to safely operate the CCFLs
under all conditions. The OVP Block regulates
the striking voltage for the CCFL during start-up.
The striking time is user-defined and determined
by an external capacitor connected to CTIMR
(pin 1) coupled with the CTIMR current source of
2.6uA.

CONFIDENTIAL OZ964-DS-1.2 Page 5

 OZ964
FUNCTIONAL BLOCK DIAGRAM
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered

1 20
Fault
Protection
Logic
2 19

3 18

ZVS
4 Phase 17
Shift
Driver
5 V-REF 16
I-BIAS

6
15
+

7 -
14
Control
Logic

8 13

12
9 -

+
11
10

Figure 1
recipients.

CONFIDENTIAL OZ964-DS-1.2 Page 6

 OZ964
FUNCTIONAL INFORMATION
1. Steady-State Operation the voltage at ENA (pin 3) is greater than 2V. The
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered

soft-start time is determined by an external

Referring to the example schematic shown in capacitor (C9) connected to the SST (pin 4). At
Figure 2, page 9, OZ964 drives a full-bridge start-up, as C9 charges via a charging current,
power train where the transformer couples the the voltage level at the capacitor controls the
energy from the power supply source to the gradual increase in power delivered to the
CCFL. The switches in the bridge denoted as transformer T1.
QA, QB, QC and QD are configured such that the
transistors in each pair, QA/QB and QC/QD, are 4. Ignition
turned-on complementarily. The turn-on duration
of the diagonal switches, QA/QD and QB/QC, The OZ964 provides an option of selecting a
simultaneously determines the amount of energy different frequency for striking the CCFLs. The
delivered to the transformer and subsequently to striking time is user-defined and determined by
the CCFL. The current in the CCFL is sensed an external capacitor CCTIMR (C6) and external
and regulated by adjusting the turn-on time resistor RCTIMR (R5) connected to CTIMR (pin 1).
(overlap) for both diagonal switches. This is The approximate striking time is determined by
accomplished through an error amplifier in the the following equation.
current feedback loop.
CCTIMR[µF] x (3-(RCTIMR[kΩ] x 0.0026))
A voltage loop is used to regulate the output T[second] =
voltage for CCFL ignition and is programmable 2.6
by using a capacitor divider (C8/C13).
The approximate striking frequency is determined
Over Voltage Protection (OVP) limits the by the following equation.
transformer voltage under an open-lamp
4
condition. A soft-start circuit ensures a gradual 65•10
increase in power to the CCFL. The soft-start fstriking[kHz] =
capacitor (C9) determines the rate of rise of the CCT[pF]•(RRT // RRT1) [kΩ]
voltage on the SST pin. Meanwhile, the voltage
level determines the turn-on time of the diagonal Note: RRT // RRT1 means RRT is in parallel with RRT.1.
switches QA/QD and QB/QC.
5. Normal Operation
The output drives for the power MOSFET gates
include PDR_A, NDR_B, PDR_C and NDR_D Once the IC is enabled, the voltage at SST (pin
that output a complementary square pulse. The 4) controls the rate of power delivered to the
operation of the four switches is implemented load. SST voltage increases to a level such that
with zero-voltage switching that provides a high- the CCFLs are ignited. The striking frequency is
efficiency power conversion. determined by external components R10, R9 and
C5 connected to RT1 (pin 8), RT (pin 17) and CT
2. Enable (pin 18) respectively.

OZ964 is enabled when the voltage on ENA (pin Once the external resistor R16 senses sufficient
3) is greater than 2V. A voltage of less than 1V current, the control loop takes control and
disables the IC. When the inverter controller is regulates the CCFL current. The normal
disabled, it draws approximately 200uA. An operating frequency is determined by the
under-voltage lockout protection feature is combination of external resistor R9 and external
provided that will disable the IC if VDDA voltage capacitor C5. The operating frequency is
drops below an ~3.4V threshold. The IC will approximated by the following equation.
resume normal operation once VDDA reaches a
4
threshold voltage of greater than ~4.3V. 65•10
fop[kHz] =
3. Soft-Start CCT[pF]•RRT[kΩ]
recipients.

To avoid component stresses and in-rush current

to the CCFLs during ignition, a soft start function
is implemented to provide reliable CCFL
operation. The soft-start function is initiated when

CONFIDENTIAL OZ964-DS-1.2 Page 7

 OZ964
6. Open Lamp Protection 7. Over-Voltage Protection &
Striking Time
If the controller encounters an open lamp,
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered

damaged lamp or lamp removal during normal During start-up, once the voltage at the
operation, the control loop generates a protection transformer secondary reaches a programmed
signal and will immediately shutdown the threshold, the control loop takes over and
controller. regulates the voltage at the transformer
secondary. SST voltage at pin 4 is held constant
OZ964 provides a shutdown delay feature that and CTIMR is activated to provide additional time
keeps the inverter module in normal operation if to ignite an aged CCFL. If no current is sensed
the input voltage suddenly drops and after approximately 1 to 2 seconds, the controller
subsequently recovers. The shutdown delay time shuts down. Toggling the ENA pin will reset the
is user-defined by external resistor RCTIMR (R5) controller.
and external capacitor CCTIMR (C6) connected to
CTIMR (pin 1).
8. PWM Dimming Control
The shutdown delay time is approximated by the
following equation: OZ964 provides a low frequency PWM (LPWM)
dimming function to perform a wide dimming
CCTIMR[µF] x (3 – (RCTIMR [kΩ] * 0.03))
range of 0% to 100%. The LPWM frequency is
T[second] = determined by external capacitor C10 connected
30 to LCT (pin 15). The frequency is approximated
by the following equation.
Note: RCTIMR (R5) value equal or greater than
110kΩ will result in zero delay time. 1496
f LF[Hz] =
Toggling ENA (pin 3) from High-Low-High resets CLCT[nF]
the controller.
The LPWM frequency is user-defined by the
selection of external capacitor C10. An analog
voltage at DIM (pin 14) is compared with the LCT
waveform that yields a LPWM signal to control
the power delivered to the CCFLs. The typical
peak and valley of the LCT waveform is ~2.06V
and ~0.31V respectively.
recipients.

CONFIDENTIAL OZ964-DS-1.2 Page 8

Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered
recipients. OZ964
REFERENCE APPLICATION CIRCUIT

VIN: 8.0V - 22V

VADJ: 2.1V Max. Brightness; 0.6V Min. Brightness
Striking frequency: 75.1KHz
Operating frequency: 63KHz Figure 2
5VDC: 4.75V – 5.25V

CONFIDENTIAL OZ964-DS-1.2 Page 9

Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered
recipients. OZ964
DC/DC REFERENCE APPLICATION CIRCUIT

Figure 3

CONFIDENTIAL OZ964-DS-1.2 Page 10

 OZ964
PACKAGE INFORMATION – 20-PIN SSOP 150mil: OZ964S
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered

Detail A

E E1

h x 45 deg
c
1

ZD

A2

A
0.10MM C
SEATING PLANE
B

A1
e

NOTES:
DIMENSION D DOES NOT INCLUDE M OLD PROTRUSIONS OR GATE BURRS
M OLD PROTRUSIONS AND GATE BURRS SHALL NOT EXCEED 6 MIL PER SIDE

MILLIMETERS MIL
DIM
θ2 MIN NOM MAX MIN NOM MAX
A 1.35 1.63 1.75 53 64 69
A1 0.10 0.15 0.25 4 6 10
A2 - - 1.50 - - 59
B 0.20 - 0.30 8 - 12
c 0.18 - 0.25 7 - 10
θ1 R1 e 0.635 BASIC 25 BASIC
D 8.56 8.66 8.74 337 341 344
Gauge Plane R E 5.79 5.99 6.20 228 236 244
E1 3.81 3.91 3.99 150 154 157
L 0.41 0.635 1.27 16 25 50
0.25MM

h 0.25 - 0.50 10 - 20
θ ZD 1.4732 REF 58 REF
L R1 0.20 - 0.33 8 - 13
R 0.20 - - 8 - -
Detail A θ 0° - 8° 0° - 8°
recipients.

θ1 0° - - 0° - -
θ2 5° 10° 15° 5° 10° 15°
JEDEC MO-137 (AD)

CONFIDENTIAL OZ964-DS-1.2 Page 11

 OZ964
PACKAGE INFORMATION – 20-PIN SOIC 300mil: OZ964G
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered

20 11

D e ta il X

H E

1 10

e c
D

A
Y
S E A T IN G P L A N E

A1
NOTES:
1 . R E F E R T O J E D E C S T D . M S -0 1 3 A C .
2 . D IM E N S IO N S " D " D O E S N O T IN C L U D E M O L D F L A S H , P R O T R U S IO N S O R G A T E B U R R S . M O L D
F L A S H , P R O T R U S IO N S A N D G A T E B U R R S S H A L L N O T E X C E E D 0 .1 5 m m (6 m il) P E R S ID E .
3 . D IM E N S IO N S " E " D O S E N O T IN C L U D E IN T E R L E A D F L A S H O R P R O T U R S IO N S . IN T E R -L E A D
F L A S H A N D P R O T R U S IO N S S H A L L N O T E X C E E D 0 .2 5 m m (1 0 m il) P E R S ID E .
4 . C O N T R O L L IN G D IM E N S IO N : M IL L IM E T E R

O
h x 45
MILLIMETERS MIL
SYMBOL
MIN NOM MAX MIN NOM MAX
A 2.36 2.54 2.64 93 100 104
A1 0.10 0.20 0.30 4 8 12
b 0.35 0.406 0.48 14 16 19
c 0.23 0.254 0.31 9 10 12
D 12.60 12.80 13.00 496 504 512
E 7.40 7.50 7.60 291 295 299
e 1.27 BSC 50 BSC
H 10.00 10.31 10.65 394 406 419
θ h 0.25 0.66 0.75 10 26 30
L DETAIL "X" L 0.51 0.76 1.02 20 30 40
Y - - 0.075 - - 3
θ 0° - 8° 0° - 8°
recipients.

CONFIDENTIAL OZ964-DS-1.2 Page 12

 OZ964
IMPORTANT NOTICE
No portion of O2Micro specifications/datasheets or any of its subparts may be reproduced in any form, or by
any means, without prior written permission from O2Micro.
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered

O2Micro and its subsidiaries reserve the right to make changes to their datasheets and/or products or to
discontinue any product or service without notice, and advise customers to obtain the latest version of
relevant information to verify, before placing orders, that information being relied on is current and complete.
All products are sold subject to the terms and conditions of sale supplied at the time of order
acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability.

O2Micro warrants performance of its products to the specifications applicable at the time of sale in
accordance with O2Micro’s standard warranty. Testing and other quality control techniques are utilized to the
extent O2Micro deems necessary to support this warranty. Specific testing of all parameters of each device
is not necessarily performed, except those mandated by government requirements.

Customer acknowledges that O2Micro products are not designed, manufactured or intended for
incorporation into any systems or products intended for use in connection with life support or other
hazardous activities or environments in which the failure of the O2Micro products could lead to death, bodily
injury, or property or environmental damage (“High Risk Activities”). O2Micro hereby disclaims all warranties,
and O2Micro will have no liability to Customer or any third party, relating to the use of O2Micro products in
connection with any High Risk Activities.

Any support, assistance, recommendation or information (collectively, “Support”) that O2Micro may provide
to you (including, without limitation, regarding the design, development or debugging of your circuit board or
other application) is provided “AS IS.” O2Micro does not make, and hereby disclaims, any warranties
regarding any such Support, including, without limitation, any warranties of merchantability or fitness for a
particular purpose, and any warranty that such Support will be accurate or error free or that your circuit
board or other application will be operational or functional. O2Micro will have no liability to you under any
legal theory in connection with your use of or reliance on such Support.

COPYRIGHT © 2004, O2Micro International Limited

recipients.

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