LT3755/LT3755-1/LT3755-2

40VIN, 75VOUT LED Controllers

FEATURES DESCRIPTION
n 3000:1 True Color PWM™ Dimming The LT®3755, LT3755-1 and LT3755-2 are DC/DC control-
n Wide Input Voltage Range: 4.5V to 40V lers designed to operate as a constant-current source for
n Output Voltage Up to 75V driving high current LEDs. They drive a low side external
n Constant-Current and Constant-Voltage Regulation N-channel power MOSFET from an internal regulated 7.15V
n 100mV High Side Current Sense supply. The fixed frequency, current mode architecture
n Drives LEDs in Boost, Buck Mode, Buck-Boost Mode, results in stable operation over a wide range of supply
SEPIC or Flyback Topology and output voltages. A ground referenced voltage FB pin
n Adjustable Frequency: 100kHz to 1MHz serves as the input for several LED protection features,
n Open LED Protection and also makes it possible for the converter to operate
n Programmable Undervoltage Lockout with Hysteresis as a constant-voltage source. A frequency adjust pin
n Improved Open LED Status Pin (LT3755-2) allows the user to program the frequency from 100kHz
n Frequency Synchronization (LT3755-1) to 1MHz to optimize efficiency, performance or external
n PWM Disconnect Switch Driver component size.
n CTRL Pin Provides Analog Dimming
n Low Shutdown Current: <1µA
The LT3755/LT3755-1/LT3755-2 sense output current at
n Programmable Soft-Start
the high side of the LED string. High side current sensing
n Thermally Enhanced 16-Lead QFN (3mm × 3mm)
is the most flexible scheme for driving LEDs, allowing
boost, buck mode or buck-boost mode configuration.
and MSOP Packages
n AEC-Q100 Qualified For Automotive Applications
The PWM input provides LED dimming ratios of up to
3000:1, and the CTRL input provides additional analog
dimming capability.
APPLICATIONS All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. patents, including 7199560 and 7321203.
n High Power LED
n Battery Chargers
n Accurate Current Limited Voltage Regulators

TYPICAL APPLICATION
50W White Automotive LED Headlamp Driver Efficiency vs VIN
VIN 22µH
8V TO
100
40V 1M 4.7µF
4.7µF 1M VIN
SHDN/UVLO FB 96
VREF ISP 23.7k
185k
332k
EFFICIENCY (%)

LT3755-2 0.1Ω 1A
CTRL 92
INTVCC 40.2k ISN
GATE
100k 88
SENSE
OPENLED 0.015Ω 50W
PWM
LED 84
SS STRING
RT PWMOUT
VC GND INTVCC
28.7k 80
0.01µF 0 10 20 30 40
375kHz 10k 4.7µF
VIN (V)
0.001µF 37551 TA01b

37551 TA01a

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LT3755/LT3755-1/LT3755-2
ABSOLUTE MAXIMUM RATINGS (Note 1)

VIN.............................................................................40V RT.............................................................................1.5V
SHDN/UVLO (Note 3).................................................40V SENSE.......................................................................0.5V
ISP, ISN......................................................................75V Operating Junction Temperature Range (Notes 2, 5)
INTVCC....................................................... VIN + 0.3V, 8V LT3755E/LT3755I................................–40°C to 125°C
GATE, PWMOUT (Note 4).......................... INTVCC + 0.3V LT3755H/LT3755J..............................–40°C TO 150°C
CTRL, PWM, OPENLED..............................................12V Storage Temperature Range.................... –65°C to 150°C
VC, VREF, SS, FB...........................................................3V Lead Temperature (Soldering, 10 sec)
SYNC...........................................................................8V MSOP................................................................ 300°C

PIN CONFIGURATION
TOP VIEW
CTRL

ISN
ISP
VC

16 15 14 13
TOP VIEW
VREF 1 12 FB PWMOUT 1 16 GATE
PWM 2 11 PWMOUT FB 2 15 SENSE
17 ISN 3 14 VIN
SYNC OR OPENLED 3 GND 10 GATE ISP 4 17 13 INTVCC
VC 5 GND 12 SHDN/UVLO
SS 4 9 SENSE
CTRL 6 11 RT
5 6 7 8 VREF 7 10 SS
PWM 8 9 SYNC OR OPENLED
RT
SHDN/UVLO
INTVCC
VIN

MSE PACKAGE
16-LEAD PLASTIC MSOP
TJMAX = 125°C (E, I GRADES), TJMAX = 150°C (H, J GRADES), θJA = 43°C/W, θJC = 4°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
UD PACKAGE
16-LEAD (3mm × 3mm) PLASTIC QFN
TJMAX = 125°C, θJA = 68°C/W, θJC = 4.2°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB

ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3755EUD#PBF LT3755EUD#TRPBF LDGC 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LT3755IUD#PBF LT3755IUD#TRPBF LDGC 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LT3755EUD-1#PBF LT3755EUD-1#TRPBF LDMS 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LT3755IUD-1#PBF LT3755IUD-1#TRPBF LDMS 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LT3755EUD-2#PBF LT3755EUD-2#TRPBF LFJZ 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LT3755IUD-2#PBF LT3755IUD-2#TRPBF LFJZ 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C
LT3755EMSE#PBF LT3755EMSE#TRPBF 3755 16-Lead Plastic MSOP –40°C to 125°C
LT3755IMSE#PBF LT3755IMSE#TRPBF 3755 16-Lead Plastic MSOP –40°C to 125°C
LT3755EMSE-1#PBF LT3755EMSE-1#TRPBF 37551 16-Lead Plastic MSOP –40°C to 125°C
LT3755IMSE-1#PBF LT3755IMSE-1#TRPBF 37551 16-Lead Plastic MSOP –40°C to 125°C
LT3755EMSE-2#PBF LT3755EMSE-2#TRPBF 37552 16-Lead Plastic MSOP –40°C to 125°C
LT3755IMSE-2#PBF LT3755IMSE-2#TRPBF 37552 16-Lead Plastic MSOP –40°C to 125°C
LT3755HMSE-2#PBF LT3755HMSE-2#TRPBF 37552 16-Lead Plastic MSOP –40°C to 150°C
LT3755JMSE-2#PBF LT3755JMSE-2#TRPBF 37552 16-Lead Plastic MSOP –40°C to 150°C

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 LT3755/LT3755-1/LT3755-2
ORDER INFORMATION
AUTOMOTIVE PRODUCTS**
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3755EMSE#WPBF LT3755EMSE#WTRPBF 3755 16-Lead Plastic MSOP –40°C to 125°C
LT3755IMSE#WPBF LT3755IMSE#WTRPBF 3755 16-Lead Plastic MSOP –40°C to 125°C
LT3755EMSE-1#WPBF LT3755EMSE-1#WTRPBF 37551 16-Lead Plastic MSOP –40°C to 125°C
LT3755IMSE-1#WPBF LT3755IMSE-1#WTRPBF 37551 16-Lead Plastic MSOP –40°C to 125°C
LT3755EMSE-2#WPBF LT3755EMSE-2#WTRPBF 37552 16-Lead Plastic MSOP –40°C to 125°C
LT3755IMSE-2#WPBF LT3755IMSE-2#WTRPBF 37552 16-Lead Plastic MSOP –40°C to 125°C
LT3755HMSE-2#WPBF LT3755HMSE-2#WTRPBF 37552 16-Lead Plastic MSOP –40°C to 150°C
LT3755JMSE-2#WPBF LT3755JMSE-2#WTRPBF 37552 16-Lead Plastic MSOP –40°C to 150°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your
local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for
these models.

ELECTRICAL
The CHARACTERISTICS l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Minimum Operating Voltage VIN Tied to INTVCC l 4.5 V
VIN Shutdown IQ SHDN/UVLO = 0V, PWM = 0V 0.1 1 µA
SHDN/UVLO = 1.15V, PWM = 0V 5 µA
VIN Operating IQ (Not Switching) PWM = 0V 1.4 1.7 mA
VREF Voltage 100µA ≤ IVREF ≤ 0µA (E, I, H-Grades) l 1.965 2.00 2.045 V
80µA ≤ IVREF ≤ 0µA (J-Grade only) l 1.965 2.00 2.045 V
VREF Line Regulation 4.5V ≤ VIN ≤ 40V 0.006 %/V
SENSE Current Limit Threshold l 98 108 118 mV
SENSE Input Bias Current Current Out of Pin 40 µA
SS Pull-Up Current Current Out of Pin 8 10 13 µA
Error Amplifier
ISP/ISN Full-Scale Current Sense Threshold FB = 0V, ISP = 48V l 96 100 103 mV
J-Grade l 95.5 100 103 mV
ISP/ISN Full-Scale Current Sense Threshold at CTRL = 0V CTRL = 0V, FB = 0V, ISP = 48V –12 –9.5 –7 mV
CTRL Pin Range for Current Sense Threshold Adjustment l 0 1.1 V
CTRL Input Bias Current Current Out of Pin 50 100 nA
LED Current Sense Amplifier Input Common Mode Range (VISN) l 2.9 75 V
ISP/ISN Short-Circuit Threshold ISN = 0V 115 150 200 mV
ISP/ISN Short-Circuit Fault Sensing Common Mode Range (VISN) l 0 3 V
ISP/ISN Input Bias Current (Combined) PWM = 5V (Active), ISP = ISN = 48V 55 µA
PWM = 0V (Standby), ISP = ISN = 48V 0 0.1 µA

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LT3755/LT3755-1/LT3755-2
ELECTRICAL
The CHARACTERISTICS l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
LED Current Sense Amplifier gm V(ISP – ISN) = 100mV 120 µS
VC Output Impedance 1V < VC < 2V 15000 kΩ
VC Standby Input Bias Current PWM = 0V –20 20 nA
FB Regulation Voltage (VFB) 1.232 1.250 1.265 V
ISP = ISN l 1.220 1.250 1.270 V
J-Grade l 1.215 1.250 1.275 V
FB Amplifier gm FB = VFB, ISP = ISN 480 µS
FB Pin Input Bias Current Current Out of Pin 40 100 nA
FB Open LED Threshold OPENLED Falling (LT3755 and LT3755-2) VFB  – VFB – VFB – V
65mV 50mV 40mV
FB Overvoltage Threshold PWMOUT Falling VFB + VFB + VFB + V
50mV 60mV 75mV
VC Current Mode Gain – (∆VVC /∆VSENSE) 4 V/V
Oscillator
Switching Frequency RT = 100k l 90 100 125 kHz
RT = 10k 925 1000 1050 kHz
Minimum Off-Time 170 ns
Linear Regulator
INTVCC Regulation Voltage 7 7.15 7.3 V
Dropout (VIN – INTVCC) IINTVCC = –10mA, VIN = 7V 350 mV
INTVCC Undervoltage Lockout 3.9 4.1 4.3 V
INTVCC Current Limit 29 34 40 mA
INTVCC Current in Shutdown SHDN/UVLO = 0V, INTVCC = 7V 8 12 µA
Logic Inputs/Outputs
PWM Input High Voltage l 1.5 V
PWM Input Low Voltage l 0.4 V
PWM Pin Resistance to GND 45 60 kΩ
PWMOUT Output Low (VOL) 0 50 mV
PWMOUT Output High (VOH) INTVCC – V
0.05
SHDN/UVLO Threshold Voltage Falling E-, I-Grades l 1.185 1.220 1.245 V
H-Grade l 1.175 1.245 V
J-Grade l 1.159 1.260 V
SHDN/UVLO Rising Hysteresis 20 mV
SHDN/UVLO Input Low Voltage IVIN Drops Below 1µA 0.4 V
SHDN/UVLO Pin Bias Current Low SHDN/UVLO = 1.15V 1.7 2.05 2.5 µA
SHDN/UVLO Pin Bias Current High SHDN/UVLO = 1.30V 10 100 nA
OPENLED Output Low (VOL) IOPENLED = 0.5mA (LT3755 and LT3755-2) 200 mV
SYNC Pin Resistance to GND LT3755-1 Only 30 kΩ
SYNC Input High LT3755-1 Only 1.5 V
SYNC Input Low LT3755-1 Only 0.4 V

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 LT3755/LT3755-1/LT3755-2
ELECTRICAL
The CHARACTERISTICS l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Gate Driver
tr GATE Driver Output Rise Time CL = 3300pF 35 ns
tf GATE Driver Output Fall Time CL = 3300pF 35 ns
GATE Output Low (VOL) 0.05 V
GATE Output High (VOH) INTVCC – V
0.05

Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 3: For VIN below 6V, the SHDN/UVLO pin must not exceed VIN for
may cause permanent damage to the device. Exposure to any Absolute proper operation.
Maximum Rating condition for extended periods may affect device Note 4: GATE and PWMOUT pins are driven either to GND or INTVCC by
reliability and lifetime. internal switches. Do not connect these pins externally to a power supply.
Note 2: The LT3755E, LT3755E-1 and LT3755E-2 are guaranteed to meet Note 5: The LT3755 includes overtemperature protection that is intended
performance specifications from 0°C to 125°C junction temperature. to protect the device during momentary overload conditions. Junction
Specifications over the –40°C to 125°C operating junction temperature temperature will exceed the maximum operating junction temperature
range are assured by design, characterization and correlation with when overtemperature protection is active. Continuous operating above
statistical process controls. The LT3755I, LT3755I-1 and LT3755I-2 are the specified maximum operating junction temperature may impair device
guaranteed to meet performance specifications over the –40°C to 125°C reliability.
operating junction temperature range. The LT3755H-2 and LT3577J-2
are guaranteed to meet performance specifications over the full –40°C to
150°C operating junction temperature range. High junction temperatures
degrade operating lifetimes. Operating lifetime is derated at junction
temperatures greater than 125°C.

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LT3755/LT3755-1/LT3755-2
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.

V(ISP – ISN) Threshold

V(ISP – ISN) Threshold vs VCTRL V(ISP – ISN) Threshold vs VISP vs Temperature
120 103 103
VCTRL = 2V VCTRL = 2V
100 102 102

V(ISP – ISN) THRESHOLD (mV)

V(ISP – ISN) THRESHOLD (mV)

V(ISP – ISN) THRESHOLD (mV)

80
101 101
60
100 100
40
99 99
20

0 98 98

–20 97 97
0 0.5 1 1.5 2 0 20 40 60 80 –50 –25 0 25 50 75 100 125 150
VCTRL (V) ISP VOLTAGE (V) TEMPERATURE (°C)
37551 G01 37551 G02 37551 G03

FB Regulation Voltage
vs Temperature VREF Voltage vs Temperature VREF Voltage vs VIN
1.28 2.04 2.04

1.27 2.03 2.03

1.26 2.02 2.02

1.25 2.01 2.01

VREF (V)

VREF (V)
VFB (V)

1.24 2.00 2.00

1.23 1.99 1.99

1.22 1.98 1.98

1.21 1.97 1.97

1.20 1.96 1.96

–50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150 0 10 20 30 40
TEMPERATURE (°C) TEMPERATURE (°C) VIN (V)
37551 G04 37551 G05 37551 G06

Switching Frequency SHDN/UVLO Hysteresis Current

Switching Frequency vs RT vs Temperature vs Temperature
10000 500 2.4
RT = 26.7k
SWITCHING FREQUENCY (kHz)

SWITCHING FREQUENCY (kHz)

450 2.2
1000
ISHDN/UVLO (µA)

400 2.0

100
350 1.8

10 300 1.6
10 100 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150
RT (k) TEMPERATURE (°C) TEMPERATURE (°C)
37551 G07
37551 G08 37551 G09

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 LT3755/LT3755-1/LT3755-2
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.

SENSE Current Limit Threshold SHDN/UVLO Threshold

Quiescent Current vs VIN vs Temperature vs Temperature
2.0 110 1.28
PWM = 0V

1.26
105

SHDN/UVLO VOLTAGE (V)

SENSE THRESHOLD (mV)
1.5
SHDN/UVLO RISING
VIN CURRENT (mA)

1.24

1.0 100
1.22 SHDN/UVLO FALLING

0.5 95
1.20

0 90 1.18
0 10 20 30 40 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150
VIN (V) TEMPERATURE (°C) TEMPERATURE (°C)
37551 G10 37551 G11 37551 G12

INTVCC Current Limit

INTVCC Voltage vs VIN vs Temperature INTVCC Voltage vs Temperature
8 40 7.4

38
INTVCC CURRENT LIMIT (mA)

6 7.3

36
VINTVCC (V)

INTVCC (V)
4 7.2
34

2 7.1
32

0 30 7.0
0 10 20 30 40 –50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150
VIN (V) TEMPERATURE (°C) TEMPERATURE (°C)
37551 G13 37551 G14 37551 G15

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LT3755/LT3755-1/LT3755-2
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.

SENSE Current Limit Threshold Gate Rise/Fall Time

vs Duty Cycle V(ISP-ISN) Threshold vs FB Voltage vs Capacitance
115 125 100
VCTRL = 2V 10% TO 90%

100 80

V(ISP – ISN) THRESHOLD (mV)

110
SENSE THRESHOLD (mV)

GATE RISE
TIME
75 60

TIME (ns)
105 GATE
50 40 FALL TIME

100
25 20

95 0 0
0 25 50 75 100 1.2 1.22 1.24 1.26 1.28 0 2 4 6 8 10
DUTY CYCLE (%) FB VOLTAGE (V) CAPACITANCE (nF)
37551 G16 37551 G17 37551 G18

ISP/ISN Input Bias Current INTVCC Dropout Voltage

vs CTRL Voltage vs Current, Temperature
40 0

TA = –45°C
ISP
–0.5
INPUT BIAS CURRENT (µA)

30
TA = 25°C
LDO DROPOUT (V)

ISN
–1.0 TA = 125°C
20 TA = 150°C

–1.5

10
–2.0

VIN = 7V
0 –2.5
0 0.5 1 1.5 2 0 5 10 15 20 25 30
CTRL (V) LDO CURRENT (mA)
37551 G19 37551 G20

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 LT3755/LT3755-1/LT3755-2
PIN FUNCTIONS (MSOP/QFN)
PWMOUT (Pin 1/Pin 11): Buffered Version of PWM Signal an offset for 0V < VCTRL < 1V. For VCTRL > 1.2V the current
for Driving LED Load Disconnect NMOS or Level Shift. sense threshold is constant at the full-scale value of 100mV.
This pin also serves in a protection function for the FB For 1V < VCTRL < 1.2V, the dependence of current sense
overvoltage condition—will toggle if the FB input is greater threshold upon VCTRL transitions from a linear function
than the FB regulation voltage (VFB) plus 60mV (typical). to a constant value, reaching 98% of full-scale value by
The PWMOUT pin is driven from INTVCC. Use of a FET with VCTRL = 1.1V. Do not leave this pin open.
gate cut-off voltage higher than 1V is recommended. VREF (Pin 7/Pin 1): Voltage Reference Output Pin, Typically
FB (Pin 2/Pin 12): Voltage Loop Feedback Pin. FB is 2V. This pin drives a resistor divider for the CTRL pin, either
intended for constant-voltage regulation or for LED protec- for analog dimming or for temperature limit/compensation
tion/open LED detection. The internal transconductance of LED load. Can supply up to 100μA.
amplifier with output VC will regulate FB to 1.25V (nominal) PWM (Pin 8/Pin 2): A signal low turns off switcher, idles
through the DC/DC converter. If the FB input is regulating oscillator and disconnects VC pin from all internal loads.
the loop, the OPENLED pull-down is asserted. This ac- PWMOUT pin follows PWM pin. PWM has an internal pull-
tion may signal an open LED fault. If FB is driven above down resistor. If not used, connect to INTVCC.
the FB threshold (by an external power supply spike, for
example), the OPENLED pull-down will be de-asserted and OPENLED (Pin 9/Pin 3, LT3755 and LT3755-2): An
the PWMOUT pin will be driven low to protect the LEDs open-collector pull-down on OPENLED asserts if the FB
from an overcurrent event. Do not leave the FB pin open. input is greater than the FB regulation threshold minus
If not used, connect to GND. 50mV (typical). To function, the pin requires an external
pull-up current less than 1mA. When the PWM input is low
ISN (Pin 3/Pin 13): Connection Point for the Negative and the DC/DC converter is idle, the OPENLED condition
Terminal of the Current Feedback Resistor. If ISN is greater is latched to the last valid state when the PWM input was
than 2.9V, the LED current can be programmed by ILED = high. When PWM input goes high again, the OPENLED
100mV/RLED when VCTRL > 1.2V or ILED = (VCTRL –100mV)/ pin will be updated. This pin may be used to report an
(10 • RLED) when VCTRL ≤ 1V. Input bias current is typi- open LED fault.
cally 25µA. Below 3V, ISN is an input to the short-circuit
protection feature that forces GATE to 0V if ISP exceeds SYNC (Pin 9/Pin 3, LT3755-1 Only): The SYNC pin is used
ISN by more than 150mV (typ). to synchronize the internal oscillator to an external logic
level signal. The RT resistor should be chosen to program
ISP (Pin 4/Pin 14): Connection Point for the Positive an internal switching frequency 20% slower than the SYNC
Terminal of the Current Feedback Resistor. Input bias pulse frequency. Gate turn-on occurs a fixed delay after
current is dependent upon CTRL pin voltage as shown the rising edge of SYNC. For best PWM performance, the
in the TPC. ISP is an input to the short‑circuit protection PWM rising edge should occur at least 200ns before the
feature when ISN is less than 3V. SYNC rising edge. Use a 50% duty cycle waveform to drive
VC (Pin 5/Pin 15): Transconductance Error Amplifier this pin. This pin replaces OPENLED on LT3755-1 option
Output Pin Used to Stabilize the Voltage Loop with an RC parts. If not used, tie this pin to GND.
Network. This pin is high impedance when PWM is low, a SS (Pin 10/Pin 4): Soft-Start Pin. This pin modulates
feature that stores the demand current state variable for oscillator frequency and compensation pin voltage (VC)
the next PWM high transition. Connect a capacitor between clamp. The soft-start interval is set with an external capac-
this pin and GND; a resistor in series with the capacitor is itor. The pin has a 10µA (typical) pull-up current source
recommended for fast transient response. to an internal 2.5V rail. The soft-start pin is reset to GND
CTRL (Pin 6/Pin 16): Current Sense Threshold Adjustment by an undervoltage condition (detected by SHDN/UVLO
Pin. Regulating threshold V(ISP – ISN) is 1/10th VCTRL plus pin) or thermal limit.

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LT3755/LT3755-1/LT3755-2
PIN FUNCTIONS (MSOP/QFN)

RT (Pin 11/Pin 5): Switching Frequency Adjustment Pin. VIN (Pin 14/Pin 8): Input Supply Pin. Must be locally
Set the frequency using a resistor to GND (for resistor bypassed with a 0.22µF (or larger) capacitor placed close
values, see the Typical Performance curve or Table 1). Do to the IC.
not leave the RT pin open.
SENSE (Pin 15/Pin 9): The current sense input for the
SHDN/UVLO (Pin 12/Pin 6): Shutdown and Undervoltage control loop. Kelvin connect this pin to the positive ter-
Detect Pin. An accurate 1.22V falling threshold with ex- minal of the switch current sense resistor, RSENSE, in the
ternally programmable hysteresis detects when power is source of the NFET. The negative terminal of the current
OK to enable switching. Rising hysteresis is generated sense resistor should be Kelvin connected to the GND
by the external resistor divider and an accurate internal plane of the IC.
2.1µA pull-down current. Above the threshold (but below
GATE (Pin 16/Pin 10): N-channel FET Gate Driver Output.
6V), SHDN/UVLO input bias current is sub‑µA. Below the
Switches between INTVCC and GND. Driven to GND during
falling threshold, a 2.1µA pull-down current is enabled so
shutdown, fault or idle states.
the user can define the hysteresis with the external resistor
selection. An undervoltage condition resets soft-start. Exposed Pad (Pin 17/Pin 17): Ground. This pin also serves
Tie to 0.4V, or less, to disable the device and reduce VIN as current sense input for control loop, sensing negative
quiescent current below 1µA. terminal of current sense resistor. Solder the Exposed Pad
directly to ground plane.
INTVCC (Pin 13/Pin 7): Regulated Supply for Internal
Loads, GATE Driver and PWMOUT Driver. Supplied from
VIN and regulates to 7.15V (typical). INTVCC must be
bypassed with a 4.7µF capacitor placed close to the pin.
Connect INTVCC directly to VIN if VIN is always less than
or equal to 8V.

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 LT3755/LT3755-1/LT3755-2
BLOCK DIAGRAM

SHDN/UVLO – A6 FB VC
– PWMOUT PWM VIN

1.22V
+ SHDN
+
1.3V
OVFB
– LDO
2.1µA 1.25V
COMPARATOR +A8 7.15V INTVCC
A5
+ 10µA AT
gm
1.25V – FB = 1.25V

SHORT-CIRCUIT
DETECT SCILMB
+ 10µA
A10 SCILMB
+ 150mV – + GATE
– gm A2
R Q
DRIVER
ISN EAMP – PWM
S
+ 10µA AT COMPARATOR
ISP 5k A1 ISENSE
– A1+ = A1– SENSE
+
CTRL A4
CTRL BUFFER –
+
1.1V + A3 Q2 GND
– VC RAMP
GENERATOR
SSCLAMP
50k
100KHz TO 1MHz
OSCILLATOR OPENLED
FAULT 10µA –
VREF
140µA LOGIC 1.25V + 1.2V OPTION
+ + FOR
– TLIM
– FREQ
FB
LT3755
170k 165°C PROG AND
+A7 LT3755-2
2V

SS RT SYNC OPTION FOR

LT3755-1
37551 BD

Rev. E

For more information www.analog.com 11

LT3755/LT3755-1/LT3755-2
OPERATION
The LT3755 is a constant-frequency, current mode control- ference between ISP and ISN is monitored to determine if
ler with a low side NMOS gate driver. The GATE pin and the output is in a short-circuit condition. If the difference
PWMOUT pin drivers and other chip loads are powered between ISP and ISN is greater than 150mV (typical), the
from INTVCC, which is an internally regulated supply. In SR latch will be reset regardless of the PWM comparator.
the discussion that follows it will be helpful to refer to These functions are intended to protect the power switch
the Block Diagram of the IC. In normal operation with the as well as various external components in the power path
PWM pin low, the GATE and PWMOUT pins are driven to of the DC/DC converter.
GND, the VC pin is high impedance to store the previous
In voltage feedback mode, the operation is similar to that
switching state on the external compensation capacitor,
described above, except the voltage at the VC pin is set
and the ISP and ISN pin bias currents are reduced to
by the amplified difference of the internal reference of
leakage levels. When the PWM pin transitions high, the
1.25V (nominal) and the FB pin. If FB is lower than the
PWMOUT pin transitions high after a short delay. At the
reference voltage, the switch current will increase; if FB
same time, the internal oscillator wakes up and gener-
is higher than the reference voltage, the switch demand
ates a pulse to set the PWM latch, turning on the external
current will decrease. The LED current sense feedback
power MOSFET switch (GATE goes high). A voltage input
interacts with the FB voltage feedback so that FB will not
proportional to the switch current, sensed by an external
exceed the internal reference and the voltage between ISP
current sense resistor between the SENSE and GND input
and ISN will not exceed the threshold set by the CTRL pin.
pins, is added to a stabilizing slope compensation ramp
For accurate current or voltage regulation, it is necessary
and the resulting “switch current sense” signal is fed into
to be sure that under normal operating conditions the
the positive terminal of the PWM comparator. The current
appropriate loop is dominant. To deactivate the voltage
in the external inductor increases steadily during the time
loop entirely, FB can be connected to GND. To deactivate
the switch is on. When the switch current sense voltage
the LED current loop entirely, the ISP and ISN should be
exceeds the output of the error amplifier, labeled “VC”,
tied together and the CTRL input tied to VREF .
the latch is reset and the switch is turned off. During the
switch-off phase, the inductor current decreases. At the Two LED specific functions featured on the LT3755 are
completion of each oscillator cycle, internal signals such controlled by the voltage feedback pin. First, when the
as slope compensation return to their starting points and a FB pin exceeds a voltage 50mV lower (–4%) than the FB
new cycle begins with the set pulse from the oscillator. regulation voltage, the pull-down driver on the OPENLED
pin is activated (LT3755 and LT3755-2 only). This func-
Through this repetitive action, the PWM control algorithm
tion provides a status indicator that the load may be
establishes a switch duty cycle to regulate a current or
disconnected and the constant-voltage feedback loop is
voltage in the load. The VC signal is integrated over many
taking control of the switching regulator. When the FB pin
switching cycles and is an amplified version of the differ-
exceeds the FB regulation voltage by 60mV (5% typical),
ence between the LED current sense voltage, measured
the PWMOUT pin is driven low, ignoring the state of the
between ISP and ISN, and the target difference voltage
PWM input. In the case where the PWMOUT pin drives a
set by the CTRL pin. In this manner, the error amplifier
disconnect NFET, this action isolates the LED load from GND
sets the correct peak switch current level to keep the
preventing excessive current from damaging the LEDs. If
LED current in regulation. If the error amplifier output
the FB input exceeds both the open LED and the overvoltage
increases, more current is demanded in the switch; if it
thresholds, then an externally driven overvoltage event
decreases, less current is demanded. The switch current
has caused the FB pin to be too high and the OPENLED
is monitored during the on-phase and the voltage across
pull-down will be de-asserted. The LT3755-2 will re-assert
the SENSE pin is not allowed to exceed the current limit
the OPENLED signal when FB falls below the overvoltage
threshold of 108mV (typical). If the SENSE pin exceeds
threshold and remains above the OPENLED threshold. The
the current limit threshold, the SR latch is reset regardless
LT3755 is prevented from re-asserting OPENLED until FB
of the output state of the PWM comparator. Likewise, at
drops below both thresholds.
an ISP/ISN common mode voltage less than 3V, the dif-
Rev. E

12 For more information www.analog.com

 LT3755/LT3755-1/LT3755-2
APPLICATIONS INFORMATION
INTVCC Regulator Bypassing and Operation The following equations should be used to determine the
values of the resistors:
The INTVCC pin requires a capacitor for stable operation
and to store the charge for the large GATE switching cur- R1+ R2
rents. Choose a 10V rated low ESR, X7R or X5R ceramic VIN,FALLING = 1.22 •
R2
capacitor for best performance. A 4.7µF capacitor will be VIN,RISING = 2.1µA • R1 + VIN,FALLING
adequate for many applications. Place the capacitor close
to the IC to minimize the trace length to the INTVCC pin
and also to the IC ground. VIN

An internal current limit on the INTVCC output protects

LT3755 R1
the LT3755 from excessive on-chip power dissipation. SHDN/UVLO
The minimum value of this current should be considered R2
when choosing the switching NMOS and the operating
frequency.
37551 F01

Figure 1. Resistor Connection to Set

IINTVCC can be calculated from the following equation: VIN Undervoltage Shutdown Threshold
IINTVCC = QG • fOSC
Careful choice of a lower QG FET will allow higher switch- LED Current Programming
ing frequencies, leading to smaller magnetics. The INTVCC The LED current is programmed by placing an appropriate
pin has its own undervoltage disable (UVLO) set to 4.1V value current sense resistor, RLED, in series with the LED
(typical) to protect the external FETs from excessive power string. The voltage drop across RLED is (Kelvin) sensed
dissipation caused by not being fully enhanced. If the by the ISP and ISN pins. Typically, sensing of the current
INTVCC pin drops below the UVLO threshold, the GATE should be done at the top of the LED string. If this option
and PWMOUT pins will be forced to 0V and the soft-start is not available, then the current may be sensed at the
pin will be reset. bottom of the string, but take caution that the minimum
If the input voltage, VIN, will not exceed 8V, then the IN- ISN value does not fall below 3V, which is the lower limit of
TVCC pin could be connected to the input supply. Be aware the LED current regulation function. The CTRL pin should
that a small current (less than 12μA) will load the INTVCC be tied to a voltage higher than 1.2V to get the full-scale
in shutdown. This action allows the LT3755 to operate 100mV (typical) threshold across the sense resistor. The
from VIN as low as 4.5V. If VIN is normally above, but CTRL pin can also be used to dim the LED current to zero,
occasionally drops below the INTVCC regulation voltage, although relative accuracy decreases with the decreasing
then the minimum operating VIN will be close to 6V . This voltage sense threshold. When the CTRL pin voltage is
value is determined by the dropout voltage of the linear less than 1V, the LED current is:
regulator and the INTVCC undervoltage lockout threshold V − 100mV
mentioned above. ILED = CTRL
RLED • 10

Programming the Turn-On and Turn-Off Thresholds When the CTRL pin voltage is between 1V and 1.2V the LED
with the SHDN/UVLO Pin current varies with CTRL, but departs from the equation
The falling UVLO value can be accurately set by the resistor above by an increasing amount as CTRL voltage increases.
divider. A small 2.1µA pull-down current is active when Ultimately, above CTRL = 1.2V the LED current no longer
SHDN/UVLO is below the threshold. The purpose of this varies with CTRL. At CTRL = 1.1V, the actual value of ILED
current is to allow the user to program the rising hysteresis. is ~98% of the equation’s estimate.

Rev. E

For more information www.analog.com 13

LT3755/LT3755-1/LT3755-2
APPLICATIONS INFORMATION
When VCTRL is higher than 1.2V, the LED current is operation will not exceed 1.1V. For an LED driver of buck or
regulated to: a buck-boost configuration, the output voltage is typically
level-shifted to a signal with respect to GND as illustrated
100mV
ILED = in Figure 3. The output can be expressed as:
RLED
R3
VOUT = VBE + 1.25 •
The LED current programming feature can increase total R4
dimming range by a factor of 10. The CTRL pin should
not be left open (tie to VREF if not used). The CTRL pin +
can also be used in conjunction with a thermistor to R3 RSEN(EXT)
VOUT COUT
provide overtemperature protection for the LED load, or LED
ARRAY
with a resistor divider to VIN to reduce output power and LT3755
– 100k
37551 F03

switching current when VIN is low. The presence of a time FB

varying differential voltage signal (ripple) across ISP and R4
ISN at the switching frequency is expected. The amplitude
of this signal is increased by high LED load current, low
switching frequency and/or a smaller value output filter Figure 3. Feedback Resistor Connection for
capacitor. Some level of ripple signal is acceptable: the Buck Mode or Buck-Boost Mode LED Driver
compensation capacitor on the VC pin filters the signal so
the average difference between ISP and ISN is regulated ISP/ISN Short-Circuit Protection Feature (for SEPIC)
to the user-programmed value. Ripple voltage amplitude The ISP and ISN pins have a protection feature indepen-
(peak-to-peak) in excess of 20mV should not cause mis- dent of the LED current sense feature that operates at
operation, but may lead to noticeable offset between the ISN below 3V. The purpose of this feature is to provide
average value and the user-programmed value. continuous current sensing when ISN is below the LED
current sense common mode range (during start-up or
Programming Output Voltage (Constant Voltage
an output short-circuit fault) to prevent the development
Regulation) or Open LED/Overvoltage Threshold
of excessive switching currents that could damage the
For a boost application, the output voltage can be set by power components in a SEPIC converter. The action
selecting the values of R3 and R4 (see Figure 2) according threshold (150mV, typ) is above the default LED current
to the following equation: sense threshold, so that no interference will occur over
the ISN voltage range where these two functions overlap.
R3 + R4
VOUT = 1.25 • This feature acts in the same manner as SENSE current
R4 limit — it prevents GATE from going high (switch turn-on)
For a boost type LED driver, set the resistor from the output until the ISP/ISN difference falls below the threshold. If the
to the FB pin such that the expected VFB during normal load has appreciable series inductance, use of a Schottky
clamp from GND to ISN is recommended for the SEPIC
VOUT
to prevent excessive current flowing from the ISN pin in
a fault.
LT3755 R3
FB Dimming Control
R4
There are two methods to control the current source for
37551 F02
dimming using the LT3755. One method uses the CTRL pin
to adjust the current regulated in the LEDs. A second method
Figure 2. Feedback Resistor Connection for
Boost or SEPIC LED Driver uses the PWM pin to modulate the current source between
Rev. E

14 For more information www.analog.com

 LT3755/LT3755-1/LT3755-2
APPLICATIONS INFORMATION
zero and full current to achieve a precisely programmed Duty Cycle Considerations
average current. To make PWM dimming more accurate,
Switching duty cycle is a key variable defining converter
the switch demand current is stored on the VC node dur-
operation, therefore, its limits must be considered when
ing the quiescent phase when PWM is low. This feature
programming the switching frequency for a particular
minimizes recovery time when the PWM signal goes high.
application. The fixed minimum on-time and minimum
To further improve the recovery time, a disconnect switch
off-time (see Figure 4) and the switching frequency define
may be used in the LED current path to prevent the ISP
the minimum and maximum duty cycle of the switch,
node from discharging during the PWM signal low phase.
respectively. The following equations express the mini-
The minimum PWM on or off time is affected by choice
mum/maximum duty cycle:
of operating frequency and external component selection.
The data sheet application titled “Buck Mode 500mA LED Min Duty Cycle = (minimum on-time) • switching
Driver for 20kHz PWM Dimming” demonstrates regulated frequency
current pulses as short as 1µs are achievable. The best Max Duty Cycle = 1 – (minimum off-time) • switching
overall combination of PWM and analog dimming capabil- frequency
ity is available if the minimum PWM pulse is at least six
switching cycles. When calculating the operating limits, the typical values
for on/off-time in the data sheet should be increased by
Programming the Switching Frequency at least 60ns to allow margin for PWM control latitude,
GATE rise/fall times and SW node rise/fall times.
The RT frequency adjust pin allows the user to program
the switching frequency from 100kHz to 1MHz to optimize
efficiency/performance or external component size. Higher 300
CGATE = 3300pF
frequency operation yields smaller component size but 250
increases switching losses and gate driving current, and MINIMUM ON-TIME

may not allow sufficiently high or low duty cycle operation. 200

Lower frequency operation gives better performance at the

TIME (ns)

MINIMUM OFF-TIME
150
cost of larger external component size. For an appropriate
RT resistor value see Table 1. An external resistor from the 100
RT pin to GND is required—do not leave this pin open.
50
Table 1. Switching Frequency vs RT Value
0
fOSC (kHz) RT (kΩ) –50 –25 0 25 50 75 100 125 150
1000 10.0 TEMPERATURE (°C) 37551 F04

900 11.8
Figure 4. Typical Minimum On and Off
800 13.0
Pulse Width vs Temperature
700 15.4
600 17.8 Thermal Considerations
500 21.0
The LT3755 is rated to a maximum input voltage of 40V.
400 26.7
Careful attention must be paid to the internal power dis-
300 35.7
sipation of the IC at higher input voltages to ensure that
200 53.6
a junction temperature of 125°C (150°C for H-Grade and
100 100
J-Grade) is not exceeded. This junction limit is especially

Rev. E

For more information www.analog.com 15

LT3755/LT3755-1/LT3755-2
APPLICATIONS INFORMATION
important when operating at high ambient temperatures. Driving SYNC with a 50% duty cycle waveform is always
The majority of the power dissipation in the IC comes from a good choice, otherwise, maintain the duty cycle between
the supply current needed to drive the gate capacitance of 20% and 60%. When using both PWM and SYNC features,
the external power MOSFET. This gate drive current can the PWM signal rising edge should occur at least 200ns
be calculated as: before the SYNC rising edge (VIH) for optimal PWM
IGATE = fSW • QG performance. If the SYNC pin is not used, it should be
connected to GND.
A low QG power MOSFET should always be used when op-
erating at high input voltages, and the switching frequency Open LED Detection (LT3755 and LT3755-2)
should also be chosen carefully to ensure that the IC does
The LT3755 and LT3755-2 provide an open-drain status
not exceed a safe junction temperature. The internal junc-
pin, OPENLED, that pulls low when the FB pin is within
tion temperature of the IC can be estimated by:
~50mV of its 1.25V regulated voltage. If the open LED
TJ = TA + [VIN (IQ + fSW • QG) • θJA] clamp voltage is programmed correctly using the FB pin,
where TA is the ambient temperature, IQ is the quiescent then the FB pin should never exceed 1.1V when LEDs are
current of the part (maximum 1.7mA) and θJA is the connected, therefore, the only way for the FB pin to be within
package thermal impedance (68°C/W for the 3mm × 3mm 50mV of the regulation voltage is for an open LED event to
QFN package). For example, an application with TA(MAX) have occurred. The key difference between the LT3755 and
= 85°C, VIN(MAX) = 40V, fSW = 400kHz, and having a FET LT3755-2 is the behavior of the OPENLED pin when the FB
with QG = 20nC, the maximum IC junction temperature pin crosses and re-crosses the FB overvoltage threshold
will be approximately: (1.31V typ). The LT3755-2 asserts/de-asserts OPENLED
freely when crossing the 1.31V threshold. The LT3755,
TJ = 85°C + [40V (1.7mA + 400kHz • 20nC) • 68°C/W] by comparison, de-asserts OPENLED when FB exceeds
= 111°C 1.31V and is prevented from re-asserting OPENLED until
The Exposed Pad on the bottom of the package must be the FB pin falls below the 1.2V (typ) open LED threshold
soldered to a ground plane. This ground should then be and clears the fault. The LT3755-2 has the more general
connected to an internal copper ground plane with thermal purpose behavior and is recommended for applications
vias placed directly under the package to spread out the using OPENLED.
heat dissipated by the IC.
Input Capacitor Selection
If LT3755 junction temperature reaches 165°C, the GATE
and PWMOUT pins will be driven to GND and the soft- The input capacitor supplies the transient input current for
start (SS) pin will be discharged to GND. Switching will the power inductor of the converter and must be placed
be enabled after device temperature is reduced 10°C. This and sized according to the transient current requirements.
function is intended to protect the device during momentary The switching frequency, output current and tolerable input
thermal overload conditions. voltage ripple are key inputs to estimating the capacitor
value. An X7R type ceramic capacitor is usually the best
Frequency Synchronization (LT3755-1 Only) choice since it has the least variation with temperature and
DC bias. Typically, boost and SEPIC converters require a
The LT3755-1 switching frequency can be synchronized to lower value capacitor than a buck mode converter. As-
an external clock using the SYNC pin. For proper operation, suming that a 100mV input voltage ripple is acceptable,
the RT resistor should be chosen for a switching frequency the required capacitor value for a boost converter can be
20% lower than the external clock frequency. The SYNC estimated as follows:
pin is disabled during the soft-start period.
V ⎛ µF ⎞
Observation of the following guidelines about the SYNC C IN (µF) = ILED (A) • OUT • t SW (µs) • ⎜
waveform will ensure proper operation of this feature. VIN ⎝ A • µs ⎟⎠

Rev. E

16 For more information www.analog.com

 LT3755/LT3755-1/LT3755-2
APPLICATIONS INFORMATION
Therefore, a 10µF capacitor is an appropriate selection operating frequencies will require proportionately higher
for a 400kHz boost regulator with 12V input, 48V output capacitor values.
and 1A load.
Soft-Start Capacitor Selection
With the same VIN voltage ripple of 100mV, the input capaci-
tor for a buck converter can be estimated as follows: For many applications, it is important to minimize the
inrush current at start-up. The built-in soft-start circuit
⎛ µF ⎞ significantly reduces the start-up current spike and output
C IN (µF) = ILED (A) • t SW (µs) • 4.7 • ⎜
⎝ A • µs ⎟⎠ voltage overshoot. The soft-start interval is set by the soft-

start capacitor selection according to the equation:
A 10µF input capacitor is an appropriate selection for a
400kHz buck mode converter with a 1A load. 2V
TSS = C SS •
10µA
In the buck mode configuration, the input capacitor has
large pulsed currents due to the current returned through A typical value for the soft-start capacitor is 0.01µF. The
the Schottky diode when the switch is off. In this buck soft-start pin reduces the oscillator frequency and the
converter case it is important to place the capacitor as close maximum current in the switch. The soft-start capacitor
as possible to the Schottky diode and to the GND return is discharged when SHDN/UVLO falls below its threshold,
of the switch (i.e., the sense resistor). It is also important during an overtemperature event or during an INTVCC
to consider the ripple current rating of the capacitor. For undervoltage event. During start-up with SHDN/UVLO,
best reliability, this capacitor should have low ESR and charging of the soft-start capacitor is enabled after the
ESL and have an adequate ripple current rating. The RMS first PWM high period.
input current for a buck mode LED driver is:
Power MOSFET Selection

IIN(RMS) = ILED • (1 – D ) • D
For applications operating at high input or output voltages,
where D is the switch duty cycle. the power NMOS FET switch is typically chosen for drain
voltage VDS rating and low gate charge QG. Consideration
Table 2. Recommended Ceramic Capacitor Manufacturers of switch on-resistance, RDS(ON), is usually secondary be-
MANUFACTURER WEB cause switching losses dominate power loss. The INTVCC
TDK www.tdk.com regulator on the LT3755 has a fixed current limit to protect
Kemet www.kemet.com the IC from excessive power dissipation at high VIN, so the
Murata www.murata.com FET should be chosen so that the product of QG at 7V and
Taiyo Yuden www.t-yuden.com switching frequency does not exceed the INTVCC current
limit. For driving LEDs be careful to choose a switch with
Output Capacitor Selection
a VDS rating that exceeds the threshold set by the FB pin
The selection of the output capacitor depends on the load in case of an open-load fault. Several MOSFET vendors
and converter configuration, i.e., step-up or step-down are listed in Table 3. The MOSFETs used in the application
and the operating frequency. For LED applications, the circuits in this data sheet have been found to work well
equivalent resistance of the LED is typically low and the with the LT3755. Consult factory applications for other
output filter capacitor should be sized to attenuate the recommended MOSFETs.
current ripple. Use of X7R type ceramic capacitors is
Table 3. MOSFET Manufacturers
recommended.
VENDOR WEB
To achieve the same LED ripple current, the required filter Vishay Siliconix www.vishay.com
capacitor is larger in the boost and buck-boost mode ap- Fairchild www.fairchildsemi.com
plications than that in the buck mode applications. Lower International Rectifier www.irf.com
Rev. E

For more information www.analog.com 17

LT3755/LT3755-1/LT3755-2
APPLICATIONS INFORMATION
Schottky Rectifier Selection (DCM) switching. It is always prudent to verify the peak
The power Schottky diode conducts current during the inductor current in the application to ensure the sense
interval when the switch is turned off. Select a diode rated resistor selection provides margin to the SENSE current
for the maximum SW voltage. If using the PWM feature for limit threshold.
dimming, it is important to consider diode leakage, which The placement of RSENSE should be close to the source of
increases with the temperature, from the output during the the NMOS FET and GND of the LT3755. The SENSE input
PWM low interval. Therefore, choose the Schottky diode to LT3755 should be a Kelvin connection to the positive
with sufficiently low leakage current. Table 4 has some terminal of RSENSE.
recommended component vendors.
Inductor Selection
Table 4. Schottky Rectifier Manufacturers
VENDOR WEB The inductor used with the LT3755 should have a saturation
On Semiconductor www.onsemi.com current rating appropriate to the maximum switch current
Diodes, Inc. www.diodes.com
selected with the RSENSE resistor. Choose an inductor value
Central Semiconductor www.centralsemi.com
based on operating frequency, input and output voltage to
provide a current mode ramp on SENSE during the switch
Sense Resistor Selection on-time of approximately 20mV magnitude. The following
equations are useful to estimate the inductor value for
The resistor, RSENSE, between the source of the exter- continuous conduction mode operation:
nal NMOS FET and GND should be selected to provide
adequate switch current to drive the application without R SENSE • VLED ( VIN – VLED )
L BUCK =
exceeding the 108mV (typical) current limit threshold on VIN • 0.02V • fOSC

the SENSE pin of LT3755. For buck mode applications,
select a resistor that gives a switch current at least 30% R SENSE • VLED • VIN
L BUCK-BOOST =
greater than the required LED current. For buck mode, ( VLED + VIN ) • 0.02V • fOSC

select a resistor according to:
R SENSE • VIN ( VLED – VIN )
0.07V L BOOST =
R SENSE,BUCK ≤ VLED • 0.02V • fOSC
ILED

For buck-boost, select a resistor according to: Table 5 provides some recommended inductor vendors.
Table 5. Inductor Manufacturers
VIN • 0.07V
R SENSE,BUCK-BOOST ≤ VENDOR WEB
( VIN + VLED )ILED Sumida www.sumida.com

For boost, select a resistor according to: Würth Elektronik www.we-online.com

Coiltronics www.cooperet.com
VIN • 0.07V Vishay www.vishay.com
R SENSE,BOOST ≤
VLED • ILED Coilcraft www.coilcraft.com

These equations provide an estimate of the sense resistor Loop Compensation

value based on reasonable assumptions about induc-
tor current ripple during steady state switching. Lower The LT3755 uses an internal transconductance error ampli-
values of sense resistor may be required in applications fier whose VC output compensates the control loop. The
where inductor ripple current is higher. Examples include external inductor, output capacitor and the compensation
applications with current limited operation at high duty resistor and capacitor determine the loop stability.
cycle, and those with discontinuous conduction mode
Rev. E

18 For more information www.analog.com

 LT3755/LT3755-1/LT3755-2
APPLICATIONS INFORMATION
The inductor and output capacitor are chosen based on node to eliminate interplane coupling to sensitive signals.
performance, size and cost. The compensation resistor The lengths of the high dI/dt traces: 1) from the switch
and capacitor at VC are selected to optimize control loop node through the switch and sense resistor to GND, and
response and stability. For typical LED applications, a 2) from the switch node through the Schottky rectifier and
2.2nF compensation capacitor at VC is adequate, and filter capacitor to GND should be minimized. The ground
a series resistor should always be used to increase the points of these two switching current traces should come
slew rate on the VC pin to maintain tighter regulation of to a common point then connect to the ground plane under
LED current during fast transients on the input supply to the LT3755. Likewise, the ground terminal of the bypass
the converter. capacitor for the INTVCC regulator should be placed near
the GND of the switching path. Typically this requirement
Board Layout will result in the external switch being closest to the IC,
The high speed operation of the LT3755 demands careful along with the INTVCC bypass capacitor. The ground for
attention to board layout and component placement. The the compensation network and other DC control signals
exposed pad of the package is the only GND terminal of should be star connected to the underside of the IC. Do
the IC and is also important for thermal management of not extensively route high impedance signals such as FB
the IC. It is crucial to achieve a good electrical and thermal and VC, as they may pick up switching noise. In particular,
contact between the exposed pad and the ground plane of avoid routing FB and PWMOUT in parallel for more than
the board. To reduce electromagnetic interference (EMI), it a few millimeters on the board. Minimize resistance in
is important to minimize the area of the high dV/dt switching series with the SENSE input to avoid changes (most likely
node between the inductor, switch drain and anode of the reduction) to the switch current limit threshold.
Schottky rectifier. Use a ground plane under the switching

20W SEPIC LED Driver

C4 D1
L1A 2.2µF 5A
22µH 50V 100V
VIN
8V TO Efficiency vs VIN
40V C1 C3
4.7µF 1M 4.7µF 100
VIN 511k VOUT = 18V
50V 50V
SHDN/UVLO FB L1B ILED = 1A
187k VREF 25k
95
EFFICIENCY (%)

CTRL ISP
INTVCC
LT3755-2 0.1Ω 1A 90
100k ISN
OPENLED GATE M1
PWM 85
SS SENSE 20W
RT PWMOUT LED
0.01µF 0.015Ω STRING
VC GND INTVCC
80
28.7k C2 0 10 20 30 40
375kHz 30k 4.7µF VIN (V)
10V
0.001µF M2 37551 TA04b

L1: WÜRTH ELEKTRONIK 744870220 37551 TA04a

M1: VISHAY SILICONIX SI7454DP

D1: DIODES INC. - PDS5100
M2: VISHAY SILICONIX SI2318DS

Rev. E

For more information www.analog.com 19

LT3755/LT3755-1/LT3755-2
APPLICATIONS INFORMATION

OPENLED

CTRL
PWM
VREF
CSS VIAS TO GROUND PLANE

RT
4 3 2 1
R2 CC
5 16
6 15 RC
R1
7 14 x VOUT VIA
CVCC
8 13
9 10 11 12 x
L1 R3

R4

5 4
1

6 3 M2 3 LED–
M1
2
7 2

RSENSE
8 1

COUT COUT

D1
CIN
LED+
RLED

VIN GND 37551 F05

COMPONENT DESIGNATIONS REFER TO “50W WHITE LED HEADLAMP DRIVER” SCHEMATIC

Figure 5. Boost Converter Suggested Layout

Rev. E

20 For more information www.analog.com

 LT3755/LT3755-1/LT3755-2
TYPICAL APPLICATIONS
50W White LED Headlamp Driver
L1
22µH D1
VIN
8V TO
40V CIN R1 R3 COUT
4.7µF 1M VIN 1M 4.7µF
SHDN/UVLO FB
R2 VREF ISP R4
187k 23.7k
16.9k LT3755-2 RLED
1A
CTRL 0.1Ω
INTVCC 100k ISN
NTC GATE M1
100k RT1
SENSE
OPENLED RSENSE
0.015Ω 50W
PWM
LED
SS STRING
CSS RT PWMOUT
0.01µF VC GND INTVCC
RT
28.7k RC CVCC
375kHz 10k 4.7µF
CC
0.001µF M2

L1: COILTRONICS DR127-220 37551 TA02a

M1: VISHAY SILICONIX SI7850DP SEE SUGGESTED LAYOUT, FIGURE 5
D1: DIODES INC. PDS5100
M2: VISHAY SILICONIX SI2308DS
RT1: MURATA NCP18WM1045

Waveforms for 50W LED Driver with

PWM Disconnect NFET
PWM VIN = 12V
0V TO 5V
VOUT = 50V
10V/DIV

IL1
2A/DIV

ILED
500mA/DIV
37551 TA02b
50µs/DIV

V(ISP-ISN) Threshold vs Temperature

Efficiency vs Load for NTC Resistor Divider
100 120
VIN = 12V

100
96
V(ISP-ISN) THRESHOLD (mV)

80
EFFICIENCY (%)

92
60
88
40

84
20

80 0
0.0 0.2 0.4 0.6 0.8 1.0 25 45 65 85 105 125
LOAD (A) TEMPERATURE (°C)
37551 TA02c 37551 TA02d
Rev. E

For more information www.analog.com 21

LT3755/LT3755-1/LT3755-2
TYPICAL APPLICATIONS
Buck Mode 1.4A LED Driver
VIN
15V TO
40V C1
1M VIN ISP 110k C3
1µF 200k
4.7µF
SHDN/UVLO 0.068Ω 1.4A 200k
107k Q1
VREF ISN
FB
CTRL
1.5k
20k
M3
INTVCC LT3755-2
PWMOUT M2

100k PWM 3 LUXEON K2

1k - WHITE
OPENLED

L1
SS 33µH
D1
VIN
RT GATE M1 C4
0.1µF 4.7µF
VC GND INTVCC SENSE
28.7k
375kHz 0.033Ω
47k C2
4.7µF
0.001µF
37551 TA03a

L1: COILTRONICS DR125-330

M1: VISHAY SILICONIX SI7850DP
D1: ON SEMICONDUCTOR MBRS360
M2: ZETEX ZXMN4A06G
M3: ZETEX ZXM62P03E6
Q1: ZETEX FMMT558

1000:1 PWM Dimming at 120Hz

Efficiency vs VIN
with Buck Mode
100
VIN = 24V
VLED = 10V
PWM 96
0V TO 5V
EFFICIENCY (%)

92
ILED
1A/DIV
88
IL1
1A/DIV
84
37551 TA03b
2µs/DIV
80
15 20 25 30 35 40
VIN (V)
37551 TA03c

Rev. E

22 For more information www.analog.com

 2200pF 37551 TA06a

LT3755/LT3755-1/LT3755-2
TYPICAL APPLICATIONS
Buck Mode 500mA LED Driver for 20kHz PWM Dimming
VIN
22V TO
36V
1M VIN ISP
SHDN/UVLO 0.2Ω 500mA
68.1k
VREF ISN
16V
CTRL 0.22µF
PWMOUT M2
4.7µF 2×
6V 1M 25V
LT3755-2
PWM

INTVCC L1
4.7µF 2200pF 3.3µH
D1

OPENLED GATE M1
SENSE
2.2µF 2×
SS VC GND FB RT 0.033Ω
50V
22k 13k
0.1µF
800kHz
470pF 37551 TA03a

L1: TOKO 962BS_3R3M

M1: VISHAY SILICONIX SI7850DP
M2: VISHAY SILICONIX SI2306DS
D1: DIODES, INC SBM540

Minimum PWM Pulse Switching Waveform Efficiency vs VIN

100
VLED = 16V
GATE ILED = 0.5A
96
INDUCTOR
CURRENT
EFFICIENCY (%)

1A/DIV 92

PWM
88
ILED
500mA/DIV
84
37551 TA06b
500ns/DIV

80
15 20 25 30 35 40
VIN (V)
37551 TA06c

Rev. E

For more information www.analog.com 23

LT3755/LT3755-1/LT3755-2
TYPICAL APPLICATIONS
21W Buck-Boost Mode with 250:1 PWM Dimming and Open LED Protection

L1 0.1Ω
15µH D1
VIN M2
8V TO
36V 50V 100V
2.2µF M1 2.2µF 21.5V
2× 392k 2× 1A
1.5k

0.02Ω
Q1 VIN
100k
499k VIN GATE SENSE
FB
SHDN/UVLO 20.0k
549k
93.1k
VREF LT3755-2
PWMOUT Q2
CTRL

75.0k 4.7µF PWM PWM 1k

INTVCC

100k ISP

OPENLED ISN
37551 TA07a

SS VC GND RT
M1: VISHAY SILICONIX SI7850DP
0.01µF 4.7k 28.7k M2: VISHAY SILICONIX SI2319DS
375kHz Q1: ZETEX FMMT558
4700pF Q2: MMBTA42
D1: DIODES INC. PDS560
L1: SUMIDA CDRH127/LD-150

Buck-Boost Mode Efficiency vs Input Voltage Buck-Boost Mode LED Current vs Low Input Voltage
100 1.10

1.05
95
1
LED CURRENT (A)
EFFICIENCY (%)

90 0.95

0.9
85
0.85

80 0.8
0 5 10 15 20 25 30 35 40 8 9 10 11 12 13 14 15 16
INPUT VOLTAGE (V) INPUT VOLTAGE (V)
37551 TA07b 37551 TA07c

Rev. E

24 For more information www.analog.com

 LT3755/LT3755-1/LT3755-2
PACKAGE DESCRIPTION
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev F)

BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102 2.845 ±0.102
(.112 ±.004) 0.889 ±0.127 (.112 ±.004)
(.035 ±.005)
1 8 0.35
REF

5.10 1.651 ±0.102

1.651 ±0.102 3.20 – 3.45
(.201) 0.12 REF
(.065 ±.004) (.126 – .136) (.065 ±.004)
MIN
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
16 9 FOR REFERENCE ONLY
0.305 ±0.038 0.50 NO MEASUREMENT PURPOSE
(.0120 ±.0015) (.0197) 4.039 ±0.102
TYP BSC (.159 ±.004)
(NOTE 3) 0.280 ±0.076
RECOMMENDED SOLDER PAD LAYOUT
16151413121110 9 (.011 ±.003)
REF
DETAIL “A”
0.254
(.010) 3.00 ±0.102
0° – 6° TYP 4.90 ±0.152
(.118 ±.004)
(.193 ±.006)
GAUGE PLANE (NOTE 4)

0.53 ±0.152
(.021 ±.006)
1234567 8
DETAIL “A” 1.10 0.86
0.18 (.043) (.034)
(.007) MAX REF

SEATING
PLANE 0.17 – 0.27 0.1016 ±0.0508
(.007 – .011) (.004 ±.002)
TYP 0.50
NOTE: (.0197)
MSOP (MSE16) 0213 REV F

1. DIMENSIONS IN MILLIMETER/(INCH) BSC

2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.

Rev. E

For more information www.analog.com 25

LT3755/LT3755-1/LT3755-2
PACKAGE DESCRIPTION
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691 Rev Ø)

0.70 ±0.05

3.50 ±0.05 1.45 ±0.05

2.10 ±0.05 (4 SIDES)

PACKAGE OUTLINE

0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
BOTTOM VIEW—EXPOSED PAD
R = 0.115 PIN 1 NOTCH R = 0.20 TYP
3.00 ±0.10 0.75 ±0.05 OR 0.25 × 45° CHAMFER
TYP
(4 SIDES) 15 16
PIN 1 0.40 ±0.10
TOP MARK
(NOTE 6) 1

1.45 ± 0.10 2
(4-SIDES)

(UD16) QFN 0904

0.200 REF 0.25 ±0.05

0.00 – 0.05 0.50 BSC
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE

Rev. E

26 For more information www.analog.com

 LT3755/LT3755-1/LT3755-2
REVISION HISTORY (Revision history begins at Rev D)

REV DATE DESCRIPTION PAGE NUMBER

D 03/10 Revised Entire Data Sheet to Include H-Grade 1-26
E 10/19 Added Automotive and J-Grade Models 1, 3, 4

Rev. E

27
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For more by
is granted information www.analog.com
implication or otherwise under any patent or patent rights of Analog Devices.
LT3755/LT3755-1/LT3755-2
TYPICAL APPLICATION
Buck-Boost LED Driver for Automotive Efficiency vs VIN
VIN 100
6V TO 4.7µF
36V ×2
LTC4440-5 96
INTVCC VCC BOOST 0.22µF
GND TG M1 D2

EFFICIENCY (%)
TS 92
INP
22µF
1M VIN D1 88

SHDN/UVLO
VREF GATE M2 1M 84
330k 4.7µF
383k
SENSE
CTRL 0.025Ω
INTVCC LT3755-2 40k 80
47k 0 10 20 30 40
FB VIN (V)
100k ISP 37551 TA05b

OPENLED
0.1Ω 1A
PWM
SS ISN
RT PWMOUT
0.01µF VC GND INTVCC
28.7k
375kHz 10k INTVCC
1%
0.01µF 4.7µF

M1, M2: VISHAY SILICONIX SI7850DP

D1, D2: DIODES, INC SBM540 37551 TA05a

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Rev. E

28
10/19
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