Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
Scribd Logo
Upload

Welcome to Scribd!

  • 51 views

    June15 10EE56 PDF

    Uploaded by

    rama Krishna

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    June15 10EE56 PDF

    Uploaded by

    rama Krishna
    51 views2 pages

    Original Title

    June15 10EE56.pdf

    Copyright

    © © All Rights Reserved

    Available Formats

    PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    51 views2 pages

    June15 10EE56 PDF

    Uploaded by

    rama Krishna

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 2

    USN lOEE56

    Fifth Semester B.E. Degree Examination, June/July 2015


    Linear Ie's & Applications
    Time: 3 hrs. Max. Marks: 100
    Note: Answer FIVE full questions, selecting
    at least TWO questions from each part.
    PART-A
    1 a. Sketch the circuit of a capacitor coupled non inverting amplifier. Briefly explain the circuit
    operating and design procedure. (06 Marks)
    b. Design a capacitor coupled voltage follower using 741 operational amplifier as shown in
    Fig. Ql (b). The lower cut off frequency for the circuit is to be 120 Hz and load resistance is
    RL = 8.2 KQ. (08 Marks)

    inn
    u..i
    eddu
    Fig. Ql (b)
    c. Sketch the circuit of a capacitor coupled inverting amplifier using single polarity power

    itt..e
    supply. Briefly explain its operation. (06 Marks)

    2 a. Explain how the upper cut off frequency of an op-arnp circuit may be determined from the

    rtttti
    open loop gain I or frequency response graph. (08 Marks)
    .ddr
    b. Define: i) Loop gain ii) Loop phase shift iii) Unity gain bandwidth (06 Marks)
    c. List the precautions that should be observed for op-amp circuit stability. (06 Marks)
    ww.

    3 a. Show how a halfwave precision rectifier can be combined with a summing circuit to provide
    www

    a fullwave precision rectifier. Also discuss the design procedure. (08'-Marks)


    Fw

    b. Using a BIFET op-amp, design a dead zone circuit as shown in Fig.Q3 (b) to pass only the
    upper 1 V portion of the positive half cycle of a sinewave input with peak value of 4 V.
    GF

    (06 Marks)
    KKG
    T,,
    TIIT
    TTT

    Fig. Q3 (b)
    c. Draw and explain in detail an op-amp sample and hold circuit. Also sketch the signal,
    rr..

    control and output waveforms. (06 Marks)


    DD

    4 a. Draw and explain an op-arnp inverting Schmitt trigger circuit. Sketch the typical input and
    output waveforms. (06 Marks)
    b. Design a non inverting Schmitt trigger circuit as shown in Fig. Q4 (b) to have UTP = +2V
    and LTP = - 4 V, using 741 op-amp and Vcc = ±15V (08 Marks)
    Po

    ~
    o
    Z ~, Fig. Q4 (b)
    E~
    1:
    o
    0-
    r
    ,,;
    .§

    c. Sketch and explain the operation of an Astable Multivibrator circuit. Show the voltage
    waveforms at various points. (06 Marks)
    10f2
    lOEE56
    PART-B
    a. Draw and explain the circuit of a Triangular / Rectangular waveform generator, which has
    frequency and dutycycle controls. (08 Marks)
    b. Design a phase shift oscillator with amplitude stabilization as shown in Fig. Q5 (b) to giva a
    maximum output of ± 4 V with oscillation frequency of 6 kHz. Include distortion
    minimization adjustment. (06 Marks)

    inn
    t\ ~

    u..i
    c Fig. Q5 (b)

    eddu
    c. Draw the circuit of a Wein bridge oscillator and explain the circuit operation. (06 Marks)

    itt..e
    6 a. Sketch and explain the typical frequency response of Butterworth and Chebyshev second
    order active low pass filter. Write the equations involved in the design of the butterworth
    circuit.
    rtttti (08 Marks)
    .ddr
    b. Design a first order high pass active filter circuit to have cut off frequency 5 kHz. Using
    LM 108 op-amp and estimate the highest frequency that can be passed (as shown in
    ww.
    Fig. Q6 (b)). (06 Marks)
    www

    t
    Fw
    GF

    . R.z..
    KKG

    Fig. Q6 (b)
    c. Show how band stop filter circuit can be constructed by the use of low pass and highpass
    filters. Sketch the expected frequency response and briefly explain. (06 Marks)
    T,,
    TIIT

    7 a. Write short note on the following: i) Switched capacitor filter. ii) Power amplifier.
    TTT

    (10 Marks)
    b. With the help of block diagram, explain the PLL operation in detail. (10 Marks)
    rr..

    8 a. With the help of a circuit diagram, explain the operation and design procedure of a voltage
    DD

    follower regulator. (08 Marks)


    b. Calculate the resistance of R I and R2 for LM217 voltage regulator as shown in Fig. Q8 (b) to
    produce an output voltage of 8 V. (V ref = 1.25 V) (06 Marks)
    ~~_r_H-+-lM '2.17 ouT +- t1
    L--"T7.l'T'---' F\ .l, l'
    '1/0"'611
    C2

    Fig. Q8 (b)
    c. Briefly discuss the design procedure of flot foldback current limiting circuit. (06 Marks)

    *****
    20f2

    You might also like