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    EE 341 Microelectronic Design: Assignment No. 2 Due Date: 22

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    Usama Afzal
    The document provides details for an assignment on cascode stages and current mirrors. It includes 7 problems covering topics like determining output resistance, effects of a manufacturing error, current mirror design, and LTspice simulation. Students are asked to calculate values, design circuits meeting requirements, and simulate a cascode current source.

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    EE 341 Microelectronic Design: Assignment No. 2 Due Date: 22

    Uploaded by

    Usama Afzal
    50 views5 pages
    The document provides details for an assignment on cascode stages and current mirrors. It includes 7 problems covering topics like determining output resistance, effects of a manufacturing error, current mirror design, and LTspice simulation. Students are asked to calculate values, design circuits meeting requirements, and simulate a cascode current source.

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    EE341_Assignment_2

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    The document provides details for an assignment on cascode stages and current mirrors. It includes 7 problems covering topics like determining output resistance, effects of a manufacturing error, current mirror design, and LTspice simulation. Students are asked to calculate values, design circuits meeting requirements, and simulate a cascode current source.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    50 views5 pages

    EE 341 Microelectronic Design: Assignment No. 2 Due Date: 22

    Uploaded by

    Usama Afzal
    The document provides details for an assignment on cascode stages and current mirrors. It includes 7 problems covering topics like determining output resistance, effects of a manufacturing error, current mirror design, and LTspice simulation. Students are asked to calculate values, design circuits meeting requirements, and simulate a cascode current source.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 5

    Spring 2021

    EE 341 Microelectronic Design


    Cascode Stages and Current Mirrors
    Assignment No. 2

    Due Date: 22nd February 2021, Monday

    Problem 1. [10]

    Fig.1

    Assume Lamda is greater than 0.

    Determine the Rout , rin1, rin2 (use small signal model), rd2.
    Spring 2021

    Problem 2. [10]

    Due to a manufacturing error, node X has gotten shorted with the gate of M1 in
    the above cascoded stage. Determine the following:
    a) Identify the topology of M2. [2]
    b) Short circuit transconductance (Gm) [4]
    c) Output Resistance [4]

    Problem 3. Design Problem [10]

    Consider the circuit shown in figure above where:


    VDD = 2V µnCox = 100 µA/V2
    (W/L)1 = 40/0.18 VTH = 0.4V
    Spring 2021

    (W/L)2 = 60/0.18. λ = 0.1V-1

    a) If we require a bias current of 1 mA and RD= 500 Ω, what is [3]


    the highest allowable value of Vb1?
    b) With such a value chosen for Vb1, what is the value of VX. [3]
    c) Given the information above and making use of the fact that M1 [4]
    has the topology of a common source with degeneration and RD = 30KΩ,
    find the gain of the circuit.
    Problem 4. [5]
    a) For the current-steering circuit of the figure below, find Io in terms of Iref
    and device (W/L)1 , (W/L)2 , (W/L)3 ,(W/L)4 ratios.
    Spring 2021

    Problem 5. [5]

    Design the circuit for a power budget of 5mW given that (W/L)ref = 20/0.18 and
    that L = 200nm for all transistors.

    Problem 6. [15]

    The common-gate stage of the figure above employs the current source M3 as
    the load to achieve a high voltage gain. For simplicity, neglect channel-length
    modulation in M1. Given that:
    Spring 2021

    (W/L)3 = 40/0.18 λn = 0.1V-1 λp = 0.2V-1


    unCox = 100u A/V2 upCox = 50u A/V2 Vth = 0.5 V
    IREF = 1mA
    Design the circuit for the following:
    Voltage Gain = 20 Input Impedance = 50Ω Power = 13mW
    Also identify the topology of the circuit.

    Problem 7. LTspice Simulation [20]

    Vout

    The figure shown above depicts a cascode current source whose value is defined
    by the current mirror arrangement of M1 and M2.
    Given that:
    (W/L)1 = (W/L)2 = (W/L)3 = 5µm/0.18µm
    unCox = 90µA/V2
    Vth = 0.7V
    λ = 0.1V-1

    a) Select the value of Vb such that Iout is precisely equal to 0.5mA. [8]
    b) Now we want the current through M2 to be 1mA. What value of [4]
    (W/L)2 will you use. Verify it in the simulation.
    c) Using both hand analysis and SPICE simulations, determine [8]
    the output impedance of the cascode and compare the results.

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