Technical Brochure: Dielectric Testing of Gasinsulated HVDC Systems

D1/B3
Technical Brochure
Dielectric testing of gasinsulated

HVDC systems
Reference: 842
September 2021
TECHNICAL BROCHURE
Dielectric testing of gas-

insulated HVDC systems
JWG D1/B3.57
Members
C. NEUMANN, Convenor DE S. NEUHOLD CH

D. STEYN, Secretary DE P. NOTINGHER FR
M. FELK DE S. OKABE JP
A. GIRODET FR R. PIETSCH DE
M. HALLAS DE U. RIECHERT CH
H. HAMA JP T. ROKUNOHE JP
K. JUHRE DE U. SCHICHLER AT
J. KINDERSBERGER DE M. TSCHENTSCHER CH
W. KOLTUNOWICZ AT A. VOSS CH
M. KOSSE DE T. YASUOKA JP
B. LAZELERE US
Corresponding Members
S. NILSSON US
G. BEHRMANN CH
Copyright © 2021
“All rights to this Technical Brochure are retained by CIGRE. It is strictly prohibited to reproduce or provide this publication in any
form or by any means to any third party. Only CIGRE Collective Members companies are allowed to store their copy on their
internal intranet or other company network provided access is restricted to their own employees. No part of this publication may
be reproduced or utilized without permission from CIGRE”.
Disclaimer notice
“CIGRE gives no warranty or assurance about the contents of this publication, nor does it accept any responsibility, as to the
accuracy or exhaustiveness of the information. All implied warranties and conditions are excluded to the maximum extent permitted
by law”.
WG XX.XXpany network provided access is restricted to their own employees. No part of this publication may be
reproduced or utilized without permission from CIGRE”.
ISBN : 978-2-85873-547-1
Disclaimer notice
“CIGRE gives no warranty or assurance about the contents of this publication, nor does it accept any
TB 842 - Dielectric testing of gas-insulated HVDC systems
Executive summary
Rapid, worldwide implementation of electrical power generation from renewable sources, often located
at great distances from urban and industrial consumers, has led to the need for new, low loss, long-
distance transmission systems. A result of this trend is that development of DC transmission
technologies is progressing rapidly. As a part of this, gas-insulated DC transmission lines (DC GIL) and
gas-insulated DC substations (DC GIS) are of particular interest due to their space-saving advantages.
Testing of these systems poses unique challenges and forms the primary focus of this Technical
Brochure. The technical feasibility and initial application of gas-insulated HVDC GIS was described in
CIGRE Technical Brochure 506. Since its publication (2012), a large body of service experience had
been collected from the first DC GIS installations, and further projects are expected to be realized soon.
All these DC GIS were subjected to thorough dielectric testing, covering the basic phenomena but using
different testing procedures and test levels, since no standards for (dielectric) testing of HVDC gas-
insulated systems are currently in place. Therefore, CIGRE Joint Working Group JWG D1/B3.57 was
created to consider this topic in detail.
After the introduction and presentation of the main objectives of this report (chapters 1 and 2),
chapter 3 considers voltage and overvoltage stresses at gas-insulated HVDC systems. Overvoltages
originating either on the DC transmission line or at the converter are discussed, based on typical DC
link designs and taking into account different converter technologies. For this, slow-front overvoltages
(SFO) caused by earth faults at different fault locations on an example line of 400 km length are
considered. The effects of such SFO stresses occurring at the converter terminal or DC substation are
studied, along with the case of a GIL-OHL interface, e.g. when hybrid lines contain GIL sections. The
effects of SFO occurring at converter terminals, caused by earth faults at either the DC side or AC side
are also looked at. For the purpose of insulation co-ordination, SFO amplitudes of about 2 p.u. can be
assumed. Regarding fast-front overvoltages (FFO), investigations of the stresses due to lightning in the
vicinity of the converter terminals and a GIL-OHL interface are carried out. The FFO magnitudes amount
to about 2.1 p.u, assuming adequate arrester ratings have been applied.
Chapter 4 deals with basic phenomena and insulation properties under DC voltage and overvoltage
stresses. First, conduction through solid insulation and along insulator surfaces, charge accumulation,
field transition and effects at gas-solid insulation interfaces are described. After that, the insulating
properties of gas-solid insulation systems are considered, starting with the insulation characteristics of
the gas gap and the insulators under DC stress, and followed by the presentation of the typical
properties of insulating materials regarding volume and surface resistivity. Further influencing factors
as electric field and temperature dependence, moisture, space charge etc. are examined and typical
conductivity values are given. The final subchapter presents computational simulation and its
verification. Most of the simulation tools are based on Finite Element Methods (FEM). In multiphysics
simulation tools, the simulation of the electric field and charge distribution can be linked with the
temperature distribution and the temperature- and field-dependent material properties. The verification
of the simulation is done by surface potential measurements on model insulators and on real insulators
applied in gas-insulated systems.
Chapter covers 5 typical defects and their PD characteristics. Defects in gas-insulated DC systems are
similar to those found in AC systems: Mobile particles, protrusions on the HV conductor, particles lying
on a spacer, displaced, misaligned or loose shields and voids in solid insulation components. As the
most common defect in gas-insulated systems is caused by mobile particles and these are more harmful
under DC stress, the consideration is focused on particle motion and the pulse sequence at positive and
negative polarity. Particle bouncing and firefly phenomena are described in particular detail.
Chapter 6 addresses the background of dielectric testing for proving the capability to withstand the
phenomena in gas-insulated DC systems. In the first subchapter the insulator in the gas-insulated
environment and the basic idea of the electrical insulation system test, i. e. the testing philosophy, the
testing procedure and examples for test-setups are explained. The second subchapter covers particles,
including mitigation measures along with detection and identification of particles by PD testing and
analysis of PD data. Methods of pulse sequence analysis (PSA) are described as a suitable tool for
visualisation and identification of PD defects under DC voltage. The third subchapter deals with the
3
performance of the insulating materials over their lifetimes. The consideration supports the conclusion
of an uncritical ageing performance at DC voltage, compared to AC voltage at the same dielectric stress.
The fourth subchapter describes the prototype installation test to collect more information about the
long-term capability of this type of technology. A basic test scenario including DC test voltage levels and
superimposed impulse voltages as well as examples for test setups are presented.
In chapter 7, recommendations for dielectric testing of gas-insulated HVDC systems are given, com-
prising type testing, routine testing and onsite testing, as well as the prototype installation test. This
chapter provides the fundamentals for a future IEC Standard. It defines the test voltages, test currents
and test levels, the test procedure, in particular the DC insulation system as an important part of the
type test, and the acceptance criteria. For testing with superimposed voltages, no flashover across the
insulator surface is permitted. It is recommended to perform initial PD testing under AC voltage in order
to profit from the large body of AC PD experience accumulated till now, in contrast to the quite limited
experience available with PD testing at DC voltage. For the prototype installation test the basic test
sequence and different options are presented as well as the acceptance criteria, re-testing procedure
(in the case defects are found or a flashover occurs), and a procedure in the case of interruptions.
Chapter 8 covers again test equipment and test procedures in order to provide guidance for users.
Subchapter 1 deals with superimposed (composite) voltage testing. General explanations for the test
circuit for composite voltages are given, the options for the generation of superimposed voltages, and
the description of the coupling and blocking elements are presented. Examples of typical phenomena
which can occur with different test setup options are given, and measures are described to avoid their
possibly negative impact on the test object. Subchapter 8.2 details the prototype installation test, the
basic test circuit, the circuits to generate and inject high current at high voltage potential, the long-term
test sequence and the superimposed voltage tests. Regarding the long-term test sequence, a procedure
in case of test interruptions is specified. For test objects of long physical length as e.g. DC GIL, oscillating
lightning and switching impulse testing is recommended due to the higher capacitance and inductance
of the load.
Testing of the interface between DC cables and gas-insulated DC systems is addressed in chapter 9.
Those interfaces will appear more and more often as gas-insulated DC systems are connected directly
to DC cables in order to utilize the space saving features of such arrangements. However, the testing
philosophy for cables and gas-insulated systems and the test objectives are different. Taking into
account these differences, a proposal for dielectric testing of these critical interfaces is made covering
both test objectives. Finally, recommendations for proceeding further in this subject area are given.
4
Content
Executive summary ............................................................................................................. 3
Abbreviations ...................................................................................................................... 9
List of symbols .................................................................................................................. 12
Introduction.............................................................................................................. 19
References Chapter 1 .......................................................................................................................................... 22
Scope And Objectives ............................................................................................. 23

Background .............................................................................................................................................. 23
Objectives ................................................................................................................................................ 24
Voltage and overvoltage stresses of gas-insulated HVDC Systems .................... 26

Configurations under consideration ...................................................................................................... 26
Continuous operating voltage ................................................................................................................ 26
Temporary overvoltages ......................................................................................................................... 27
Slow front overvoltages .......................................................................................................................... 27
Fast front overvoltages ........................................................................................................................... 27
Simulation of overvoltages ..................................................................................................................... 27
3.6.1 Slow front overvoltages due to earth faults ........................................................................................ 28
3.6.2 Fast front overvoltages due to lightning ............................................................................................. 30
Basic phenomena and insulation properties at DC voltage and overvoltage

stresses.............................................................................................................................. 33
Basic phenomena at DC voltage stress and field transition ................................................................ 34
4.1.1 Conduction through solid insulation and along insulator surfaces ..................................................... 35
4.1.2 Surface charge accumulation from charge generation and transport in the gaseous insulation ........ 36
4.1.3 Field transition and effects at gas-insulator interfaces ....................................................................... 36
Insulating properties of typical gas-solid insulation systems and influencing factors .................... 39
4.2.1 Insulation characteristics in the gas gap at DC stress ....................................................................... 39
4.2.2 Insulation characteristics of insulators at DC and overvoltage stresses ............................................ 42
4.2.3 Typical properties of insulating materials at DC stress ...................................................................... 44
4.2.4 Further influencing factors of typical gas-solid insulation systems ..................................................... 51
Computational simulation and its verification ...................................................................................... 56
4.3.1 Computational simulation of electric fields and multiphysics simulations ........................................... 56
4.3.2 Verification of simulations .................................................................................................................. 56
Typical defects and their PD characteristic ........................................................... 73

PD magnitude and PD behaviour of typical defects at DC voltage ..................................................... 73
PD Characteristics of typical defects at DC voltage ............................................................................. 73
5.2.1 Moving particle................................................................................................................................... 73
5.2.2 Protrusion .......................................................................................................................................... 79
5.2.3 Floating Electrode .............................................................................................................................. 80
5
5.2.4 Void ................................................................................................................................................... 81

5.2.5 Particle on insulator ........................................................................................................................... 82
Background for Dielectric testing for proving the capability to withstand the
phenomena in gas-insulated DC systems ....................................................................... 85
insulator in the gas-insulated environment: DC insulation system test ............................................. 85
6.1.1 Basic idea .......................................................................................................................................... 85
6.1.2 Duration of DC transition ................................................................................................................... 85
6.1.3 Test conditions................................................................................................................................... 87
6.1.4 Load conditions.................................................................................................................................. 91
6.1.5 Heating methods................................................................................................................................ 92
6.1.6 Definition of Test voltages ................................................................................................................. 95
6.1.7 DC insulation system test procedure ................................................................................................. 96
6.1.8 Examples for test set-ups .................................................................................................................. 97
Particles – mitigation measures, detection and identification by analysis of pd data .................... 100
6.2.1 Mitigation measures ......................................................................................................................... 100
6.2.2 Detection and identification by analysis of PD data ......................................................................... 104
Lifetime tests of insulating material..................................................................................................... 108
Prototype installation test ..................................................................................................................... 112
6.4.1 Necessity of long-term tests on gas-insulated HVDC systems ........................................................ 112
6.4.2 Basic test scenario........................................................................................................................... 113
6.4.3 Basic test level considerations ......................................................................................................... 113
6.4.4 Basic consideration for test sequence ............................................................................................. 116
6.4.5 The influence of test interruptions on the DC insulation system ...................................................... 117
6.4.6 Examples for test setups ................................................................................................................. 119
References Chapter 6 ........................................................................................................................................ 122
Recommendation for dielectric testing of gas-insulated HVDC systems .......... 128

Scope ...................................................................................................................................................... 128
Summary of tests................................................................................................................................... 128
Definitions .............................................................................................................................................. 128
7.3.1 Abbreviations ................................................................................................................................... 128
7.3.2 Test voltages ................................................................................................................................... 129
7.3.3 Test Currents ................................................................................................................................... 130
7.3.4 Thermal GIS design parameters ...................................................................................................... 130
7.3.5 Load conditions for tests .................................................................................................................. 131
7.3.6 DC steady state ............................................................................................................................... 131
Test definitions ...................................................................................................................................... 132
7.4.1 Partial discharge test with AC voltage ............................................................................................. 132
7.4.2 Partial discharge test with DC voltage ............................................................................................. 132
7.4.3 Rated DC withstand voltage test...................................................................................................... 133
7.4.4 Superimposed impulse voltage test ................................................................................................. 133
7.4.5 Polarity reversal test ........................................................................................................................ 134
7.4.6 Voltage test across open switching devices .................................................................................... 135
7.4.7 DC Insulation System Test .............................................................................................................. 136
7.4.8 Criteria to pass the test .................................................................................................................... 139
Test Overview ........................................................................................................................................ 139
Type Tests .............................................................................................................................................. 140
7.6.1 Range of approval ........................................................................................................................... 140
7.6.2 Test objects ..................................................................................................................................... 140
7.6.3 Non dielectric tests for insulators ..................................................................................................... 140
7.6.4 DC withstand voltage tests .............................................................................................................. 141
7.6.5 Superimposed impulse voltage tests ............................................................................................... 141
7.6.6 Switching impulse voltage tests ....................................................................................................... 141
7.6.7 Lightning impulse voltage tests ........................................................................................................ 141
7.6.8 Partial discharge tests ..................................................................................................................... 141
7.6.9 Voltage tests across open switching device .................................................................................... 141
7.6.10 Load condition tests ..................................................................................................................... 141
6
7.6.11 Insulation System Test ................................................................................................................ 141

Routine Tests ......................................................................................................................................... 142
On-site Tests .......................................................................................................................................... 142
7.9.1 Range of approval ........................................................................................................................... 142
7.9.2 Test objects ..................................................................................................................................... 142
7.9.3 Test sequence ................................................................................................................................. 142
7.9.4 Success criteria, re-testing and interruptions ................................................................................... 144
Test equipment, test procedures .......................................................................... 147

Superimposed voltage tests ................................................................................................................. 147
8.1.1 General ............................................................................................................................................ 147
8.1.2 Generation of superimposed voltages ............................................................................................. 147
8.1.3 Coupling and blocking elements ...................................................................................................... 149
8.1.4 Determination of the time parameters .............................................................................................. 157
8.1.5 Measurement of the superimposed voltage ..................................................................................... 158
8.2.1 Basic test circuit ............................................................................................................................... 160
8.2.2 Circuits to generate and inject high current on high voltage potential .............................................. 161
8.2.3 Long-term test sequence ................................................................................................................. 162
8.2.4 Superimposed voltage tests ............................................................................................................ 163
Testing of interfaces between DC cables and gas-insulated DC systems......... 168

Differences in testing philosophies of dielectric testing of DC cables & DC gas-insulated systems;
different test objectives .................................................................................................................................... 168
Stress comparison by means of simulation ........................................................................................ 169
9.2.1 Stress comparison at DC stress ...................................................................................................... 170
9.2.2 Stress comparison at superimposed impulses................................................................................. 171
Proposal for dielectric testing of interfaces between gas-insulated Dc systems and DC Cables.. 171
Further procedure on this subject ....................................................................................................... 172
References of chapter 9 .................................................................................................................................... 172
Conclusion ............................................................................................................. 173
Appendix A: Prototype Installation test ......................................................................... 174

A.1. Statistical considerations for superimposed voltage testing ........................................................ 174
A.2. Impact of time parameters on breakdown voltage at superimposed Voltage testing ................. 175
A.3. examples of CALCULATIONS FOR interruptions OCCURING during the prototype installation
test 178
A.4. Superposition of 80 % Magnitudes with OLI and OSI ..................................................................... 179
References Apppendix A .................................................................................................................................. 180
Appendix B: Pulse sequence Analysis (PSA) ............................................................... 181

B.1 NoDi* Pattern.......................................................................................................................................... 181
B.2. PSA using PSA@DC-Tool ..................................................................................................................... 183
References Apppendix B .................................................................................................................................. 185
7
Appendix C: Mandatory type Tets for GIS and GIL ....................................................... 186
References Apppendix C .................................................................................................................................. 186
Appendix D: Processes in the subcritical regime and the partial critical regime ....... 187
D.1 Processes in the subcritical regime (SCR) ......................................................................................... 187
D.2 Processes in the partially critical regime (PCR) ................................................................................. 188
References Appendix D .................................................................................................................................... 190
Appendix E: Measurement techniques And Measurement results for space charges 193
E.1 Measurement techniques for space charges ...................................................................................... 193
E.2 Measurement results for epoxy insulating materials ......................................................................... 194
References Appendix E..................................................................................................................................... 197
8
Abbreviations
A/D Analog/digital
abs Absolute value
AC Alternating current
Al2O3 Aluminum oxide
AN Audible noise
Ba Particle on insulator surface
BDV Breakdown voltages
BIL Basic insulation level (regularly lightning impulse)
BPA Bonneville Power Administration
C/S Converter station (Figure 1-2)
CAPD Chaotic Analysis of PD
CH Switzerland
CIGRE Conseil International des Grands Réseaux Électriques
CL Corona losses
Co., Inc. Company, incorporated
Cond. Condition
conv. Term. Converter terminal
Cr2O3 Chrome oxide
CTL VSC Cascaded two-level voltage source converter
DC Direct current
DE Germany
DGEBA Diglycidyl ether of bisphenol-A
DUT Device under test
EBD Electric breakdown field strength
EHV Extra high voltage
EMC Electromagnetic compatibility
EP Epoxy resin
EP1 Epoxy resin, type 1
EP2 Epoxy resin, type 2
EPDM Ethylene propylene diene monomer
erc Enclosure current (Figure 6.1-9)
ES ON-switch (Figure 4.2-12)
FAT Factory Acceptance Test (routine test)
FEM Finite Element Method
FFO Fast Front Overvoltage
FLIMM Focused - LIMM
GIL Gas-insulated line
GIS Gas-insulated switchgear
GND Ground
HFCT High frequency current transformer
HL High load
9
HV High voltage
HVAC High voltage alternating current
HVDC High voltage direct current
IEC International Electrotechnical Commission
IEEE Institute of Electrical and Electronics Engineers
Imp Impulse  Figure 4.2-5 and following
IP Ion pair
JWG Joint Working Group
L1 Phase L1 in a three-phase electric power system
LC Load cycle
LCC Line-commutated converters
LI Lightning impulse
LIMM Laser Intensity Modulation Method
LIPP Laser Induced Pressure Pulse
LIWV Lightning impulse withstand voltage
M Measurement – Figure 4.3-2
M Center point in an coaxial arrangement – Figure 6.2-7
m.A. with arrester - Figure 3.6-2 and following
max. Maximum
min. Minimum
MMC Modular Multi-Level Converter
neg. Negative
No. Number
o.A. without arrester - Figure 3.6-3 and following
O1 Virtual beginning of impulse voltage – Figure 8.1-8 and following
OHL Overhead line
OLI Oscillating lightning impulse
OSI Oscillating switching impulse
p.u. Per unit
P/S Power station – Figure 1-2
pA Pico-amperemeter
PC Personal computer
PCR Partial critical regime
pcs Pieces
PD Partial discharge
PDEV PD extinction voltage
PDIV PD inception voltage
PEA Pulsed Electro-Acoustic
POL Slow polarisation – Figure 4.3-5 and Figure 4.3-6
pol. Polarity
pos. Positive
10
PSA Pulse sequence analysis

PWP Pressure Wave Propagation
RC Contribution from 𝜎(𝑇) and instant polarisation 𝜀∞ – Figure 4.3-5 and Figure 4.3-6
RC Resistive-capacitive
RH Relative humidity
RI Radio interference
RIP Resin paper impregnated
RMS Root mean square
RS-232 Recommended standard 232
RT Room temperature – Figure 6.2-1
S simulation
S/IMP Superimposed Impulse Voltage
S/S substation – Figure 1-2
SAT Site Acceptance Test (on-site test)
SCR Subcritical regime
SF6 Sulphur hexafluoride
SFO Slow front overvoltage
SG Spark gap
SG Stress grading – chapter 9.2
SI switching impulse
Si rubber Silicone rubber
SiO2 Silicon dioxide
SIWV Switching impulse withstand voltage
TB Technical brochure
TOV Temporary overvoltages
TP Triple point
TPM Thermal Pulse Method
TSM Thermal Step Method
UHF Ultra high frequency
USB Universal serial bus
VFT Very fast transients
VRT Voltage rising tests
VSC Voltage source converter
V-t Voltage-time
W1 Line in an coaxial arrangement – Figure 6.2-7
W2 Line in an coaxial arrangement – Figure 6.2-7
wt Weight – Figure 6.2-1
XLPE Cross-linked polyethylene
ZL Zero load
ZnO Zinc oxide
11
List of symbols
⃗0 Zero vector 1
𝑎 𝐷⁄𝐵1 – Figure 6.2-7 1
𝐴1.2/100 Voltage time area of an 1.2/100 voltage impulse V∙s
𝐴1.2/50 Voltage time area of an 1.2/50 voltage impulse V∙s
𝐴10/50 Voltage time area of an 10/50 voltage impulse V∙s
𝐴LI Voltage time area of an LI voltage V∙s
𝐴OLI Voltage time area of an OLI voltage V∙s
𝐴i Amplitude of PD impulse i dB, µV
𝐴i+1 Amplitude of PD impulse i + 1 dB, µV
𝐵1 width of a particle trap m
𝑏− Mobility of negative ions – cm²/(V∙s)
Figure 4.1-3
𝑏+ Mobility of positive ions – cm²/(V∙s)
Figure 4.1-3
𝐶 Capacitance F
c0 Speed of light in vacuum m/s
𝐶B Capacitance of an coupling & blocking capacitor F
𝐶C Capacitance of an composite measuring divider F
𝐶DC Capacitance at DC terminals of dual level VSC converter F
𝐶divider Capacitance of the voltage divider of an impulse voltage generator F
𝐶DUT Capacitance of the DUT F
𝐶L Total load capacitance of an impulse voltage generator F
𝐶S Overall impulse capacitance of an impulse voltage generator F
𝐶stray Stray capacitance of the test assembly F
⃗
𝐷 Displacement field C/m²
𝐷 Diffusion coefficient of the material – equation (4–3) m²/s
𝐷 Diameter – Figure 6.2-7 m
𝑑 Sample thickness – Figure 4.2-17 m
𝑑c Degree of charging of a specific location – equation (6–2) 1
𝑑cap Thickness of the enclosure – Figure 6.1-8 m
𝑑I Epoxy thickness of an insulator – m
Figure 4.1-3
𝐷n Normal component of the displacement field C/m²
𝐷n gas 𝐷n in the gas insulation C/m²
𝐷n solid 𝐷n in the solid insulation C/m²
𝑑SG Spark gap flashover distance m
𝑑skin Skin depth m
𝑑ϑ Time to reach thermal steady state s
𝐸⃗ Electrical field V/m
𝐸AC Capacitive (AC) electric field at energisation V/m
12
𝐸AC max Maximum electric field strength at applied AC voltage V/m

𝐸BD Breakdown field strength V/m
𝐸DC Asymptotic DC steady state electric field V/m
𝐸L Levitation field strength V/m
𝐸max Maximum occurring electrical field strength – Figure 4.2-23 V/m
𝑒p (𝑡) Impulse voltage source V
𝐸Ref Reference value of an electrical field V/m
𝑓 Frequency Hz
𝐹a Electrostatic force at point a – Figure 5.2-5, Figure 5.2-7 N
𝐹b Electrostatic force at point b – Figure 5.2-5, Figure 5.2-7 N
𝐹c Electrostatic force at point c – Figure 5.2-7 N
𝐹d Electrostatic force at point f – Figure 5.2-5 N
𝐹e Electrostatic force N
𝐹e Electrostatic force at point f – Figure 5.2-5, Figure 5.2-7 N
𝐹f Electrostatic force at point f – Figure 5.2-5, Figure 5.2-7 N
𝑔 Vector of gravitational constant kg∙m/s²
g Gravitational constant, 9.81 m/s2 m/s²
ℎ Height m
ℎ1 Height of epoxy resin insulator – Figure 4.3-2 m
ℎs Height of test sample – Figure 4.2-12 m
𝐼 Current A
i Counting variable – Figure 6.2-5: counting of PD pulses 1
𝐼AC AC current A
𝐼c Conduction current – section 4.2.3.3.2 A
𝐼DC DC current A
𝐼dep Depolarisation current A
𝐼eq,AC Equivalent AC current applied during type tests and long performance test A
𝐼eq,DC Equivalent (or test) DC current A
𝐼gas Ion-currents through the gaseous insulation A
𝐼pol Polarisation current A
𝐼rDC Rated continuous DC current (maximum continuous direct current) that the gas- A
insulated system is required to carry under the specified operating conditions.
𝑖rel Relative harmonic current %
𝐼solid Conduction currents originating from the solid insulation A
𝐼surface∗ Surface currents flowing along the interface A
𝐽 Current density A/m²
𝑗g DC steady-state injection current density A/m²
−
𝑗IP Additional IP injection current density from the enclosure pA/m²
𝑘 Skin effect factor – Figure 6.1-8 1
𝑘ac Current reduction factor when testing DC equipment with AC current 1
kB Boltzmann constant J/K
𝑘RD−RL Voltage divider ratio between 𝑅D and 𝑅L – chapter 8.1 1
13
𝑘CC−CL Voltage divider ratio between coupling capacitor and load – chapter 8.1.5 1
𝑘p (𝑇) Parameter for modelling according to Curie-von Schweidler approach – Figure A/m²
4.3-3
𝑘r Recombination coefficient – cm³/s
Figure 4.1-3
𝑘s Safety factor according to insulation co-ordination procedure 1
𝑙 Length of an object m
𝐿 Inductance H
𝑚 Mass kg
𝑛 Time exponent obtained from current-voltage experiments – Figure 4.3-3 1
𝑛 Voltage endurance coefficients (lifetime exponent) – chapter 6.3 1
𝑛IP Number of ion pairs – IP/(cm³)
Figure 4.1-3
𝑁 Number of insulators – appendix A 1
𝑛(𝑥, 𝑡) Density of the charge carriers depending on 𝑥 and 𝑡 – equation (4–3) 1/m³
𝑃 Accumulated charge density during polarisation – equation (4–3) C/m²
𝑝 Pressure Pa
𝑝SF6 Pressure of an SF6 vessel Pa
𝑄 Charge C
𝑄̇ Heat transfer flux W/m2
q Charge of an electron C
𝑄 Particle charge – equation (5–1) C
𝑄1 Charge at electrode 1 – Figure 4.2-17 C
𝑄2 Charge at electrode 2 – Figure 4.2-17 C
𝑄a Particle charge at point a – Figure 5.2-5 C
𝑞bi PD pulse sequence at time 𝑡b during firefly phenomenon C
𝑞c PD pulse at point c – Figure 5.2-5 C
𝑞ci PD pulse sequence at time 𝑡c during firefly phenomenon C
𝑞d PD pulse at point d – Figure 5.2-5 C
𝑞di PD pulse sequence at time 𝑡d during firefly phenomenon C
𝑞ei PD pulse sequence at time 𝑡e during firefly phenomenon C
𝑞g PD pulse at point g – Figure 5.2-5 C
𝑄i Charge at position 𝑥𝑖 – Figure 4.2-17 C
𝑄i Amplitude of PD impulse i C
𝑄i+1 Amplitude of PD impulse i + 1 C
𝑄surface Surface charge C
𝑟 Radius coordinate in a polar coordinate system m
𝑅 Ohmic resistance Ω
𝑟 Particle position of the center of gravity m
𝑟a Radius outer conductor m
𝑅a Surface roughness: arithmetical mean deviation of the assessed profile m
𝑅AC Electrical resistance under AC current stress (e.g. 50 Hz or 60 Hz or at Ω
harmonics)
14
𝑟c Radius from conductor – Figure 6.1-1 m

𝑅C DC resistance of an composite measuring divider Ω
𝑅D DC source protection element Ω
𝑅DC Electrical resistance under DC current stress Ω
′
𝑅DC 𝑅𝐷𝐶 per unit length Ω/m
𝑅DUT Resistance of the DUT Ω
𝑅F Front time resistor of an impulse voltage generator Ω
𝑅𝐻 Relative humidity %
𝑟i Radius inner conductor m
𝑅L Total ohmic load resistance for a DC voltage source Ω
𝑟s Radius of test sample – Figure 4.2-12 m
𝑅T Tail time resistor of an impulse voltage generator Ω
𝑠 Distance m
𝑠c Distance of needle electrode to the test sample – Figure 4.2-12 m
𝑠m Distance of rod electrode to the test sample – Figure 4.2-12 m
𝑡 Time s
𝑇 Temperature °C, K
𝑇1 Front time of an impulse voltage s
𝑡1 Time of DC pre-stress before polarity reversal – Figure 7.4-3 s
𝑇2 Time to half value of an impulse voltage s
𝑡2 Additional DC voltage stress of opposite polarity after 2 ∙ 𝑡1 s
𝑡90 % Time to reach at least 90 % of the stationary DC field at each location – Figure s
4.1-4 – in the following chapters tDC is used
𝑡𝐷𝐶 Duration to achieve 90% of the steady-state charging condition s
𝑇amb Ambient temperature – section 9 °C, K
𝑇av Average temperature °C, K
𝑇cond Temperature at the current carrying conductor °C, K
𝑇cond,max Maximum conductor temperature at rated current °C, K
𝑇d,cond,max Maximum conductor temperature for which the conductor is designed to operate °C, K
at rated current
𝑡m Duration of voltage steps – Figure 5.2-15 s
𝑡OFF Interruption time during a DC long-term stress s
𝑇P Time to peak of an switching impulse voltage s
𝑈 Voltage V
̂
𝑈 Peak value of an voltage shape V
𝑈0 Nominal voltage for HVDC cables V
𝑈0 Starting voltage for the generation of a disruptive discharge – appendix A V
𝑈10(200) Breakdown voltage with 10 % breakdown probability for 200 insulators V
LI
𝑈10(200) Breakdown voltage for LI with 10 % breakdown probability for 200 insulators V
SI
𝑈10(200) Breakdown voltage for SI with 10 % breakdown probability for 200 insulators V
𝑈10(5) Breakdown voltage with 10 % breakdown probability for 5 insulators V

LI
𝑈10(5) Breakdown voltage for LI with 10 % breakdown probability for 5 insulators V
15
SI
𝑈10(5) Breakdown voltage for SI with 10 % breakdown probability for 5 insulators V
𝑈50 Breakdown voltage with 50 % breakdown probability V

𝑈BDV_LI Lightning impulse breakdown voltage V
𝑈C Total charging voltage of an impulse voltage generator – chapter 8.1 V
𝑈CB Voltage drop at the terminals of 𝐶B V
𝑈cw Co-ordination withstand voltage V
𝑈DC DC voltage V
𝑈DUT Voltage at the DUT terminals V
𝑈IG out Impulse voltage generator output voltage achieved during SI tests or LI tests, V
respectively
∗
𝑈IG out Output voltage of an impulse generator which reaches the test object by use of V
an coupling capacitor – chapter 8.1.5
𝑈LI Lightning impulse voltage V
̂LI
𝑈 Peak value of the composite voltage formed by a superposition of DC-voltage V
and lightning impulse voltage on one energized terminal of the test object
𝑈nDC Nominal DC voltage: mean value of DC voltage required to transmit nominal V
power at nominal current
𝑈OLI Oscillating lightning impulse voltage V
𝑈OSI Oscillating switching impulse voltage V
𝑈ost AC test voltage (RMS) for on-site tests (commissioning) V
𝑈P Is the rated lightning impulse withstand voltage V
𝑈PDIV PD inception voltage V
̂pd−test AC
𝑈 AC test voltage for PD measurement during type tests, routine tests and on-site V
tests
𝑈pd−test DC DC test voltage for PD measurement during type tests, routine tests and on-site V
tests.
̂pre−stress AC
𝑈 AC pre-stress voltage during type tests, routine tests, and on-site tests to pre- V
stress the equipment before PD measurement are made
𝑈pre−stress DC DC pre-stress voltage during type tests to pre-stress before measurement of the V
PD behaviour
𝑈probe Potential of non-contact electrostatic probe V
𝑈RD Voltage drop across the terminals of 𝑅D V
𝑈rDC Rated continuous DC voltage is the maximum continuous direct voltage V
assigned to the gas-insulated system by the manufacturer for specified
operating conditions
𝑈rwDC Rated DC withstand voltage during type tests and routine tests V
𝑈S Rated switching impulse withstand voltage V
𝑈SG Voltage drop across the terminals of an spark gap V
𝑈SI Switching impulse voltage V
̂SI
𝑈 Peak value of the composite voltage formed by a superposition of DC voltage V
and switching impulse voltage on one energized terminal of the test object
𝑈T DC test voltage during the prototype installation test V
𝑉 Voltage V
𝑉6 Switching impulse flashover voltage – Figure 4.2-6 V
𝑉bd,DC Breakdown voltage at DC stress V
16
𝑉bd,VRT,warm Breakdown voltage in warm condition of an insulator arrangement V

𝑉DC DC voltage V
𝑉LI Peak of lightning impulse voltage – Figure 4.2-7 V
𝑤in Insulator width at the conductor – Figure 6.1-1 m
𝑤out Insulator width at the enclosure – Figure 6.1-1 m
𝑥 Coordinate in Cartesian coordinate system (typically length) m
𝑥i Position i in x-direction – Figure 4.2-17 m
𝑦 Coordinate in Cartesian coordinate system (typically width) m
𝑧 Coordinate in Cartesian and polar coordinate system (typically height) m
𝑍 Standard deviation around 𝑈50 – appendix A V
𝑍TO Test object impedance – Figure 6.1-9 Ω
Δ𝐴i Difference of the PD magnitude between impulse i+1 and i dB, µV
Δ𝐴i+1 Difference of the PD magnitude between impulse i+2 and i+1 dB, µV
Δ𝑄i Difference of the PD magnitude between impulse i+1 and i C
Δ𝑄i+1 Difference of the PD magnitude between impulse i+2 and i+1 C
Δ𝑇 Temperature gradient – Figure 4.2-17 K
Δ𝑡 Time intervals between consecutive PD impulses – Figure 5.2-12 s
Δ𝑇 Temperature difference between conductor and enclosure at rated current K
Δ𝑇d,max Maximum temperature gradient across the electric insulation for which it is K
designed to operate at rated current
Δ𝑡i Time difference between PD impulse i+1 and i s
Δ𝑡i+1 Time difference between PD impulse i+2 and i+1 s
Δ𝑇max Maximum temperature difference over the gas insulation in thermal steady state K
Δ𝑈 Surface potential difference – Figure 4.3-12 V
Δ𝑈 Voltage difference – Figure 5.2-15 V
Δ𝑥 Area in x-direction m
Δ𝑥het Area for homo-charge accumulation m
Δ𝑥hom Area for homo-charge accumulation m
𝜀 Permittivity A∙s/(V∙m)
ε0 Vacuum permittivity A∙s/(V∙m)
𝜀1 Permittivity of material one of an arrangement with several materials A∙s/(V∙m)
𝜀2 Permittivity of material two of an arrangement with several materials A∙s/(V∙m)
𝜀∞ Instant polarisation – Figure 4.3-4 A∙s/(V∙m)
𝜀r Relative permittivity of material 1
𝜀rI Relative permittivity of material I – 1
Figure 4.1-3
𝜂 Coefficient of viscosity of SF6 gas – equation (5–1) Pa∙s
𝜂 Efficiency of an impulse voltage generator %
𝜗 Temperature °C
𝜃 Temperature rise K
𝜑 Azimuthal angles in polar coordinates – Figure 4.3-11 and Figure 4.3-12 °
 Effective convective heat transfer coefficient – under Table 6.1-2 W/(m2∙K)
17
𝜇 Permeability V∙s/(A∙m)
𝜇(𝑥, 𝑡) Mobility of the charge carriers depending on 𝑥 and 𝑡 – equation (4–3) m²/(V∙s)
𝜌 Resistivity Ω∙m
𝜌̇ IP Ion pair generation rate – Figure 4.3-4 IP/cm3/s
𝜌Vol Volume resistivity Ω∙m
𝜎 conductivity – Figure 4.2-15, Figure 4.3-3, Figure 4.3-4, equation (6–1) S/m
𝜎0 DC conductivity at 0 K – section 4.2.3.3.2 S/m
𝜎1 Conductivity of material one of an arrangement with several materials –Figure S/m
4.2-9 d
𝜎2 Conductivity of material two of an arrangement with several materials – Figure S/m
4.2-9 d
𝜎DC DC conductivity – section 4.2.3.3.2 S/m
𝜎m Mean material conductivity – Figure 4.2-5 S/m
𝜎s Conductivity of a surface layer with layer thickness dL - S
Figure 4.1-3 𝜎VI ∙ 𝑑L
𝜎VI Volume conductivity - Figure 4.3-2 S/cm
𝜏 Dielectric time constant of an ohmic-capacitive network s
𝜏cable Ohmic-capacitive relaxation time constant of a cable system – chapter 9 s
𝜏Cone Ohmic-capacitive relaxation time constant of a cable termination (stress cone) – s
chapter 9
𝜏Gas Ohmic-capacitive relaxation time constant of a gas insulation – chapter 9 s
𝜏m Relaxation time constant from capacitive to resistive field distribution – equation s
(6–1)
𝜏SG Ohmic-capacitive relaxation time constant of cable end stress grading system – s
chapter 9
𝜔 Angular frequency 1/s
18
1. Introduction
Development of HVDC transmission technologies is progressing quickly due to the push for the
generation of electricity from renewable sources, often located far away from the load centers this
requiring long-distance transmission systems. Besides DC overhead lines, underground lines, e. g. gas-
insulated HVDC lines are of interest, in particular when environmental concerns are relevant. Moreover,
gas-insulated HVDC substations are applied at the converter or transition stations due to their space
saving features.
Gas-insulated HVAC systems feature a high degree of reliability and an excellent long-term performance.
This applies for gas-insulated switchgear (GIS) as well as for gas-insulated lines (GIL). The user, who
intends to apply gas-insulated HVDC systems, will expect the same reliability and long-term
performance. Technical feasibility and initial application of gas-insulated HVDC GIS was described
previously in CIGRE Technical Brochure 506 [1].
The potential of gas-insulated systems for high power HVDC applications was recognized and studied
in the 1980s following the first installation in 1983 [2]. Nevertheless, the commercial use of HVDC GIS
was limited to only few applications (see Figure 1-1) [3]; the further use having been hampered by a
tendency for the insulating materials to fail during polarity reversal tests. This phenomenon was
generally attributed to the presence of space charges trapped within the insulation material itself.
Figure 1-1: HV DC GIS history
Meanwhile a lot of service experience has been collected from the first DC GIS installations. A GIS
busbar with a DC voltage of ±150 kV with superimposed harmonics is in operation since 1983/1987 in
Gotland (Sweden). It consists of gas-insulated connections between the converter transformer and
the valve hall as shown in Figure 1-1 [4].
19
Kitananae S/S
Hokuto C/S
New Hokkaido-Honshu Hakodate C/S
HVDC link
OHL: 72 km Hokkaido-Honshu
HVDC link; existing
Submarine cable, 43 km
Tunnel cable: 24 km
OHL: 21 km
Imabetsu C/S
Figure 1-2: New Hokkaido-Honshu HVDC link in Japan (250 kV DC, 1200 A DC) [5]
The first commercial HVDC GIS was installed in the Kii-channel HVDC link in Japan at Anan converter
station of Shikoku Electric Power Co., Inc. and in Yura switching station of The Kansai Electric Power
Co., Inc. (Figure 1-3a). They were designed for ±500 kV and have been in commercial operation with
±250 kV DC (1400 MVA) since June 22 in the year 2000. Recently, a second 250 kV DC link between
Honsyu and Hokkaido island was put into operation with a HVDC switchgear at the converter stations
[7] [8] (Figure 1-2, Figure 1-3b).
a) b)
Figure 1-3: DC GIS at Anan converter station (a) [6] and DC GIS at converter stations of the
new DC link (b) [7] [8]
20
Furthermore, in Germany DC GIS will be realized in different projects of the offshore grid in the North
Sea in the early 2020ies (Figure 1-4) [10].
DENMARK
Converter
platform
Grid connection
onshore
DC link
Offshore wind- GERMANY
NETHER-
farm cluster LANDS
Figure 1-4: DC links in the North Sea offshore grid [10]
In these projects a ±320 kV DC GIS will be installed on an offshore platform, thus profiting from the
space-saving feature of a GIS compared with conventional switchgear. By utilizing DC GIS in the DC
yard a reduction of platform dimensions of about 10% can be achieved (Figure 1-5) [11].
VSC Converter DC GIS Reactors
7m
Reduction of platform dimensions by about 10%
Figure 1-5: HVDC GIS switchyard installed on an offshore platform [11]
All these HVDC GIS installations were subjected to thorough dielectric testing, covering the basic
phenomena [9] [12] [13] [14] [15], but with different testing procedures and test levels, as no standards
for (dielectric) testing of HVDC gas-insulated systems – the basis for a satisfactory reliability – are
currently in place.
Therefore, CIGRE Joint Working Group JWG D1/B3.57 was created to consider this topic in detail. Based
on the fundamental phenomena in electrical gas-insulated systems under DC and transient voltage
stress and taking into account the properties of the materials involved a generally accepted
recommendation for dielectric testing of gas-insulated HVDC systems at rated voltage up to and
including ±550 kV should be established.
21
References Chapter 1
CIGRE WG D1.03 (TF11), “Gas insulated systems for HVDC: DC stress at DC and AC systems”,
Technical Brochure No. 506, 2012.
U. Riechert, U. Straumann, R. Gremaud, “Compact Gas-insulated Systems for High Voltage
Direct Current Transmission: Basic Design”, 2016 IEEE PES Transmission & Distribution
Conference & Exposition (T&D), Conference May 2-5 : Exposition May 3-5: Kay Bailey Hutchison
Convention Center Dallas, Texas, USA, paper TD0264, DOI: 10.1109/TDC.2016.751997310.
U. Riechert, M. Kosse, “HVDC gas-insulated systems for compact substation design”, CIGRE
2020, Report B3-120
R. Alvinsson, E. Borg, A. Hjortsberg, T. Höglund, S. Hörnfeldt, “GIS for HVDC Converter
Stations”, CIGRE 1986, Report, 14.02.
https://www.cigre2019.jp/_img/program/The%20New%20Hokkaido-
Honshu%20HVDC%20Link.pdf
T. Shimato, T. Hashimoto, M. Sampei, “The Kii Channel HVDC Link in Japan”, CIGRE Report 14-
106, 2002
https://www.toshiba-energy.com/en/info/info2019_0328_02.htm
https://www.hepco.co.jp/network/stable_supply/efforts/north_reinforcement/state_construction
.html
Y. Yoshida et. al., “Verification tests of developed HVDC power components and equipment”,
Mitsubishi Denki Giho (Technical report of Mitsubishi Electric Corp.), Vol. 70, No. 5, pp. 517-
525, 1996.
Network Development Plan 2030, April 15, 2019. www.netzausbau.de/2019-20130-nep-ub.
M. Hering, “Gas-insulated DC switchgear for application on offshore converter platforms (in
German)”, GIS Userforum Darmstadt (Germany), 09-10-2018.
U. Riechert, U. Straumann, F. Blumenroth, E. Sperling, “Dielectric testing of Gas/Solid Insulation
Systems for HVDC GIS/GIL”, International SC Meeting and Colloquium 2013 CIGRE SC D1, Rio
de Janeiro, Brazil, September 13th-18th, 2015, Proceedings, paper 7.
T. Yasuoka, Y. Hoshina, M. Shiiki, M. Takei, A. Kumada, K. Hidaka, “Insulation Characteristics in
DC-GIS: Surface charge phenomena on epoxy spacer and metallic particle motions”, CIGRE D1-
103, 2018.
K. Juhre, M. Hering, “Testing and long-term performance of gas-insulated systems for DC
application”, CIGRE-IEC Conference on EHV and UHV (AC & DC), April 23-26, 2019, Hakodate.
Hokkaido, Japan, Paper 10-4.
K. Sasamori and H. Hama, "History of gas-insulated switchgear in Japan on transition of
technological development and practical application – The fourth report–", The Institute of
Electrical Engineers of Japan, Transactions on Fundamentals and Materials, Vol.140, No.8,
pp.407-416, 2020 (in Japanese)
22
2. Scope And Objectives

Background
The design of insulating elements for HVAC GIS or GIL is optimized for a capacitive field distribution at
AC voltage and transient (impulse) voltages. Typically, the maximum electric field in a coaxial system
occurs in the area of the inner conductor. For this load case, the electric field decreases with increasing
radial position. At DC voltage the electric field distribution is determined by the temperature- and field
dependent conductivity of the insulating materials. At high temperature gradients between conductor
and enclosure the electric field may be concentrated on the outer radius of the insulator.
Besides this, the accumulation of space and surface charges has to be considered as well as the specific
electric field stress at superposition of impulse voltages [1].
The following parameters are of importance [2]:
Solid insulation polarisation, temperature-dependent DC conductivity, charge injection
from metallic electrodes, charge accumulation, heat conduction,
influence of charged particles and ageing
Gas insulation gas convection, ion pair generation and recombination and ion drift
along field lines toward (insulation) surfaces
Gas solid interface surface charge accumulation and transfer to solid
Today’s multiphysics simulation tools allow the analysis of temperature and electric field distribution,
taking the following parameters into consideration [3][5][6]:
 temperature and electric field dependent characteristics of used insulating materials and
accumulation of space and surface charges
 the specific stress at superposition with impulse voltages
In the past, problems with surface charges on DC insulators were addressed by adding a conductive
coating to the surface of the conventional epoxy insulators. Recently, however, simulations together
with a lot of experimental work have shown that it is possible to use optimized conventional insulators
without requiring any special surface layers for the application in gas-insulated HVDC systems. An
example of the distribution of the electric field on design-optimized insulators for HVDC GIS is shown in
Figure 2.1-1. Note, that the temperature gradient is strongly dependent on design and rated values.
AC Field AC Design
Feld [normiert]
Feld [normiert]
3 3 DC Field AC Design 60
AC Field DC Design
field [normalized]
DC Field DC Design
[normiert]
field [normalized]
[normalized]
Surface temperature
[°C]
Temperatur [°C]
Electric Field [1]
Temperature [°C]
2 55
Temperature
2
Electric fieldFeld
Elektrisches
Elektrisches
Elektrisches
50
Electric
Electric
1 1
45
0 0
40 60 80 100 120 140 160 180 200 220 40 60 80 100 120 140 160 180 200 220
Radius [mm]
Radius [mm] Radius [mm]
[mm]
Radius
Figure 2.1-1: Electric field distribution (normalized) on a GIS insulator at AC load (left)
and DC load (right) with consideration of a realistic temperature gradient between
conductor and enclosure [7]
The combined effects can be proven using simulations. The theoretical results should be verified in
development tests by:
 Breakdown tests
 Measuring of temperature distribution on the insulators
 Space and surface charge measurements
 Tests to determine the ageing behaviour of the insulator material
23
 Long-term tests to determine limits for life-time

 PD-behaviour with defined particles in the gas-insulated system
Objectives
As it is generally agreed, dielectric testing parameters and procedures as well as international standards
are missing for gas-insulated DC systems, such that the main objectives of this document are:
 Clarification of fundamental phenomena in electrical gas-insulated systems under DC and
transient voltage stress taking into account the properties of the involved materials.
 Development of testing strategies for gas-insulated HVDC systems (e.g. HVDC GIS/GIL)
including the parameters and procedures for type tests, routine tests and on-site tests.
 Necessity of long-term tests (prototype installation test) and relevant test procedures.
The following items will be considered:

o Voltage and overvoltage stresses subjected to gas-insulated systems
o Basic phenomena and insulation properties at DC and overvoltage stresses
o Dielectric testing of gas-insulated HVDC systems to cover DC phenomena and to withstand
dielectric stresses
o Recommendations for testing of gas-insulated HVDC systems (type tests, routine tests, on-site
tests)
o Prototype installation test as long-term test; test arrangement and testing procedure, test
equipment
This Technical Brochure considers the above issues including the latest research work and discusses
conclusion for dielectric testing of gas-insulated HVDC systems. It is regarded as the basis for future
standardisation work and as a useful guidance to realize future highly reliable HVDC equipment.
24
[1] IEC 60071-5 Ed. 1, “Insulation co-ordination – Part 5: Procedures for high-voltage direct current
(HVDC) converter stations”, 2014
[2] R. Gremaud, F. Molitor, C. Doiron, T. Krivda, T. Christen, U. Riechert, U. Straumann,
K. Johansson, N. Lavesson, “Solid-gas Interfaces in DC Gas Insulated Systems, 4. ETG-
Fachtagung Grenzflächen in elektrischen Isoliersystemen: Beanspruchungen, Design,
Prüfverfahren, Lebensdauer (in German)” 12.-13. November 2013 NH Hotel Dresden
www.vde.com/grenzflaechen2013, Germany, ETG-Fachbericht 140, 2013, report 4.4, pp. 139-144,
VDE VERLAG GMBH, Berlin and Offenbach, ISBN 978-3-8007-3557-0
[3] CIGRÉ Working Group D1.03, “Gas Insulated System for HVDC: DC Stress at DC and AC Systems”,
Technical Brochure 506, August 2012.
[4] R. Gremaud, F. Molitor, C. Doiron, T. Christen, U. Riechert, U. Straumann, B. Kälstrand,
K. Johansson, O. Hjortstam, “Solid Insulation in DC Gas-Insulated Systems”, CIGRÉ Report D1-
103, 45th CIGRÉ Session, August 24-August 30, 2014, Palais des Congrès de Paris, Paris, France,
2014
[5] R. Gremaud, M. Bjelogrlic, M. Schneider, E. Logakis, Ch. Schlegel, St. Fürsich, A. Krivda,
Th. Christen, U. Riechert, “Surface charge decay on HVDC insulators: Temperature and Field
effects”, 11th ICSD, IEEE International Conference on Solid Dielectrics, Bologna, Italy, June 30 -
July 4, 2013, ICSD 2013, conference proceedings paper 261, pages 1056 – 1059, Digital Object
Identifier: 10.1109/ICSD.2013.6619685
[6] M. Hering, R. Gremaud, J. Speck, S. Großmann, U. Riechert, "Flashover behaviour of insulators
with inhomogeneous temperature distribution in gas insulated systems under DC voltage stress”,
IEEE International Conference on High Voltage Engineering and Application, Poznan, September
2014.
[7] Riechert, U.; Straumann, U.; Gremaud, R., Compact Gas-insulated Systems for High Voltage
Direct Current Transmission: Basic Design, 2016 IEEE PES Transmission & Distribution Conference
& Exposition (T&D), Conference May 2-5: Dallas, Texas, USA, paper TD0264
25
3. Voltage and overvoltage stresses of gas-

insulated HVDC Systems
Configurations under consideration
If a DC link shall be realized by means of gas-insulated systems – gas-insulated switchgear (DC GIS)
and/or gas-insulated lines (DC GIL) – the configurations shown in Figure 3.1-1 can be considered [1].
Option 1 shows an OHL circuit B1 – C1 connecting the two converter stations. The DC substation at the
converter stations can be established as a gas-insulated system. If a partial undergrounding of the line
is considered, a DC GIL is an option. In this regard, beside the pure OHL configuration the GIL-OHL
configurations (B2 – C2) and (B3 – C3) are presented in Figure 3.1-1.
Configuration (B2 – C2) shows a DC GIL section between two OHL sections. The stress of the OHL is
comparable to that considered in configuration (B1 – C1). (B3 – C3) comprises an OHL and a GIL section
directly entering the DC substation at the converter station. In this case the DC substation will normally
be a gas-insulated type and therefore the overvoltages entering the DC GIS substation are of
importance.
Transmission line
SFO due to earth faults
B1+ 4 OHL (AC/DC hybrid) C1+
1, 2 Converter
3
3 Line
B2+ DC GIL 4 OHL C2+
FFO due to lightning
3
DC substation
4 A6
+ B3+ OHL DC GIL 4 OHL C3+

A3
DC substation
A6‘ A6 3
2 A1'
A1 B1- OHL (AC/DC hybrid) C1-
B2- DC GIL A7 C2-

A2 – OHL OHL
B3- DC GIL C3-
1 A5 A7‘ A7
Figure 3.1-1: DC links, configurations under consideration [1]
For the insulation co-ordination procedure, which is the basis for determining test voltages for this
equipment, stresses due to the continuous operating voltage, temporary over-voltages, slow front and
fast front overvoltage have to be carefully considered.
Continuous operating voltage

The continuous operating voltage is of special importance for the design and layout of the outdoor
insulators. It also affects the audible noise (AN), radio interference (RI) and the corona losses (CL). At
AC/DC hybrid OHLs the coupling between the AC circuit and the DC circuit and vice versa has to be
taken into account. Due to the capacitive coupling, a DC component is superimposed to the AC voltage
and an AC ripple is superimposed to the DC voltage. These phenomena have to be taken into account,
when designing the outdoor insulators and the GIS and GIL parts connected and may also increase the
AN as well as the RI. It is also of interest for the definition of the arrester ratings.
26
Temporary overvoltages
Temporary overvoltages (TOV) are mainly caused by failures in the control system of the converters of
the DC link. TOV have to be considered, when determining the arrester ratings, in particular the TOV
capability.
Slow front overvoltages

Slow front overvoltages (SFO) on DC links are mainly caused by overvoltages due to earth faults. These
faults can be subdivided, depending on the fault location, into converter faults and faults on the
transmission line (Figure 3.1-1). Faults 1 and 2 are converter faults and faults 3 are faults on the
transmission system. SFO caused by line energisation and reclosing shall not be taken into account, as
the DC voltage is ramped up smoothly from zero and in the reclosing process the line de-energisation
process eliminates the trapped charge.
It has to be noted that all faults types cause stress on the converter as well as on the transmission
system. Therefore, adequate overvoltage protection measures are required to cope with these types of
faults.
Fast front overvoltages

Fast front overvoltages are mainly caused by lightning surges (fault 4 in Figure 3.1.1), but their
amplitudes are limited by flashovers which will occur along the insulator string. That flashover voltage
determines the safety clearance. For overvoltages entering the converter station or the GIL section, the
voltage-time characteristic of the insulator string has to be taken into account.
Simulation of overvoltages
The overvoltages were calculated by means of the simulation program PSCAD® using the converter
models and line models provided. The simulations refer to the configuration shown in Figure 3.1-1. The
transmission line was assumed to have a length of 400 km. Two cases are under investigation:
1. The line consists of an OHL only,
2. The line is fitted with a GIL section, 1 km in length, before entering the converter station.
Different converter configurations (symmetrical monopole, bipole) and different converter technologies
– two level VSC technology, MMC technology and LCC technology – with a transmission capacity of
1.2 GW are considered.
The simulations were carried out for a ±320 kV system. The overvoltages are normalized and given in
p.u. values. The values found for SFO are also valid for other system voltages, as they are internal
overvoltages. The values for FFO are valid for ±320 kV, as far as the overvoltages are not limited by
arresters. If the overvoltages are limited by arresters, the p.u. values may be assumed as being valid
for other system voltages too, as long as the arrester characteristic (Figure 3.6-1) and the ratio residual
voltage to system voltage is the same.
27
The arrester characteristic is presented in Figure 3.6-1 [2]. The voltages are given related to the residual
voltage at 10 kA, 8/20 s of 652 kV [3].
Figure 3.6-1: Arrester characteristic [2]
3.6.1 Slow front overvoltages due to earth faults

3.6.1.1 Transmission line
This part of the simulation covers different fault locations on the transmission line – at the middle of
the line, 1/8 away from the sending end and directly at the converter – and the overvoltages generated
by these faults at different locations – at the fault location, at the converter and at the GIL-OHL interface
in the case of GIL-OHL hybrid systems. The metallic return is assumed to be directly grounded at the
sending end and via an arrester at the receiving end. Table 3.6-1 summarizes the results.
Table 3.6-1: Slow front overvoltages in p.u. at fault location, converter terminal and GIL-OHL
interface in case of GIL-OHL hybrid lines caused by earth faults at different fault locations, line
length 400 km [1], except 1) line length 750 km [4]
SFO at line to earth faults

Bipol symmetrical
monopol,
2-level VSC,
CDC = 100 F
CDC = 100 F MMC LCC1)
fault conv. GIL- fault conv. GIL- fault conv. fault conv.
fault location location term. OHL location term. OHL location term. location term.
without arresters 2,2 1,5 1,5 1,8 1,2 1,2 1,5 1,2 2,2 2,5
mid
limited by arresters 1,7
without arresters 1,7 1,7 1,1 1,1 2,3
1/8
limited by arresters 1,7
An earth fault in the middle of the transmission line is the most critical case. Earth faults at other fault
locations generate lower overvoltages. At two-level VSC technology higher overvoltages are generated
as compared to other converter technologies (Figure 3.6-2).
No distinct overvoltage has been observed at the converter terminals of a bipole configuration. The
same is true for the OHL-GIL interface. Due to the very low overvoltages neither the arrester at the
28
Voltage at fault location, 200 km
1.0
two-level VSC technology 1.0 MMC technology

overvoltage [pu]
overvoltage [pu]
0.0
0.0
Cdc = 100 F
-1.0
-1.0
-2.0
-2.0
-2.5
0 2 4 6 8 [ms] 10 0 1 2 3 4 [ms] 5
Figure 3.6-2: Overvoltages due to an earth fault in the middle of the transmission OHL,
400 km in length [1]
converter nor the arrester at GIL-OHL interface becomes active. That is different from the performance
of a symmetrical monopole. In this configuration a considerable overvoltage would occur at the
converter terminals, this overvoltage can be limited by the arresters installed at the converter terminals.
The results prove that the overvoltages caused by line faults strongly depend on the converter
technology applied.
3.6.1.2 Converter
In addition to the overvoltages caused by line faults, overvoltages caused by converter faults have to
be considered. These over-
voltages are of interest Table 3.6-2: Slow front overvoltages in p.u. at converter terminals
because they stress the caused by earth fault at the DC side or AC side [1]
converter itself and also
SFO at converter faults
the GIL section connected Bipol
symmetrical
to the converter station. In
Overvoltage at converter 2-level VSC, monopol
this respect, converter MMC
terminals CDC = 100 F
faults on the DC side as
Overvoltage at converter terminals [pu]
well as on the AC side are
without arresters 1,8 1,2 2,3
considered. The simulation DC side
limited by arresters 1,6 1,8…2,0
results are summarized in without arresters 2,5 2,1
Table 3.6-2. AC side
limited by arresters 1,9 1,6…1,8
The overvoltages differ
with the converter
technology applied. Earth faults on the DC side of the converter in two-level VSC technology are limited
by the arrester at the converter terminal. If MMC technology is applied and an earth fault on the AC
side of the converter occurs, the overvoltage on the DC side will be limited by arresters at the converter
terminals. The graphs of the overvoltages can be taken from Figure 3.6-3.
29
2.0 with A4 & A5

1.0
overvoltage [pu]
overvoltage [pu]
1.0
0.0
0.0
-1.0 with A4
-1.0
without A4
-2.0 -2.0
0.0 0.1 [s] 0.2 0.0 0.1 0.2 0.3 0.4 [s] 0.5
Figure 3.6-3: Overvoltages in case of earth faults on the DC side or the AC side of the
converter for different converter technologies [1]
A4, A5 Arresters according to Figure 3.1-1
Left: Earth fault on the DC side, two-level VSC technology
Right: Earth fault on the AC side, MMC technology
The results demonstrate that the overvoltages caused by converter faults, stressing the converter, the
converter station or the OHL and the GIL section connected respectively do not exceed 2 p.u.
3.6.2 Fast front overvoltages due to lightning

These simulations consider overvoltages caused by lightning strokes to the transmission line in the
vicinity of the converter station or the GIL-OHL interface respectively. In the latter case, the GIL section
was assumed to be 1 km in length and directly connected to the converter (Figure 3.1-1). It was
assumed that a lightning current of 18 kA may hit the conductor due to a shielding failure [5]. The
simulation results are summarized in Table 3.6-3.
Table 3.6-3: Fast front overvoltages in p.u. at the converter terminals or at the
GIL-OHL interface caused by lightning [1]
FFO at lightning strokes to Bipol symmetrical
transmission line 2-level VSC, 2-level VSC, monopol
MMC
CDC = 25 F CDC = 1 F CDC = 1 F
conv. GIL- conv. GIL- conv. GIL- conv. GIL-
term. OHL term. OHL term. OHL term. OHL
without arresters 1,15 3,8 16,1 3,8
OHL
limited by arresters 2,1 2,1 2,1
without arresters 1,15 4,0 3,8 4,0 5,2 5,2 3,8 4,0
OHL/GIL
limited by arresters 2,1 2,1 2,1 1,9 2,0 2,1 2,1
Due to the large DC capacitance which is applied in two-level VSC converter technology, the fast front
overvoltage entering the converter station is strongly damped. If a smaller DC capacitance is applied,
the overvoltage will distinctly increase, necessitating the use to limit it. The largest overvoltages occur,
when MMC technology is applied. For example, the overvoltage at the GIL-OHL interface is shown in
Figure 3.6-4. These overvoltages have to be limited by arresters at the converter terminal and the GIL-
OHL interface. For a sufficient overvoltage protection an adequate arrester rating is required.
30
Without
DC Spannungen arrester
GIL1/ OHL1, î = 18 kA With arrester
DC Spannungen GIL1/ OHL1, î = 18 kA
12 2.5
+ Pol o. A. + Pol m. A.
10
10
- Pol o. A.
22 2,0 - Pol m. A.
1.5
[pu]
8
[pu]
Spannung / p.u.
Spannung / p.u.
11
66
overvoltage
5,2
overvoltage
0.5
4
00
22
-0.5
0
-1-1
-2-2 -1.5
2.2999 2.3 2.3001 2.3002 2.2999 2.3 2.3001 2.3002
0 10 Zeit / s 20 [s] 30 0 10 Zeit / s 20 [s] 30
Figure 3.6-4: Fast front overvoltage at the GIL-OHL interface in case of MMC technology [1]
31
C. Neumann, A. Wasserrab, G. Balzer, B. Rusek, S. Steevens, K. Kleinekorte “Aspects of
insulation coordination for DC links using hybrid lines”, CIGRE-119, 2016 CIGRE-IEC
Colloquium, May 9-11, 2016, Montréal, QC, Canada.
V. Hinrichsen,”Metal-Oxide Surge Arresters in High-Voltage Power Systems, Fundamentals”
Siemens 3rd edition, 2011, www.siemens.com/energy/arrester
Siemens Technical data sheet, 3ES5 300-5DK81-0AA1.
CIGRE Joint Working Group B2/B4/C1.17,”Impacts of HVDC Lines on the Economics of HVDC
Projects”, CIGRE Technical Brochure 388, August 2009.
CIGRE Working Group C4.407, “Lightning Parameters for Engineering Applications”, CIGRE
Technical Brochure 549, August 2013.
32
4. Basic phenomena and insulation properties at

DC voltage and overvoltage stresses
In order to understand gas-solid insulation systems under DC voltage stress, several physical
phenomena at DC voltage must be taken into account, which are different from AC insulation systems.
Directly after energisation with DC voltage, a capacitive field distribution is formed depending on the
capacitances and the material permittivity, as in case of AC systems. However, over time the field
transits into a resistive field distribution, determined by the conductivity of the insulating materials along
with other influencing factors. This transition is accompanied by charge accumulation at the surface and
within the bulk volume of the solid insulation; the duration is mainly governed by the insulator geometry
and material properties.
This chapter summarizes the state of the art of today’s knowledge about the physical effects and its
impact on gas-insulated HVDC systems. Such knowledge is of high importance to develop appropriate
testing strategies for gas-solid insulation systems operated under DC voltage.
Section 4.1: This section summarizes the basic phenomena from a microscopic view in order to
understand the processes at DC field application and the field transition from capacitive
to resistive field distribution. Parts of this subsection are adapted from [2][3][4].
Section 4.2: This part gives an overview about the impact of material parameters, physical effects
and service conditions on the insulating properties of gas-insulated HVDC systems and
summarises investigations on the relevant influencing factors. Within the last years,
several effects concerning e.g. temperature- and field-strength-dependent material
conductivity, space charges, electron emission and the influence of gas humidity have
been investigated and determined.
Section 4.3: The knowledge from sections 4.1 and 4.2 is important to achieve a reliable
computational model for the determination of the electric field distribution in gas-
insulated HVDC systems for different operating conditions. Section 4.3 summarizes
state-of-the-art simulation tools and models as well as the experimental verification of
simulations.
33
Basic phenomena at DC voltage stress and field transition

Figure 4.1-1 shows a typical gas-solid insulation system of a HVDC GIS or GIL. Generally, the electric
field distribution of such a system is influenced by several parameters, such as non-linear material
properties dependent on temperature, electric field strength, humidity and additional charges. The
relevant physical phenomena can be categorized as:
 phenomena changing the net density of free electric charge (mainly in the gas volume): ionisation,
attachment, recombination, field emission, partial discharges
 charge transport phenomena: drift, diffusion, electric conduction, charge accumulation
 thermal phenomena: Joule heating at the inner conductor, heat conduction, radiation and
convection.
Figure 4.1-1: Physical mechanisms in DC gas-solid insulation systems [1].
Figure 4.1-1 shows an example of the mixed insulation typical for DC gas-insulated systems, including
gaseous as well as polymeric insulation, together with a metallic conductor at high-voltage potential
and an earthed enclosure. Therefore, the electric field spans an insulation volume comprising gaseous
and solid domains with metal-gas, gas-polymer, and polymer-metal interfaces. Applying DC voltage to
the insulation causes charge accumulation at the insulator surface and in the insulator bulk, as a result
of the movement of free charges and the displacement of bound charges. The charge accumulation
(charge density and polarity) is dependent on the relation of charge transport / charge generation in
the gas and in the polymeric bulk volume. In contrast to bound charges, which are usually modelled
with isotropic permittivities, the generation and transport of free charge carriers can show a highly
anisotropic distribution. Nevertheless, at low DC fields, solid materials are usually modelled as having a
homogeneous volume and surface conductivity.
One of the main challenge facing the implementation of gas-insulated DC equipment is the need to
control the surface charging of solid-gas interfaces to prevent field enhancements in cases of voltage
polarity reversals or transient overvoltages [5][6][7]. The main processes that cause conduction
currents through the insulation, which is the main source of surface charge accumulation, can be
categorized into two groups:
- Processes that are dominant in low electric fields that are far below those that initiate the onset
of charge injection and charge multiplication at interfaces (ohmic conduction / subcritical
regime)
- Processes that are dominant in high electric fields that are sufficient to activate micro-discharges
at local field enhancements (additional charge carrier generation, partial critical regime).
34
Figure 4.1-2 gives a schematic overview of these ion current regimes.
Ohmic
conduction
regime
(subcritical
regime)
Additional charge
Saturated ion
carrier generation
current
(partial critical
regime)
Figure 4.1-2: Ion current regimes as a function of the applied voltage
The changes in the surface charge Qsurface, excluding the contribution of polarisation within the first
hours of measurement, might be a result of conduction currents originating from the solid insulation
Isolid, ion-currents through the gaseous domain Igas, or surface currents flowing along the interface Isurface.
By defining the direction of volume currents from the gaseous to the solid domain, changes in the
surface charges can be described as
𝑑𝑄surface
= 𝐼gas − 𝐼solid− 𝐼surface (4–1)
𝑑𝑡
4.1.1 Conduction through solid insulation and along insulator surfaces

In general, the capacity of an insulating medium to conduct a current if subjected to an electric field
can be expressed as the product of charge carrier density and the mobility of charge carriers. In gas-
insulated equipment, aluminum oxide (Al 2O3) filled epoxy resins are commonly used as material for
barrier or support insulators. A number of studies have analysed the volume and surface conductivities
of such epoxy types as functions of temperature, the electric field strength, and humidity
[8][9][10][11][12]; more details are given in section 4.2.3 of this brochure. Their measurements
suggest that, for temperatures less than and greater than the glass transition temperature, the volume
conductivity increases by approximately one to two decades per 40 K, respectively [8][9][10][11][12],
in accordance with the properties of other polymers [13]. Therefore, an inhomogeneous temperature
distribution is expected to strongly influence the insulation characteristic of gas-insulated DC equipment,
as described in section 4.2.4. Moreover, some authors have observed the presence of an ohmic
conduction regime in electric fields of up to 3 kV/mm, followed by characteristics that may pertain to
space-charge-limited currents [8][9][12]. In contrast, other authors have observed an ohmic conduction
regime in fields of up to 20 kV/mm [10][11].
The non-linear surface conductivity of the insulator surfaces has been characterized by some authors
as the main parameter determining the surface charge accumulation of untreated small-scale GIS-
spacers [14][15]. The results of other studies indicate that a distinct surface property can be measured
only under high levels of humidity [8][9]. This property’s influence on surface conductivity was
characterized to be particularly significant at humidity levels greater than 20% RH at 40 °C and
atmospheric pressure. This environment is unlikely to be exhibited in gas-insulated equipment under
operation [16]. Sandblasting the insulator surface to change the interface’s roughness has also been
suggested to strongly influence the surface conductivity and its dependency on humidity [9]. In recent
studies, a smoothening of the surface charge accumulation under DC voltage was achieved by Cr 2O3-
coating of insulator surfaces [17].
35
4.1.2 Surface charge accumulation from charge generation and transport in

the gaseous insulation
A detailed understanding of the low-field charge generation and transport in gaseous insulation forms
the basis for modelling numerous problems in high-voltage engineering. Some examples for processes,
relevant for the dimensioning of gas-insulated HVDC equipment are surface-charging phenomena at
insulator surfaces, the prediction of initiatory electron provisions for partial discharges in small voids
[18], and the estimation of statistical time lags for breakdown inception in gaseous insulation
[19][20][21]. Here, the intensity and continuity of the low-field charge provision strongly influence the
operating condition of the equipment and, owing to their impact on the mean energy input from the
discharges [22], the long-term performance and ageing behaviour of the insulation.
4.1.2.1 Processes in the ohmic conduction regime (subcritical regime)

In low electric fields, the conduction current through the gaseous insulation is currently assumed to be
caused by ion pair (IP) generation arising from natural ionisation due to background terrestrial and
cosmic natural radiation [23]. According to the literature, muons, as a part of the secondary cosmic
radiation, are the main contributor [3][19], resulting in an overall IP generation of 6 to 18 IP/cm3∙s1∙bar1
in SF6 [1][19][21][24]. These rates were calculated from continuous ion current measurements using
coaxial electrode arrangements with dimensions typical of gas-insulated equipment or surface charging
experiments. For electric fields below 100 V/m, a linear increase of the ion current as a function of the
applied voltage was observed. An increase in the field increases the ion drift velocity and thus decreases
both the space charge density and ion-ion recombination until the latter becomes negligible and the
current becomes saturated. The saturated current can then be used directly to determine the ion pair
generation rates. More details and further results from recent studies are given in Appendix B of this
brochure.
4.1.2.2 Processes with additional charge carrier generation (partial critical regime)
According to the current understanding of charge generation and conduction, mainly the processes in
the insulation volumes are considered relevant to the dimensioning of gas-insulated devices
[10][24][25][32]. From the macroscopic perspective, the operating field strength is far below the
conditions required to cause charge multiplication by impact ionisation or field emission at the interfaces.
However, the ion current measurements conducted in the technical fields using rough metal electrodes
[8][31][33] or model spacers downscaled from gas-insulated equipment [4][29][35] indicated charge-
generation processes which cannot be explained by ion-pair generation from natural ionisation of gas.
Because of the lack of spatially resolved information and the resulting field-dependent characteristic,
the currents are mainly attributed to the charge generation from the electrodes and modelled using
homogeneous current sources [34]. More details and further results from recent studies are given in
Appendix B of this brochure.
4.1.3 Field transition and effects at gas-insulator interfaces

As stated in the previous sections, the behaviour of typical insulating systems for gas-insulated DC
equipment is determined by the properties of the insulating media and is significantly influenced by the
gas-solid interface. After energizing with DC, the electrostatic field is transformed into an electric flow
field due to displacement and motion of the charges. This capacitive-resistive field transition is
accompanied by the constitution of surface and space charges due to different current densities in the
dielectric materials. These charges are then again influencing the electric field strength [35] (Figure
4.1-6).
From the macroscopic point of view, the processes in the solid insulating material as well as in the
insulating gas can be described with electric conductivity values, dependent on electric field strength
and temperature especially in the case of solid insulating materials. In most cases, this conductivity
differs by several orders of magnitude for the solid insulating materials and the gas. Therefore, the
conductivity at the gas-solid interface of typical gas-insulated systems follows a step function.
Difference in current densities within the insulating materials causes an accumulation of charges at the
interface. These charges change the electric field due to an additional dielectric displacement field and
36
therefore act to decrease the difference of the current densities. The appropriate surface charge density
𝑑𝑄/𝑑𝐴 is resulting from the normal components 𝐷n of the displacement field 𝐷 ⃗ [36]:
𝑑𝑄
= 𝐷n gas − 𝐷n solid (4–2)
𝑑𝐴
For the charging of insulating surfaces, the literature describes three principle mechanisms
[37][38][39][40][41]. The particular dominance of one effect is causing different charging:
 Volume conductivity in the solid material
 Surface conductivity along the solid surface
 Gas conductivity due to ion drift in the gas
Independent of which process is dominating, the applied electric field causes a force on existing charge
carriers and moves them along the field lines. If the field lines will intersect the interfaces, the charges
accumulate depending on the prevailing mechanism.
Dependent on the properties of the applied insulating material, one of these mechanisms dominates
the formation of the electric field distribution and the charge accumulation.
Figure 4.1-3 gives an example, how the electric field is influenced by the ratio of the insulating materials’
volume conductivity to the gas conductivity [44]. For a simplified conical insulator in a gas-insulated
coaxial electrode arrangement with a defined ion-pair generation rate, two different values of the
insulator’s volume conductivity values were assumed (in reference [44] related to two temperatures).
For a high volume conductivity of 1.47∙10-17 S/cm (
Figure 4.1-3 d), the electric field distribution as well as the surface charge accumulation are dominated
by the insulator’s volume conductivity. The charge accumulation correlates with the normal component
of the electric field strength. For a lower volume conductivity of 8.8∙10 21 S/cm (
Figure 4.1-3 c), the electric field and surface charge distribution are dominated by charge transport
through the gas volume.
(a) (b) (c) (d)
Figure 4.1-3: Simulated electric field lines in the initial capacitive and stationary resistive state for
different volume conductivity of the insulating material [44];
(a): Applied geometry; (b): capacitive state; (c): resistive state, 8.8 x 10 -21 S/cm (T =243 K) (d):
resistive state, 1.47 x 10-17 S/cm (T =333 K); U = -500 kV; εrI = 5; EP1; σS = 0; ∂nIP/∂t =
30 IP/(cm3/s); b+= b-= 0.048 cm2/(Vs); kr = 1.74×10-7 cm3/s.
Also the duration of the capacitive-resistive field transition is strongly influenced by the conductivity of
the insulating materials, which is dependent on electric field strength and temperature. Figure 4.1-4
gives an example of how the time to reach at least 90 % of the stationary DC field at each location of
the insulator surface is influenced by the temperature (i.e. by the conductivity) [44].
37
Figure 4.1-4: Simulated time t90% along interface 1 of a conical insulator

for different temperatures T [44]
Due to the low volume and surface conductivity of typical solid insulators in gas-insulated systems, the
accumulation of charges on the surface of insulators can be dominated by the generation of charge
carriers in the gas [38][40][41][43]. The free charges generated in the gas by natural radiation move
along the field lines and accumulate on the insulator surface when the field strength in the solid
insulating material and the relevant conductivity are not sufficient to support their unimpaired continued
movement.
Field emissions at microscopic roughness or partial discharges at macroscopic defects generate
additional charge carriers that move along the field lines to the interface and accumulate. If the volume
and surface conductivity of the insulator can be neglected in this area in comparison to the conductivity
of the gas, the state of complete charging will be reached when the normal component of the electric
field on the insulator surface disappears (Figure 4.1-5). In this specific case, no field line intersects with
the interface anymore [37][41][44]. However, the time of accumulation is reduced significantly, in
comparison to discharge free electrode arrangements with weakly inhomogeneous field distribution
[44][75][77].
Figure 4.1-5: Field lines depending on the interface charging due to discharges at the tips: initial
state before charging, during the charging, completely charged [37]
The accumulation of the charge carriers at either side of the interface influences the electric field in the
whole insulation system and thus also influences the behaviour of the charge carriers in the insulating
material on the opposite side. At the same time, the dielectric surface enhances the provision of starting
electrons in comparison to a pure gas gap. Hence, the discharge development is initiated earlier.
Furthermore, the sensitivity of the insulation system to inhomogeneities is increased [24][49].
The following processes at the gas-solid interface and their interactions and reactions have to be
distinguished (Figure 4.1-6).
38
Figure 4.1-6: Processes at the gas-solid interface and their interactions:  Field transition, 
Electrostatic accumulation,  Electron capture at lattice defects,  Collisional ionisation at the
surface,  Photoemission at the surface [35][50].
Charge carriers are displaced due to the field transition within the solid insulation . Ions from the gas
accumulate at charged surface regions according to the normal component of the electric field and due
to electrostatic attraction . In addition, an accumulation of free electrons at the sites of lattice defects
on the insulator surface is possible . The charge accumulation is both accelerating the field transition
and changing the electric field. Thus, the insulation strength can be increased, but in the most critical
case, it can also be decreased, with the result that the reliable operation of the system can be affected
significantly [35][50].
If discharges occur at the interface, further processes have to be considered: Electrons can be emitted
due to the collision of positive ions with the surface . Additionally, photons emitted from previous
collisions can in turn result further electrons being emitted out of the dielectric surface due to
photoemission . Vice versa, emitted electrons can initiate further photoemission processes.
According to these processes, the dielectric surface is not only changing the provision of starting
electrons, but also the discharge development after its inception, since processes of emission,
attachment and ionisation are intensified [49][52].
Insulating properties of typical gas-solid insulation systems and

influencing factors
The basics of the relevant electric phenomena are given in section 4.1. The effects are of significant
impact on the insulating properties of real-size gas-insulated HVDC systems. To calculate the electric
field distribution of gas-solid insulating systems and to simulate the field transition, knowledge about
insulating material properties and further influencing factors is essential. This section 4.2 gives an
update to CIGRE TB 506, summarising general information and investigation results from recent years.
Information about material conductivity, space charge accumulation, electron emission, and the
influence of gas moisture is given.
4.2.1 Insulation characteristics in the gas gap at DC stress

An understanding of basic breakdown characteristics at DC voltages, particularly as obtained by tests
carried out on practical electrode systems, is essential to study dielectric testing of gas-insulated HVDC
systems. In this section, the practical characteristics of basic flashovers at DC voltages, comparison of
breakdown voltages (BDV) between DC and AC voltage applications, area effect of electrode and the
effect of a dielectric coating on HV conductors are described.
(1) Basic breakdown characteristics at DC

Figure 4.2-1 shows the gas pressure dependence of the breakdown electric field strength of coaxial
cylinder electrodes at DC voltage in SF6 gas [53]. The breakdown electric field strength increases with
increasing gas pressure. The breakdown characteristics exhibit a polarity dependence, that is, negative
breakdown electric field is lower than the positive one, although positive breakdown electric field is as
high as the theoretical one. The difference becomes larger as gas pressure increases.
39
Figure 4.2-1: Gas pressure dependence of breakdown electric field strength of coaxial cylinder
electrodes at DC voltage in SF6 [53]
(2) Comparison with the breakdown properties at AC voltage

Negative DC breakdown electric field strength is always lower than that at AC voltage at the AC peak
value, as shown in Figure 4.2-2. It shows another experimental result of breakdown voltages versus
gap length by using a sphere-sphere electrode system (sphere diameter of 150 mm). The decrease of
the DC breakdown strength compared to that at AC voltage is more pronounced at increasing gas
pressures and gap length. This decrease of the breakdown strength is considered to be caused by field
emissions from micro protrusions on a cathode and/or tiny metallic particles on the cathode.
Figure 4.2-2: Comparison of breakdown voltages between negative DC and AC voltage applications
(Figure based on [54][55])
(3) Area effect of electrode

An area effect of electrode is observed at DC voltage as well as at AC and lightning impulse voltages,
and these characteristics are quite important for DC gas-insulated system again. Figure 4.2-3 shows the
area effect for fine and rough finished electrode systems. The DC breakdown electric field strength for
the electrode area larger than 104 cm 2 is only about 40 % of the theoretical value in fine-finish
electrodes and about 30 % in industrially rough-finish electrodes at 0.4 MPa near the practical gas
pressure of GIS.
40
Figure 4.2-3: Area effect of electrode for fine (left) and rough (right) finished electrode arrange-
ment; relation between electric breakdown field strength (EBD) and its theoretical value [53]
(4) Effect of a dielectric coating on HV conductors

Dielectric coating on electrodes suppresses the field emission and mitigates local electric field
intensification at the tips of micro protrusions on the electrode surface. Figure 4.2-4 shows the effect
of dielectric coating on electrodes to improve breakdown properties at DC voltage. In this experiment,
the electrode arrangement consisted of 150 mm parallel plane electrodes, and the dielectric coating
material is an epoxy [53].
Figure 4.2-4: Effect of dielectric coating on electrode to improve breakdown properties at DC

voltage. Electrode arrangement: 150 mm parallel plane electrodes, Dielectric coating: epoxy [53]
The performance of the dielectric coating is sufficient to suppress field emission from the cathode,
although the thin coating is not sufficient to mitigate the electric field enhancement at microscopic
scales. Therefore, applying even a thin coating to the cathode electrode markedly increases the
breakdown voltage. The coating for the positive electrode does not suppress the field emission from
the cathode, thus the positive sparkover voltage values are similar to those of the bare electrodes.
41
4.2.2 Insulation characteristics of insulators at DC and overvoltage stresses

Surface charge accumulation at the gas-solid interface as well as space charges within insulating
materials influence the electric field distribution and subsequently the insulation performance of the
insulation system. Depending on the specific conditions, the flashover voltage of charged insulators may
be reduced, compared to uncharged conditions.
Figure 4.2-5 shows the results of investigations on the breakdown electric field strength of gas-insulator
interfaces at switching impulse voltage, with and without charged conditions [56]. For this test, epoxy
material samples (Figure 4.2-5 (a)) were stressed with DC voltage and surface charge measurements
were performed. Based on calculations, the flashover voltage values were estimated and compared with
test results, as shown in Figure 4.2-5 (b).
(a) Test sample (dimensions in mm) (b) Test results
Figure 4.2-5: Influence of accumulated surface charges on the flashover electric field strength of
epoxy insulator samples, dependent on the SF6 gas pressure [56]
Under these conditions, both the flashover voltage and the flashover electric field strength respectively
of the uncharged field conditions was markedly reduced, due to the influence of accumulated surface
charges. The test result values tended to be slightly higher than those expected from the electric field
calculations.
Further test results on the influence of field transition and surface charging after DC voltage application
on the flashover performance of an epoxy support insulator can be found in Figure 4.3-8.
Based on the results given in Figure 4.2-5, the influence of the surface charge density on the flashover
voltage was determined, and is shown in Figure 4.2-6.
42
Figure 4.2-6: Relation between charge density and flashover voltage of epoxy insulator samples at
switching impulse voltage [56]
Similar results were found for lightning impulse voltage, as given in [57]. Insulator samples, as shown
in Figure 4.2-7 (a), were pre-stressed with DC voltage for 30 minutes, and tested with superimposed
lightning impulse voltage.
(a) Test sample (b) Test results
Figure 4.2-7: Influence of DC (pre-)stress on the flashover voltage of epoxy insulator samples at
lightning impulse voltage [57]
For bipolar combinations of DC and impulse voltage, the breakdown voltage decreased up to 30%
compared to pure lightning impulse voltage without DC pre-stress (Figure 4.2-7 (b)). For unipolar
superimposed voltage, no significant decrease of the flashover voltage was identified. The test results
43
were found to be in agreement with the surface charge distribution, derived from electric field
simulations as well as charge measurements.
Due to the potential strong impact of surface charges on the insulation performance of gas-solid
insulation systems at DC stress, this effect should be considered for the design of insulators, based on
computational simulation (section 4.3), as well as for the definition of appropriate testing requirements
for gas-insulated DC systems.
4.2.3 Typical properties of insulating materials at DC stress

4.2.3.1 Volume and surface conductivity
When a voltage is applied to an insulating material, a transient current can be measured. The principal
transient current is shown in Figure 4.2-8 [66]. Just following the voltage application, this transient
current decreases rapidly and asymptotically approaches the stationary current. The type of insulating
material (polymer type, with or without filler, type of filler) influences the time to reach the asymptotic
value (Ic), corresponding to the conduction current used to evaluate the conductivity of the material.
Ipol
IC
Idep
Figure 4.2-8: Principal nature of polarisation and depolarisation current [66]
Different regimes of the current/voltage curve of Figure 4.2-8 can be distinguished:
Phase 1: The transient phase of the polarisation current (Ipol) is the sum of the absorption and
the conduction current. Phenomena like dipole orientation, reorganisation of space
charge, interfacial polarisation under the influence of an electric field contribute to the
polarisation current. The time constant  of the current decreasing can be estimated as
=∙ where  and  are the resistivity and the permittivity of the material respectively.
Phase 2: The stationary current (Ic) corresponds to the conduction current that depends on the
conductivity of the material.
Phase 3: A depolarisation current (Idep), inverse to the polarisation current and with the same
time constant, can be measured when the voltage applied on the insulating material is
switched off.
For real size insulators and rated current and voltage the transient current may look different as shown
in Figure 4.2-8. For high field stresses and temperatures, a significant charge injection at the electrodes
may occur. The resulting current is generated by the polarisation current of phase 1 and the charge
injection current, which may become much larger than the polarisation current in phase 1. Literature
[67] shows examples for the resulting polarisation current at such practical arrangements.
44
A general formula describing the current density 𝐽, when a step of voltage is applied on an insulating
material is
𝜕𝑛(𝑥, 𝑡) 𝜕𝐸 𝜕𝑃
𝐽(𝑡) = q ∙ 𝑛(𝑥, 𝑡) ∙ 𝜇(𝐸, 𝑡) ∙ 𝐸(𝑥, 𝑡) − q ∙ 𝐷 ∙ + 𝜀0 ∙ +
𝜕𝑥 𝜕𝑡 𝜕𝑡
(4–3)
with:
(1) Current due to the motion of charges under an electric field E (conduction current)
(2) Current due to the motion of charges by the action of their gradient of concentration
(diffusion current)
(3) Displacement current due to the variation of the electric field
(4) Polarisation current
and
q = 1.6 x 10-19 C charge of an electron
n - density of the charge carriers
µ - mobility of the charge carriers
E - local electric field
D - diffusion coefficient of the material
The last two terms (3) and (4) correspond to a transient current decaying to zero with a certain time
constant. Paper [59] explains the relation governing the current density in an insulating material as a
function of the electric field.
Two types of polarisation currents can be distinguished:

Fast polarisation including:
 Electronic polarisation (Figure 4.2-9a): Corresponds to the displacement of the barycenter of
the negative charges (electrons) and positive charges (nucleon). The associated transient
current has a very short time constant in the order of some femto-seconds.
 Ionic polarisation (Figure 4.2-9b): The electric field causes a displacement of the ions of the
molecule. The time constant of the polarisation current is in the range of some pico-seconds.
 Dipolar polarisation (Figure 4.2-9c): This current is created by the orientation of the dipolar
molecules in the electric field. The associated time constant is in the range of nanoseconds up
to microseconds.
Slow polarisation including:

 Interfacial polarisation (Figure 4.2-9d): In non-homogeneous insulating material some charges
will appear at the heterogeneous interfaces due to the influence of the electric field. The time
constant of this phenomenon is relatively long due to the low mobility of the charge carriers in
the insulating material and is above the millisecond range up to hours.
 Space charge polarisation: With no electric field present, an insulating material is characterized
by an electrically neutral steady state. When a voltage is applied, free charge carriers will move
to the electrode of opposite polarity. The time constant is higher than the interfacial polarisation
in the range of hours, even months.
45
a) b)
d)
c)
Figure 4.2-9: Different types of polarisation effects [68]
4.2.3.2 Measurement techniques of volume and surface conductivity

Insulating materials are characterized by two different types of conductivity: surface and volume
conductivity. IEC 62631-3-1 and IEC 62631-3-2 [58] describe a direct method to measure those
parameters. Special care must be taken when making these measurements. Guard electrodes are
necessary to intercept the stray currents and to limit the bias error. The interface between the sample
and the measuring electrodes can also influence the results (surface treatment of both faces of the
sample by deposition of a conductive layer is recommended to ensure a good galvanic contact). Figure
4.2-10 presents the test setup proposed by the relevant IEC standard for both types of measurement.
The leakage current is measured and the corresponding conductivity of material can thus be calculated.
Figure 4.2-10: Conductivity measurement: volume resistivity (left) and surface resistivity (right)
This measurement principle has some accuracy limitations when carried out on high-resistive insulating
materials and at higher electric fields. Depending on the ambient conditions and the microscopic shape
of the electrodes, partial discharges can be initiated, resulting in additional currents and thus leading to
conductivity values, which are too high.
With the standardised method, the accuracy obtained on the surface conductivity measurement is
achievable if the conductivity of the gas is low compared to that of the insulating material under test
[60]: It involves controlling the quality of the gas in order to decrease its moisture content and to avoid
any partial discharges between the measuring and guard electrodes.
In order to overcome this issue, a modified technique for the measurement of the surface conductivity
is proposed in paper [60]. It is an indirect method and the surface conductivity is calculated from the
difference between the total current and the current in the volume and in the gas.
Figure 4.2-11 presents typical values of surface conductivity versus the electric field strength measured
in both configurations. In dry condition and at low electrical field strength the values are nearly identical.
A difference is observable for field strengths higher than 3 kV/mm; over and above such values the
contribution of the currents through the gas current could be predominant.
46
Figure 4.2-11: Comparison of surface conductivity measured in both configurations and

similar conditions (0.6 MPa SF6, dry) [60]
A further method to determine surface and volume conductivity is given in [61]. With this method the
conductivity of very high-resistivity materials can be determined. A material sample is precharged by
corona from a DC voltage in a needle-plate arrangement (Figure 4.2-12 left) at different temperatures.
Figure 4.2-12: Setup for surface and volume conductivity determination,

based on surface potential measurement [61]: corona charging (left), surface potential distribution
measurement (right)
Afterwards the decay of surface potential is measured by an electrostatic voltmeter over the entire
surface of the sample (Figure 4.2-12 right). Examples from measurement results are given in Figure
4.2-13.
Figure 4.2-13: Measured surface potential distribution on epoxy samples [61]

(1) initial condition (2) after 180 min (3) after 660 min
Based on this measurement technique, the influence of charge neutralisation by gas ions was taken into
account and the volume conductivity as well as the surface conductivity were calculated. In a further
work [62], this method was applied to determine the conductivity of high-insulating epoxy materials, as
a function of temperature. For such materials with conductivities below 10-16 S/m, the volume
47
conductivity can hardly be determined by measurements according to IEC 62631. Table 4.2-1 gives a
summary of measurement results.
Table 4.2-1: Comparison of volume resistivity values determined by different measurement

techniques [62]
4.2.3.3 Influencing factors

Electric field dependence
The conductivity is calculated from the measurement of the current as mentioned in Figure 4.2-14
presented in paper [66]. Generally, volume and surface conductivity of insulating material depend on
electric field strength and temperature.
Figure 4.2-14: Volume current/voltage characteristics represented in ln(J)=f (ln(E)) for epoxy
with J – current density and E – electric field strength [66]
As illustrated in Figure 4.2-14 one can identify two regimes in the current/field strength curves for the
volume current. For the low electric field E the slope of the curve is equal to 1 indicating that the
conductivity is constant, indicating an ohmic behaviour due to the intrinsic carriers. Then, for higher
value of E, a new regime with a slope equal or greater than 2 prevails, which is characteristic of a space
charge limited current regime. In this regime the injected charge carriers are more important than the
intrinsic ones. The transition point between the two regimes depends on the temperature. From 20 °C
to 105 °C it varies from 9 kV/mm to 4.5 kV/mm respectively.
48
Temperature dependence
The electric conductivity 𝜎 for insulating materials in the range of temperatures 𝑇 of technical interest
is often expressed with the Arrhenius law according to equation (4–4)
−𝑊a
𝜎 = 𝜎0 e 𝑘B𝑇 (4–4)
S
𝜎0 : electric conductivity at T = 0 K in
m
𝑊a : activating energy in eV
eV
𝑘B : Boltzmann-constant in
K
Different papers present results related to the dependence of conductivity versus temperature. In [65],
for example, at room temperature the steady state current corresponding to the conduction current Ic
is reached after more than 6 hours and the temperature dependence follows the Arrhenius law (equation
(4–4)). Between room temperature and the maximum operating temperature of 105 °C the conductivity
varies over 3 decades as shown in Figure 4.2-15. The same results are reported in papers [60][66][70],
although the magnitude of the conductivity between two extreme temperatures can change according
to the type and the concentration of the filler materials used in the insulator.
1.E-13
100 C
Volume Conductivity [S/m]
1.E-14
80 C
1.E-15
60 C
1.E-16 40 C
20 C
1.E-17
0 5000 10000 15000 20000 25000
Voltage [V]
Figure 4.2-15: Variation of the volume conductivity according to temperature [60][64]
Moisture
Epoxy based insulating materials can absorb a certain quantity of water until the equilibrium is reached
between the environment and the material. The absorption kenetic is governed by Fick’s diffusion law
and depends on the diffusion coefficient as explained in [69].
The measurement of volume conductivity for different water contents shows an increase of the
conductivity when the humidity increases [63]. For very high level of moisture absorbed by the insulating
material (76% of the maximum water content absorbed at 99% relative humidity the resistivity can be
lower by more than 7 decades compared to dry conditions [69]. This difference is only one decade when
a dry sample is compared to one with a water content of 0.2% as presented in [65] and shown in Figure
4.2-16. Similar effects are expected for the surface conductivity, see also section 4.2.3.2.
49
Figure 4.2-16: Volume resistivity versus temperature at 1 kV under dry and humid (water
content=0.2 %) conditions [65]
Since any modification of the conductivity results in a modified field distribution, controlling the moisture
content of insulating materials in DC insulation systems is an important item. Special care regarding the
storage conditioning and the use of desiccant is highly recommended.
Typical conductivity values of insulating materials

The value of volume and surface conductivity of insulating material can vary in a wide range according
to the following parameters.
 Raw material
o Type of resin and additives
o Nature and quantity of fillers
 Ambient and stress conditions

o Electric field
o Temperature
o Moisture content
 Measurement system employed

o Risk of field emission in high voltage measurements
o Quality of the surface of contact with the measuring electrode
o Time to reach the steady state conduction current
Since manufacturers use specific material formulations for the production of GIS/GIL insulators, and the
formulation as well as the material parameters of the products are proprietary information, it is difficult
to give specific reference values. Nevertheless, it is possible to give some general observations.
Volume conductivity:
Typical volume conductivity values for common insulating materials based on filled cast epoxy resins
are in the range 10-16 to 10-18 S/m, for 20 °C at <1 kV/mm, as e.g. given in [62][66][71].
o The variation of the volume conductivity versus electric field strength in the range of
1 kV/mm to 10 kV/mm is of the order of one decade
o The variation of the volume conductivity versus temperature in the range of 20 °C to
80 °C is of the order of 2 decades
Surface conductivity:
Typical surface conductivity values for common insulating materials based on filled cast epoxy resins
are in the range 10-16 to 10-19 S, for 20 °C at <1 kV/mm, as e.g. given in [60][70].
50
o The surface conductivity versus an electric field in the range of 1 kV/mm to 8 kV/mm
is quite stable if all possible care is taken to minimize the effect of conduction in the
gas at the surface of the material.
For most typical cases, the volume conductivity is of higher impact on the charging effects of insulators
under DC voltage application than the surface conductivity. In case of insulator coatings, the surface
conductivity is of high relevance.
4.2.3.4 Space charges

If polymeric materials are exposed to an electric field, space charge accumulation can occur, especially
at DC voltage. Charges, originating from the polymeric material itself or injected from electrodes, can
accumulate in the insulating material and thus influence the electric field distribution in and around the
insulator.
Space charge accumulation is dependent on numerous parameters, such as:
 insulating material type and specific composition
 surface treatment
 electrode arrangement, electrode material and surface roughness
 electric field strength
 voltage polarity
 temperature and temperature gradient
 time
Therefore, it is of interest to know about the specific space charge properties of the applied materials
as well as the application conditions; potentially, these need to be considered in the design and testing
of HVDC insulators. In most typical cases of epoxy-based insulators, surface charge accumulation is of
higher relevance for the electric field distribution of insulators rather than space charge accumulation.
An overview of measurement techniques and measurement results of typical, epoxy-based insulating
materials is presented in Appendix E.
4.2.4 Further influencing factors of typical gas-solid insulation systems

Further influencing factors can be of high relevance for the electric field distribution under DC stress,
especially at gas-solid interfaces, as well as the dielectric performance of gas-insulated DC systems.
As major influencing factors, this section deals with the influence of
 Surface roughness of conductors
 Gas moisture
 Temperature and temperature gradient.
4.2.4.1 Surface roughness of conductors

As given in section 4.1, the surface roughness is of high importance for charge injection into the gaseous
insulation. Dependent on the design, additional charges can accumulate at gas-solid interfaces and thus
exert strong influence on the electric field distribution. Based on literature [72], the electron emission
is dependent on the surface roughness, as shown in Figure 4.2-17.
51
Figure 4.2-17: Current measurement due to electron emission for different electrode roughness
dependent on the electric field strength. Electrode (A): Ra = 0.57 µm; Electrode (B): Ra = 1.2 µm;
Electrode (C): Ra = 2.2 µm (SF6, 0.6 MPa, 20 °C) [72]
Technical surfaces of typical gas-insulated systems can be of higher roughness, compared to the
measurements given in Figure 4.2-17, amplifying the potential influence of electron emission.
4.2.4.2 Gas moisture

Gas moisture and potential condensation both can have important influence on the dielectric
performance of gas-insulated HVDC systems [63][73][75]. At higher relative gas humidity, an increased
current density in the gas was observed (Figure 4.2-18). It was assumed that this effect is based on
water adsorbed on the electrodes, leading to an enhanced charge injection from the electrode surface.
Figure 4.2-18: Influence of electric field strength and gas humidity in SF6 on current density [73]
Calc. moisture content: 39 ppmV (RH=1%); 78 ppmV (RH=2%); 780 ppmV (RH=20%)
52
With more field lines reaching the gas-solid interface, the accumulation of charges is locally increased.
Since the charges cannot be drained off by the solid material that quickly, this effect will potentially
result in a modified electric field distribution at the gas-solid interface, as shown in Figure 4.2-19.
Figure 4.2-19: Normalized DC field distribution; normalized to max. electric field in case (a) [74]
(a) in case of natural ionisation (b) at 703 ppmV (c) and 1100 ppmV
In specific investigations [63] a significant influence of humidity on the intensity of micro-discharges at

the interfaces was observed. With increasing humidity, micro-discharges were found to appear in shorter
time intervals and the total charge generation increased considerably.
Further investigations are reported in [75], based on practical conditions of a real-size gas-insulated
system for 500 kV DC application, including insulators. The insulation system was tested at ambient
temperatures of -30 °C and +50 °C, partly installed in a climatic test chamber, as shown in Figure
4.2-20. Due to the low material conductivity at -30 °C, the charging duration of the insulators would be
in the range of month and thus not suitable for the conduction of practical experiments. For these test
cases, an apparatus was applied to charge the insulator surface by means of partial discharges (PD)
issuing from a sharp tip of a needle.
Figure 4.2-20: Test set-up (sketch and photo), partly installed in a climatic test chamber [75]
Simultaneous dielectric stress was applied with voltages up to the rated test voltage values (±825 kV
DC, ±1550 kV LI). To prove the influence of increased gas moisture on the withstand voltages, the
moisture content in the gas was varied over the range of 800 ppmV up to 1590 ppmV, corresponding to
dew points of -23 °C to -15 °C (at atmospheric pressure and +20 °C). This moisture content is higher
than typically allowed for gas-insulated systems. Under stable temperature conditions, no distinct
reduction of the dielectric performance was found for this specific design. Further tests were performed
during temperature cycles (with high temperature gradient in the climatic test chamber), as shown in
Figure 4.2-21.
53
Figure 4.2-21: Measurement of temperature and gas pressure during temperature cycles [75]
For dry conditions (116 ppmV, dew point -41 °C @ 0.1 MPa), no distinct reduction of the dielectric
performance was found. More details are given in section 4.2.4.3. With increased moisture in the gas
(850 ppmV, dew point -22 °C @ 0.1 MPa), a high impact on the breakdown strength was found. At DC
voltage, an increase of the test generator’s DC current as well as DC voltage drops and flashovers at
the gas-insulator interface were observed, and flashovers occurred in the gas at DC and also when
lightning impulse voltage was applied. These effects were typically observed during temperature
increase from -30 °C to +50 °C. The authors concluded that this effect was based on evaporation of
frozen water inside the gas compartments (which changed temperature first), into the gas and to the
gas-insulator interface. After some hours, when more homogeneous temperature and moisture
conditions were reached, the dielectric performance recovered and no further breakdown occurred.
As it is common for gas-insulated AC systems, the application of drying agents is a suitable measure to
overcome this problem. Under these conditions, no reduction of the dielectric performance was found.
4.2.4.3 Temperature and temperature gradient

Typical gas-insulated systems are designed for a large ambient temperature range, e.g. from -30 °C up
to +50 °C. During service of a GIS or GIL the current, flowing through the inner conductor, is heating
the conductor and its surroundings. According to the standards for AC GIS (IEC 62271-1/-203), the
temperature of the inner conductor can reach up to 115 °C, depending on material and position. As the
GIS or GIL enclosure remains much cooler, there is a temperature difference between the inner
conductor and the enclosure during service conditions, with a typical value of 20 K [64]. This
temperature difference causes a temperature gradient in the insulators, incorporated in the gas-
insulated system.
Both parameters, temperature and temperature gradient, are of influence on the electric field
distribution and its evolution over time. As given in section 4.2.2, the conductivity of typical cast resin
epoxy material is strongly dependent on the temperature. E.g. from 20 °C to 100 °C, the conductivity
changes approximately by a factor between 100 to 1000. Therefore, the temperature of insulators
influences the duration of electrical charging, as the material conductivity is enhanced or reduced. An
example is given in Figure 4.2-22.
54
1.2
Ambient Temperature 40°C
1 99 %
95 %
90 %
0.8
DC field [%]
0.6
outer top
0.4 outer side
outer bottom
0.2 inner bottom
0
0 5 10 15 20 25 30
time [d]
Figure 4.2-22: Transition time for an insulator, depending on the location and ambient temperature
[76]
Furthermore, at an ambient temperature of e.g. -30 °C the solid material has a significantly lower
conductivity compared to typical high-voltage test conditions for gas-insulated DC systems (+20 °C up
to +40 °C). Thus, it is expected that gas conductivity, electron emission and generation of further
charges from imperfections have a higher impact on the charge accumulation at gas-solid interfaces as
well as in the bulk of insulators, due to reduced possibility of discharging through the bulk of the
insulator. To prove, whether this is of significant influence on the dielectric performance of a gas-
insulated DC system, high-voltage tests were performed with industrial full-size insulators at -30 °C and
with temperature cycles [75]. Due to the extremely slow charging effects at low temperatures, a device
was applied to accelerate the local charging of the insulator surface by partial discharges produced by
a needle tipped protrusion. However, no significant impact on the insulation performance of the
insulation system under test was found, particularly under DC and lightning impulse voltage stress under
the given test conditions. More details about the tests can be found in section 4.2.4.2 and in [75].
The temperature gradient across the insulator is of strong influence on the electric field distribution,
due to the uneven conductivity distribution within the insulator. An example of this field inversion is
shown in Figure 4.2-23. Without a temperature gradient (Figure 4.2-23, left), the highest field strength
occurs in the vicinity of the inner conductor. As soon as a temperature gradient occurs, when the
temperature close to the inner conductor is exceeding the temperature of the enclosure, the location of
the highest field strength is shifted along the insulator surface towards the enclosure (Figure 4.2-23,
right). As this effect can strongly affect the dielectric performance of gas-insulated DC systems, special
tests are required to prove the reliability of the systems under in-service conditions (see sections 6.1
and 7.4.7). Further examples are given in chapter 4.3.2.
Figure 4.2-23: Electric field distribution of an insulator at DC voltage without (left) and with (right)
a temperature gradient between conductor and enclosure [75]
55
Computational simulation and its verification

4.3.1 Computational simulation of electric fields and multiphysics
simulations
When DC voltage is applied to a gas-solid insulation system, the field distribution changes from the
initial capacitive field distribution to the stationary resistive field distribution, which goes along with
surface and space charge accumulation. Several researchers have developed computational models to
calculate the field distribution during the capacitive-resistive transition, which varies from days to weeks,
depending on the solid and gaseous insulating material, the insulator geometry and the temperature on
the inner and outer conductor. Such knowledge of electric field distribution is necessary to develop the
appropriate test strategies for the gas-solid insulation systems under DC voltage stress, e.g. to
determine the duration until the resistive field transition is completed. This section gives an overview
about current simulation tools. Application examples to verify the simulated electric field distribution are
given in the next section.
To calculate the electric field distribution of a gas-solid insulation system during the capacitive-resistive
field transition and the resistive stationary state, several physical parameters of the involved insulating
media need to be known:
 Electric properties of the insulating materials (see also section 4.2.2)

o Volume conductivity
o Surface conductivity
o Dependence on electric field strength, temperature and humidity
 Electric properties of the insulating gas (see also 4.2.1)

o Volume conductivity, dependent on electric field strength or simplified assumed to be
constant; mainly influenced by the ion-pair generation rate (terrestrial and cosmic
radiation)
Common simulation tools are based on the Finite Element Method (FEM). In most cases, the simulations
are working with models for the insulator including its surface and models for the gas; the latter based
on specialized gas models or assuming a constant gas volume conductivity. Using multiphysics
simulation tools, the simulation of the electric field and charge distribution can be linked with the
temperature distribution and the temperature- and field-dependent material properties. Electron
emission and further charge sources can be implemented with the Fowler-Nordheim equation.
Further information on recent simulation models is given in the literature, e.g. [18], [44], [81]. [81]
reports about influencing factors on the electric field simulation, such as temperature-dependent volume
and surface conductivity, electric field dependent conductivity, polarisation and dark current. As the
influence of these factors on the electric field simulation results strongly depends on the specific
conditions, realistic and worst-case parameters have to be estimated individually.
4.3.2 Verification of simulations

The computational simulation gives important information on the electric field distribution and time
duration of charging effects, which is based on knowledge available today regarding the physical
processes in gas-insulated DC systems and the large number of accompanying influencing parameters.
In any case, it is of high importance to ensure that the simulation results are in good agreement with
the real conditions.
In this section, examples for two different approaches are described:
 verification based on experimental models

 verification based on insulators to be applied in gas-insulated DC systems
56
In principle, both methods are suitable to verify the simulations results. Especially in the case of model
experiments, the transferability of the measurement results to real-sized insulators and typical in-service
conditions have to be ensured by proper choice of the test conditions, e.g. voltage level, gas moisture
content and epoxy material.
4.3.2.1 Verification by model experiments
Verifications of simulations are reported in the literature based on different principles. In some cases,
the surface potential at insulators was measured in experiments and compared with simulation results.
Other sources report about the determination of flashover voltages at initial and charged condition, to
be compared with calculated electric field strength values.
Figure 4.3-1 shows the setup for surface potential measurements on a cylindrical support insulator [44].
The surface potential of an insulator, made of an Al2O3-filled epoxy resin based material, was measured
with an electrostatic voltmeter, applying the Kelvin probe principle, at 15 kV DC for one year. The
measurements were performed in dry air of atmospheric pressure.
Figure 4.3-1: Test setup for surface potential measurements on a cylindrical insulator at 15 kV DC in
dry air [44]
In addition, the charging process was reproduced by electric field simulation. To determine the exact
physical effects during the charging phase, a specialized gas model was developed and applied for
simulation.
A comparison between simulation and measurement results can be found in Figure 4.3-2. Simulation
and measurement show a good agreement. Due to the very low conductivity of the epoxy material
under test, a very long charging time was found in the simulation as well as in the measurement.
Figure 4.3-2: Simulation and measurement results of surface potential of a cylindrical insulator in
dry air at 20 °C after DC voltage application for duration t [44]
U = 15 kV; εrI = 5; ∂nIP/∂t = 7 IP/(cm3 s); σVI = 3.33×10-21 S/cm; σS = 1×10-20 S
Left: Simulation (S) and measurement (M; influence of probe corrected)
Right: Surface potential at different points
57
A further verification using model arrangements is described in [45]. The material parameters and
geometry of the experimental setup as well as the temperature distribution along the gas-solid interfaces
are shown in Figure 4.3-3. See [46] for additional information on the experimental setup and
measurement procedure used.
3
Figure 4.3-3: Top left: Experimental geometry 1E-16
and capacitive electric field distribution
kP(T) (10-7 A/m2)

(normalized), field lines (black continuous 2
(T) (S/m)
lines) across the epoxy-gas boundary (red

line). EP: epoxy cylinder. 1E-17
Top right: Temperature measured along the 1
epoxy-gas interface for (1) constant tempe-
rature and (2) temperature-gradient case.
Bottom right: Epoxy (alumina-filled) material
1E-18 0
parameters for temperature-dependent 30 40 50 60 70 80
conductivity and slow polarisation. In Temperature (°C)
accordance to [45] Determination of
parameters: see [47].
To measure the surface potential of the epoxy-gas interface, the applied DC voltage (-10 kV) was first
switched off, the HV electrode grounded and the epoxy sample was lowered down to a level where the
sensor could scan its surface. Then the sensor on its horizontal scanning axis was moved to the
specimen and the surface of the sample was passed along the sensor by moving rotational and vertical
motor systems. After this, the epoxy sample was raised up again, reconnected with the HV electrode,
and the DC voltage was switched on again. As the system was grounded during the surface charge
measurements, the measured surface potential originates from space and surface charges trapped in
and on the epoxy sample.
The background-subtracted measured surface potential distributions for the constant temperature case
(25 °C) and the temperature gradient case are shown in Figure 4.3-4:
 For the constant temperature case, during the initial time (t < 24 h), the model predicts that
slow polarisation in the solid and gas conduction counteract each other, resulting in low values
of the surface potential and alternating minima and maxima in the profile (see potential curves
at t = 24 h). In contrast, at the end of the measurement period (188 h), a clear minimum
develops at z = 20 mm, followed by a maximum at z = 100 mm. The position and polarity of
the extrema in the surface potential curve clearly indicate that charging from the gas side
dominates at low (25 °C), constant temperature: Negative ions from the gas accumulate on the
surface near the ground electrode, while positive ions drift toward the negative HV electrode.
Surface charging from the epoxy side would result in the opposite polarities (see Figure 4.3-5c).
 For the temperature gradient case and the time span measured, most of the space charge is
concentrated near the hot electrode (see inset in Figure 4.3-4, right, a), and determines the
positive polarity of the surface potential measured at positions z < 64 mm. For z > 64 mm, as
58
space charge accumulation on the cold HV electrode is negligible, positive surface charge
dominates, similarly to the constant temperature case.
Figure 4.3-4: Comparison between (a) simulated and (b) measured surface potential along the
epoxy-gas interface. 𝝆̇ 𝑰𝑷 = 40 IP/cm3/s, other parameters as given in Figure 4.3-3.
Left: constant temperature (25 °C) case;
Right: temperature gradient case; inset: space charge distribution after 117 h. [45]
In Figure 4.3-5, the various contributions to the surface potential are shown cumulatively. “RC” stands
for contribution from 𝜎(𝑇) and instant polarisation 𝜀∞ , “POL” for the slow polarisation, and “IP” for the
gaseous ionic conduction.
24 117h, Measurement
22
(a) (b)
1h, Measurement 400 117h, RC
20 1h, RC 117h, RC+IP
18 1h, RC+IP 117h, RC+IP+POL
Surface Potential (V)
16 1h, RC+IP+POL 300

14
12
10
200
8
6
4
100
2
0
-2
-4 0
-6
0 20 40 60 80 100 120 0 20 40 60 80 100 120
z Position (mm) z Position (mm)
100
Figure 4.3-5: Comparison of effects. (a), (b): 80
(c)
case with temperature gradient for 1 h,
respectively 117 h high voltage application. (c) 60
constant temperature case for 188 h high 40
voltage application [45] 20
-20
Parameters for simulation: RC: Only
temperature-dependent conductivity 𝝈(𝑻) and -40 188h, Measurement
permittivity, low background constant -60
188h, RC
188h, RC+POL
conductivity of the gas; POL: including slow -80 188h, RC+POL+IP
polarisation; IP: including gas ion source 𝝆̇ 𝐈𝐏 = 0 20 40 60 80 100 120
40 IP/cm3/s. Position (mm)
With a temperature gradient after 1 h (Figure 4.3-5a), the contribution from the slow polarisation term
dominates. At later times (see curves (b) at 117 h), the potential profile is clearly dominated by the
strongly temperature-dependent conductivity of the solid. In contrast to the previous case, the main
59
contribution at constant temperature and 188 h voltage application is the gaseous ionic conduction,
while the RC term is comparatively low (Figure 4.3-5c).
The development of the simulated and measured surface potentials are compared (Figure 4.3-6). For
the constant temperature case, the minima (around z = 20 mm) and maxima (around z = 100 mm) of
the surface potential curve are used (Figure 4.3-6a).
150 Measurement
Measured Max
(a) -Measured Min
Modeling (RC+IP+POL)
100 Max 29 IP/cm3/s
-Min 29 IP/cm3/s
Max 40 IP/cm3/s
-Min 40 IP/cm3/s
50 Max 50 IP/cm3/s
-Min 50 IP/cm3/s
(b)
600
Measurement
Max Surface Potential
400
Modeled Max (RC+IP+POL)
Max 40 IP/cm3/s
200
0
103 104 105 106 107
time (s)
Figure 4.3-6: Development of the surface potential (lines: model, symbols: measurement) [45]
(a) Constant temperature case (25°C): Minimum and maximum (absolute) values for
various gas ionisation rates.
(b) Temperature gradient case: Maximum value for IP=40 IP/cm3/s.
As the main contribution to the potential in this case is the gaseous ionic contribution, the measured
potential is compared with simulated potentials using various ion pair generation rates 𝜌̇ IP . Using the
value of 29 IP/cm3/s, as determined by direct current measurement [48], leads to a slight
underestimation of the min/max potential development. Applying an effective ion generation rate of 𝜌̇ IP
= 40-50 IP/cm3/s in the model results in closer agreement with the measured development. For both
cases, the predicted steady-state has a maximum of ~700 V, or 7% of the applied voltage. Of
particularly high relevance for tests and designs is the time needed to reach a steady-state surface
potential distribution (and hence an equilibrium field distribution): Here this is reached after about
1 month in the presence of a temperature gradient, respectively 3 months at constant temperature.
A further verification procedure is given in [35][50][79]. After proper experimental calibration of the DC
simulation model at nominal field values, its applicability was tested at near-breakdown conditions. For
this purpose, a test was set up to determine the flashover voltage of cylindrical epoxy specimens
subjected to a thermal gradient at 0.1 MPa SF6 pressure. Performing voltage rising tests (VRT), the
dielectric strength under electrostatic field conditions was examined to compare with AC stress
conditions. The tests were executed in cold condition without a temperature gradient and in warm
condition with the temperature distribution seen in Figure 4.3-7 (right). The breakdown strength is
about 15 % lower in warm than in cold condition, due to the lower gas density observed in the local
vicinity of the heated electrode [35][50][83]. The corresponding breakdown voltage 𝑉bd,VRT,warm is used
for scaling the flashover voltages 𝑉bd,DC after long-term stress with 𝑉DC for (6, 48, 92) hours. For suitable
DC pre-stress times, the experiments were carried out at a voltage 𝑉DC of 45% of the breakdown voltage
of the AC-like voltage rising test. Under cold conditions, the conductivity of epoxy is low and the time
of the field transition is on the order of weeks. Hence, no decrease of the breakdown voltage occurred
after 48 h or 92 h (see Figure 4.3-8).
Under warm conditions, all long-term tests show a decrease of the breakdown voltage in comparison to
the values of the voltage rising test and show the effects of the capacitive-resistive transition. After
48 h, the insulation strength is on average about 10% lower than in the voltage rising tests. Due to the
60
E / EAC max E / EAC max E / EAC max

z z z
1 1,3 2,6
HV HV 80
HV
70
60
50
Insulator
Insulator
Insulator
40
SF6 0,5 SF6 0,65 SF6 1,3
30
20
10
0
GND GND GND

0 0 0
r r r
(b) AC stationary DC after 48 h DC after 12 days
Figure 4.3-7: Equilibrium temperature distribution (left) and calculation of capacitive-resistive

transition after DC energizing at voltage VDC with temperature distribution neglecting charge
multiplication (right) [35][79]
temperature-dependent conductivity of the insulator material, the highest field strength is increasing
and its location is shifted to the cooler part of the insulator into the gap near the high voltage electrode
[35][50][79].
The simulation of the capacitive-resistive field transition reproduces the temperature cycle of the
experimental test (see Figure 4.3-8, right): Using i) Curie-von Schweidler approach to simulate the
polarisation processes, and ii) the independently measured DC conductivity in the epoxy, the electric
field is calculated for a DC voltage application of various pre-stress durations. Subsequently, a fast
voltage rise is implemented in the FEM tool, until reaching the breakdown field strength on the HV
electrode. Considering conduction in the gas, simulation was carried out for residual homogenous
conductivity of 10-21 S/m in the whole gas volume (calculation 1) and with additional field-dependent
injection current on the insulator interface subjected to high field next to the HV electrode (for further
details see [79]). Comparing the calculated values with the measurements (Figure 4.3-8), agreement is
found for both cases for times of DC stress up to 100 h. For longer times, calculation 1 predicts that
flashover should happen after twelve days under pure DC stress at 𝑉DC . However, two experiments have
been carried out at 𝑉DC for 14 days, respectively 27 days without breakdown. Voltage rising tests (VRT)
subsequently applied, showed a moderate reduction in the minimum flashover breakdown strength of
0.8 ∙ 𝑉bd,VRT,warm . This behaviour can be explained according to calculation 2 by the presence of low
injection ionic currents from the neighbouring HV electrode. The magnitude of these currents is
comparable to those reported in [35][79].
1.2
1.0
V, ϑ ϑ = 100 °C
Vbd,DC/Vbd,VRT, warm
Vbd,DC
0.8 VDC
Field transition
calculation 1, no charge in gas
calculation 2, charge emission in gas
0.6 cold, negative polarity t
cold, positive polarity Heating DC long-term VRT
warm, negative polarity 10 h e.g. 48 h few sec.
warm, positive polarity
0.4
0.01 0.1 1 10 100 1000
Duration DC stress [h]
61
Figure 4.3-8 Left: Symbols: experimental flashover voltage Vbd,DC as a function of the DC
stress duration with voltage VDC. Lines: calculation 1: simulation for no-charge emission
from gas (solid conduction only, low homogeneous gas conductivity (10-21 S/m)).
Calculation 2: including additional charge injection on insulator surface (see text). Right:
Test execution to investigate time-dependence of flashover voltage during field
transition to resistive state. VRT: voltage rising test [35][79]
Paper [78] reports about further surface charge density measurements on a model insulator, as shown
in Figure 4.3-9. Surface charge saturation was found after approximately 2000 hours. The uneven
distribution of the surface charges was assumed to be based on microscopic imperfections of the test
samples and microscopic particles, influencing the charging process.
Figure 4.3-9: Measurement of surface charge accumulation under ambient temperature [78]
a) model spacer (SiO2-filled epoxy)
b) Time variations of surface charge on a sloping surface; V = +60 kV; water content 5 - 25 ppmv;
SF6 0.5 MPa-abs
In a further experiment, a comparison was made between a constant temperature of 20 °C and a

temperature gradient of 25 K across the insulator (20 °C / 45 °C). As shown in Figure 4.3-10, the
temperature value and the temperature gradient were of major influence on the surface charge
distribution as well as the charging duration.
Figure 4.3-10: Measurement of surface charge accumulation on a sloping surface; V = +30 kV;
water content was not controlled; SF6 0.1 MPa-abs [78]
a) constant temperature 20°C
b) temperature gradient (HV: 45°C, GND: 20°C) under ambient temperature
4.3.2.2 Verification based on insulators to be applied in gas-insulated DC systems

Surface potential measurements are reported in [79]. Here, a miniature electrostatic field chopper probe
was used. The positioning system for the probe allowed scanning of two insulator surfaces within a
320 kV DC gas-insulated system (see Figure 4.3-11). DC insulators operating under 0.45 MPa SF6 at
62
relative humidity RH ≤ 8% were tested. Measurements were performed at full load current, resulting in
an average temperature gradient of 25 K across the insulation.
Figure 4.3-11: Test set-up for the long-term measurement of surface potential on
insulator-gas interfaces [79]. System nominal voltage: UDC = 350 kV DC. Max. load
current = 4.6 kA.
Left: Potential of non-contact electrostatic probe: 0 < Uprobe < 350 kV DC.
Right: Angle-adjustable surface potential probe for surface scanning of DC insulators and
projection of insulator and measured azimuthal angle 𝝋 (𝝋 = 0°: vertical upward
direction).
To speed up the transition to DC state, the minimum enclosure temperature was increased to 50 °C.
After reaching the thermal equilibrium, a voltage of UDC = 100 kV is applied on the central conductor
and the surface potential of the gas-insulator interface is measured periodically at various azimuthal
angles 𝜑 and radii 𝑟 until steady state is reached.
63
Figure 4.3-12: Measurement and modelling of surface potential change ∆U as a function of time
and azimuthal angle at an average radius of 120 mm on an alumina-filled epoxy partition insulator
according to [79]. Initial values of the potential are distributed on the y-axis for better readability.
Natural ionisation rate 𝝆̇ 𝑰𝑷 = 50 IP/cm3/s, Epoxy DC conductivity 𝝈(𝑻, 𝑬) from independent
(de)polarisation experiments
Figure 4.3-12 shows the temporal evolution of the measured and simulated surface potential change at
an average radius r = 120 mm. For simulation of the potential development over time, DC conductivity
values of the Al2O3-filled epoxy insulator material as function of temperature and field are determined
independently by polarisation experiments on plates and cast blocks. The timescale of the transition to
the resistive state (which depends solely on the conductivity of the solid insulation) is well-predicted by
the model. In the early stage (t < 300 h), in most cases the measured potential increases more rapidly
than predicted, which is to be expected as fast polarisation currents are neglected. The magnitude of
the change in surface potential ∆𝑈 is, however, controlled by charges in the gas: more charge
injection/multiplication reduce the final potential change. In this particular case, considering natural
ionisation only, the expected increase in surface potential would be ∆𝑈 =13 kV on the insulator surface,
corresponding to a steady-state injection current density 𝑗𝑔 = 0.35 pA/m2 into the insulator surface. In
contrast, the maximum experimentally observed ∆𝑈(𝜑 = −30°) = 8 kV, corresponding to an additional
injection current 𝑗𝐼𝑃
−
≅ 10 pA/m2 from the metallic enclosure, corresponding to 𝑗𝑔 = 2.2 pA/m2 onto the
insulator surface.
Paper [80] reports about surface potential measurements at both sides of a conical barrier insulator
with an electrostatic voltmeter. As surface charges on both sides of the insulator and the measuring
probe may influence the measurement results, both sides were measured, as shown in Figure 4.3-13.
64
Figure 4.3-13: Influence of the surface charges on the potential measurement by sensors in case of
a conical insulator in a GIS [80]
The test setup is shown in Figure 4.3-14. To perform measurements over the entire surface of the
insulator, the sensors can be positioned by gear mechanisms in the radial direction. For the
measurement in the circumferential direction, the insulator can be rotated.
-
Figure 4.3-14: Test setup for surface potential measurements on both sides of a conical barrier
insulator, including gear mechanisms for positioning of the potential sensors [80]
The surface potential on both sides of the insulator was measured after defined time intervals. As shown
in Figure 4.3-15, the measured potential values increased with time, as the charge carriers accumulate
at the insulator surfaces. After six days, the changes in the surface potential values were found to be
negligible. The last measurement was performed after eight days. Due to the assumed presence of
micro-tips and surface roughness, the surface potential was found to be unequal over the circumferential
direction [80].
Figure 4.3-15: Measured surface potential distribution at different times on convex and concave
side of a conical insulator in SF6 of 0.1 MPa at -80 kV [80]
Based on the measurement results, the surface charge density was calculated. Due to the interaction
of the charges and measurements at both sides, there was found to be no linear dependence of the
surface charge density on the surface potential on either side. The results are given in Figure 4.3-16.
65
Figure 4.3-16: Calculated charge density distribution from potential measurement at different times
on convex and concave side of a conical insulator in SF6 of 0.1 MPa at -80 kV [80]
Comparison of the measurements with simulation results showed good agreement with the surface
charge density values on the concave side, except near the edges, where, due to the measurement
technique and procedure, deviations were expected. Larger deviations were found for the convex side,
which was assumed to be caused by additional charge carriers generated in the gas volume or at the
electrodes [80].
Of major importance for the simulation verification is a good agreement between the calculated duration
for reaching 90% of the steady-state charging condition (tDC = 100 h) with the measurement results,
to be determined to be approximately four days [80].
Literature [82] reports about the investigation of further influencing factors, as given in Figure 4.3-17.
While the gas pressure and the voltage polarity were of minor impact on the charge density, a
proportional dependence between voltage and charge density was found, within the voltage range from
80 kV up to 240 kV together with the specific test setup and insulator conditions.
In the same voltage range the simulated duration to achieve 90% of the steady-state charging condition
does not show pronounced dependence on the voltage. The simulated values ( tDC = 30-90 h, dependent
on the assumed ion pair generation rate) corresponds to the measurement results ( tDC = 10-135 h,
dependent on the individual position with pronounced scatter at higher voltages) [82].
Figure 4.3-17: Influencing factors on charge density (calculated from potential measurements after
eight days of voltage application, Ring = radial position) [82]
gas pressure (left), voltage (center, at 0.53 MPa) and polarity (right) dependency
U = -80 kV; ∆T = 0 K; p = 0.1 MPa SF6
Further investigations [82] were done in a modified test setup, enabling measurements under the
condition of a current flow in the conductor (I = 2500 A), resulting in a temperature difference between
conductor and enclosure of approximately 15 K. A markedly higher surface potential was observed
(Figure 4.3-18), compared to the condition without temperature gradient (Figure 4.3-15, note different
scaling). The increased temperature values and distribution are assumed to intensify the influence of
space charges. Due to the uneven temperature distribution, the surface potential distribution is no
longer rotationally symmetric.
66
Figure 4.3-18: Measured surface potential distribution at different times on convex and concave
side of a conical insulator in SF6 of 0.53 MPa at -80 kV, I = 2500 A [82]
For further evaluation, the temperature distribution was measured and compared with simulation
results. The relevant temperature distribution was applied to a 3D simulation of the electric field as well
as the space and surface charge density distribution. The surface potential measurement sensor was
included in the simulation and the surface potential at the different positions was calculated. The
outcome was compared with the measurement results, as shown in Figure 4.3-19; a good agreement
between simulation and measurements was found.
Figure 4.3-19: Measured and simulated surface potential distribution at different radial and
rotational positions of a conical insulator in SF6 of 0.53 MPa at -80 kV, I = 2500 A [82]
Current loading of the conductor shortens the duration to achieve 90% of the steady-state charging
condition. For the example given above, the simulated duration to achieve 90% of the steady-state
charging condition (tDC = 15-50 h, dependent on the individual position) corresponds to the
measurement results (tDC = 23-50 h) [82].
67
[1] K. Juhre, B. Lutz, D. Imamovic, “Testing and long term performance of gas-insulated DC
compact switchgear”, CIGRE Science & Engineering, vol. 6, ISSN 1286-1146, Paris, 2016
[2] M. Tschentscher, C.M. Franck, "Conduction processes in gas-insulated HVDC equipment: from
saturated ion currents to micro-discharges", IEEE Transactions on Dielectrics and Electrical
Insulation, vol. 25, issue 4, p. 1167 - 1176
[3] M. Tschentscher, C.M. Franck, "A critical re-examination on conduction processes in gas-
insulated DC devices at low electric fields", IEEE Transactions on Dielectrics and Electrical
[4] M. Tschentscher, C.M. Franck, "Microscopic charge provision at interfaces of gas-insulated
(HVDC/HVAC) systems", IEEE Transactions on Dielectrics and Electrical Insulation, vol. 25, issue
4, p. 1186 - 1194
[5] H. Fujinani, T. Takuma, M. Yashima, T. Kawamoto, “Mechanism and effect of DC charge
accumulation on SF6 gas insulated spacers”, IEEE Trans. Power Delivery vol. 4, pp. 1765-1771,
1989.
[6] A. Bargigia, G. Mazza, A. Pigini, G. Rizzi, “Strength of typical GIS configurations with special
reference to composite and combined stresses”, Gaseous Dielectrics V, pp. 621-627, 1987.
[7] C. X. Wang, A. Wilson, M. W. Watts, “Surface flashover sustained by electrostatic surface
charge on epoxy resin insulator in SF6”, 6th Conf. Dielectric Materials, Measurements and
Applications, pp. 182-185, 1992.
[8] L. Zavattoni, "Conduction phenomena through gas and insulating solids in HVDC Gas Insulated
Substations, and consequences on electric field distribution", Ph.D. thesis, Université de
Grenoble, 2015.
[9] B. Lutz, “Einflussfaktoren auf die elektrische Feldverteilung in Isoliersystemen mit polymeren
Isolierstoffen bei Gleichspannungsbelastung” (in German), Ph.D. thesis, TU Munich, 2011.
[10] R. Gremaud, Z. Zhao, M. Baur, “Measurement of DC conduction in alumina-filled epoxy”,
International Conference on Dielectrics (ICD), 2016.
[11] C. Guillermin, P. Rain, S.W. Rowe, “Transient and steady-state currents in epoxy resin”, Journal
of Physics D: Applied Physics, 39 (3), pp. 515-524, 2006.
[12] H. Yahyaoui, P. Notingher, Y. Kieffel, A. Girodet, “Analysis of conduction mechanisms in
alumina-filled epoxy resin under dc field and temperature”, Conf. Electr. Insul. Dielectr.
Phenom., pp. 667-670, 2013.
[13] R. W. Warfield, M. C. Petree, “Properties of Crosslinked Polymers as Evidenced by Electrical
Resistivity Measurements”, Makromol. Chem. 58, pp. 139-159, 1962.
[14] H. Iwabuchi, T. Donen, S. Matsuoka, A. Kumada, K. Hidaka, Y. Hoshina, M. Takei, “Influence of
Surface-Conductivity Nonuniformity on Charge Accumulation of GIS Downsized Model Spacer
under DC Field Application”, Electr. Eng. Japan vol. 181, pp. 29-36, 2012.
[15] K. Nakanishi, A. Yoshioka, Y. Arahata, Y. Shibuya, “Surface Charging on Epoxy Spacer at DC
Stress in Compressed SF6 Gas”, IEEE Trans. Power Delivery vol. 102, pp. 3919-3927, 1983.
[16] M-C. Lessard, G. Larocque, S. Gendron, S. Laberge, Y. Lavoie, “A New Approach for Assessing
the Moisture Content in SF6-Insulated Equipment”, IEEE Electrical Insulation Conference, pp.
539-542, 2016.
[17] C. Y. Li, J. Hu, C. J. Lin, J. L. He, “The control mechanism of surface traps on surface charge
behavior in alumina-filled epoxy composites”, Journal of Physics D: Applied Physics, vol.49, pp.
445304, 2016.
[18] F. Gutfleisch, L. Niemeyer, “Measurement and Simulation of PD in Epoxy Voids”, IEEE Trans.
Dielectr. Electr. Insul. Vol. 2, pp. 729-743, 1995.
[19] J. Kindersberger, “The statistical time lag to discharge inception in SF6”, Ph.D. thesis, TU
München, 1986.
68
[20] M. Koch, M. Bujotzek, C. M. Franck, “Inception Level of Partial Discharges in SF6 Induced with
Short X-Ray Pulses”, Conf. on Electrical Insulation and Dielectric Phenomena, pp. 11-14, 2014.
[21] N. Wiegart, L. Niemeyer, F. Pinnekamp, W. Boeck, J. Kindersberger, R. Morrow, W. Zaengl, M.
Zwicky, I. Gallimberti and S.A. Boggs, “Inhomogeneous Field Breakdown in GIS: The Prediction
of Breakdown Probabilities and Voltages”, IEEE Trans. Power Del. Vol. 3, pp. 931-938, 1988.
[22] C. Beyer, H. Jenett, D. Klockow, “Influence of reactive SFx gases on electrode surfaces after
electrical discharges under SF6 atmosphere”, IEEE Trans. Dielectr. Electr. Insul. Vol. 7 No. 2,
pp. 234-240, 2000.
[23] C. Patrignani et al. (Particle Data Group), “The Review of Particle Physics 2017”, Chin. Phys. C.
40, 2017.
[24] U. Straumann, M. Schüller, C. M. Franck, “Theoretical Investigation of HVDC Disc Spacer
Charging in SF6 Gas Insulated Systems”, IEEE Trans. Dielect. Electr. Insul. vol. 19 No. 6, pp.
2040-2048, 2011.
[25] M. Tenzer, V. Hinrichsen, A. Winter, J. Kindersberger, D. Imanovic, “Compact Gas-Solid
Insulating Systems for High-Field-Stress in HVDC applications”, Cigré Study Committee B3 & D1
Colloquium Brisbane, paper No. 227, 2013.
[26] J. Kindersberger, C. Lederle, “Surface Charge Decay on Insulators in Air and Sulfurhexafluorid-
Part I: Simulation”, IEEE trans. vol. 15, München, 2008.
[27] J. E. Morgan, W. M. Nielsen, “Cosmic-Ray Shower Production and Absorption in Various
Materials”, Physical Review, Volume 50, 1936.
[28] R. E. Wootton, "Electric charge accumulation on HVDC insulators in compressed-SF6-insulated
transmission lines", IEEE International Symposium on Electrical Insulation, pp. 214-217, 1984.
[29] B. Zhang, Z. Qi, G. Zhang, “Charge accumulation patterns on spacer surface in HVDC gas-
insulated system: Dominant uniform charging and random charge speckles”, IEEE Trans.
Dielectr. Electr. Insul., Vol. 24, No. 2, pp. 1229-1238, 2017.
[30] N. Fujimoto, “Conduction Currents in Gas-lnsulated Switchgear for Low Level DC Stress”,
Gaseous Dielectrics V, pp. 513-519, 1987.
[31] R. Hanna, O. Lesaint, L. Zavattoni, “Dark Current Measurements in Humid SF6 at High Uniform
Electric Field”, Conf. Electr. Insul. Dielectr. Phenom. (CEIDP), pp. 19-22, 2016.
[32] E. Volpov, “Dielectric Strength Coordination and Generalized Spacer Design Rules for HVAC-DC
SF6 Gas Insulated Systems”, IEEE Trans. Dielectr. Electr. Insul. vol. 11, pp. 949–963, 2004.
[33] V. Teppati, Ph. Simka, “Ion Current Measurements in SF6 and Vacuum under High Voltage DC
Application”, 4th Int. Conf. on Electric Power Equipment (ICEPE-ST), paper No. 752812, 2017.
[34] L. Zavattoni, R. Hanna, O. Lesaint, O. Gallot-Lavallée, “Dark current measurements in humid
SF6: influence of electrode roughness, relative humidity and pressure”, Journal of Physics D:
Applied Physics 48, 2015.
[35] M. Hering, J. Speck, S. Grosmann, U. Riechert, "Field transition in gas-insulated HVDC systems",
IEEE Transactions on Dielectrics and Electrical Insulation, vol. 24, issue 3, p. 1608 - 1616
[36] A. Küchler, Hochspannungstechnik: Grundlagen - Technologie – Anwendungen, (in German)
Springer-Verlag, 2009.
[37] F. Messerer, “Gas-insulated substations (GIS) for HVDC, Ph.D. degree thesis, TU München,
Germany, 2001.
[38] A. Winter, J. Kindersberger, “Surface charge accumulation on insulating plates in SF6 and the
effect on DC and AC breakdown voltage of electrode arrangements,” IEEE Conf. Electr. Insul.
Dielectr. Phenomena (CEIDP), pp. 757-761, Cancun, Mexico, 2002.
[39] S. Okabe, “Phenomena and mechanism of electric charges on spacers in gas insulated
switchgears,” IEEE Trans. Dielectr. Electr. Insul., Vol. 14, No. 1, pp. 46-52, 2007.
[40] C. Lederle and J. Kindersberger, “Surface Charge Decay on Insulators in Air and
Sulfurhexafluorid,” IEEE Trans. Dielectr. Electr. Insul., Vol. 15, No.4, pp. 949-957, 2008.
69
[41] CIGRÉ Working Group D1.03, ”Gas insulated systems for HVDC: DC stress at DC and AC
systems,“ Technical Brochure No. 506, 2012.
[42] R. Gremaud, M. Bjelogrlic, M. Schneider, E. Logakis, C. Schlegel, S. Fursich A. Krivda, T.
Christen and U. Riechert, “Surface charge decay on HVDC insulators: temperature and field
effects,” IEEE Int’l Conf. Solid Dielectr. (ICSD), pp. 1056-1059, Bologna, 2013.
[43] B. Lutz, “Einflussfaktoren auf die elektrische Feldverteilung in Isoliersystemen mit polymeren
Isolierstoffen bei Gleichspannungsbelastung” (in German), Ph.D. degree thesis, TU München,
Germany, 2011.
[44] A. Winter and J. Kindersberger, “Transient field distribution in gas-solid insulation systems
under DC voltages,” IEEE Trans. Dielectr. Electr. Insul., Vol. 21, No. 1, pp. 116-128, 2014.
[45] R. Gremaud, M. Schueller, C.B. Doiron, C.B, U. Riechert, U. Straumann, C.M. Franck,
“Experimental validation of electric field modeling in DC gas-insulated system”, International SC
Meeting and Colloquium 2015 CIGRÉ SC D1, Rio de Janeiro, Brazil, September 13th-18th, 2015,
Proceedings, paper 21
[46] M. Schueller, "Role and impact of different charge sources on surface charge accumulation in
gas insulated HVDC systems," PhD, High Voltage Laboratory, ETHZ, Zürich, 2014 doi:
http://dx.doi.org/10.3929/ethz-a-010388684
[47] M. Hering, et al., "Flashover Behaviour of Insulators with Inhomogeneous Temperature
Distribution in Gas Insulated Systems under DC Voltage Stress," in International Conference on
High Voltage Engineering and Application, Poznan, Poland, 2014
[48] M. Schueller, et al., "Role of ion sources for spacer charging in SF6 gas insulated HVDC
Systems", IEEE Transactions on Dielectrics and Electrical Insulation, vol. 21, p. 352, 2014
[49] S. Tenbohlen, “Discharge Development over Insulator Surfaces in SF6 Influenced by a Needle
Protrusion,” Int’l. Sympos. High Voltage Eng. (ISH), Graz, pp. 2270/1-2270/4, 1995.
[50] M. Hering, “Flashover behaviour of gas-solid insulation systems under DC voltage stress (in
German)“, Ph.D. degree thesis, TU Dresden, Germany, 2016.
[51] C. M. Cooke, “Surface flashover of gas/solid interfaces,” in Gaseous Dielectrics III, New York:
Pergamon Press, 1982.
[52] R. Schurer, „Der Einfluß von Störstellen auf Stützeroberflächen auf die elektrische Festigkeit von
Isolieranordnungen in SF6-isolierten Anlagen“ (in German), Ph.D. degree thesis, Universität
Stuttgart, Germany, 1999.
[53] F. Endo, A. Giboulet, A. Girodet, H. Hama, M. Hanai, K. Juhre, J. Kindersberger, W.
Koltunowicz, H.-G. Kranz, S. Meijer, C. Neumann, S. Okabe, U. Riechert and U. Schichler, “Gas
insulated systems for HVDC: DC stress at DC and AC systems”, CIGRE Task Force D1.03.11
Technical Brochure, No. 506, 2012
[54] T. Nitta, “Electrical breakdown characteristics of sulfur hexafluoride”, PhD Thesis, Central
Research Laboratory, Mitsubishi Electric Corp., 1974 (in English)
[55] T. Nitta and Y. Shibuya, “Electrical breakdown of long gaps in sulfur hexafluoride", IEEE Trans.
PAS 70 TP 582-PWR, 1970
[56] H. Fujinami, T. Takuma, M. Yashima, T. Kawamoto, "Mechanism and effect of DC charge
accumulation on SF/sub 6/ gas insulated spacers", IEEE Transactions on Power Delivery, vol. 4,
issue 3, p. 1765 – 1772
[57] S. Okabe, T. Okada, S. Yasuda, T. Utsumi, F. Endo, K. Saitoh, “Effect of DC Pre-stress on
Dielectric Characteristics of an Insulator in SF6 Gas”, 12th ISH, Report 4-30, pp. 351-354, 2001
[58] IEC 62631 Ed1 2015-03: Dielectric and resistive properties of solid insulating materials
[59] M. Hering, J. Speck, S. Großmann, U. Riechert, “Field Transition in Gas-insulated HVDC
Systems”, IEEE Trans. Dielectr. Electr. Insul., Vol. 24, No. 3, June 2017, pp. 1608-1616
70
[60] L. Zavattoni, C-T. Vu, P. Vinson, A. Girodet, R. Hanna and O. Lesaint, “Recommendation for
surface conductivity characterization under high voltage direct cur-rent (HVDC)”. IN-SUCON
2017
[61] J. Kindersberger, C. Lederle, "Surface charge decay on insulators in air and sulfurhexafluorid -
part II: measurements", IEEE Transactions on Dielectrics and Electrical Insulation, vol. 15, issue
4, p. 949 – 95
[62] B. Lutz, J. Kindersberger, “Determination of volume resistivity of polymeric insulators by surface
charge decay”, Int’l. Sympos. High Voltage Eng. (ISH), Johannesburg, 2009
[63] M. Tschentscher, "Conduction and Interface Phenomena in Gas-Insulated DC Systems", Ph.D.
thesis, ETH Zurich, 2019.
[64] R. Gremaud, F. Molitor, C. Doiron, A. Krivad, T. Christen,U. Riechert, U. Straumann,
B. Kallstrand, K. Johansson, O. Hjortstam, “Solid Insulation in DC Gas-Insulated System”, CIGRE
D1-103, Paris, 2014
[65] L. Zavattoni, L. Lesaint, O. Gallot-Lavalée, J.L Reboud, “Influence of water content and
temperature on conduction and filed on an alumina/epoxy Insulator”, IEEE International
Conference on Solid Dielectrics (ICSD), 2013, p. 370-373
[66] H. Yahyaoui, P. Notingher, S. Agnel, Y. Kieffel, A. Girodet, “Analysis of Conduction Mechanisms
in Alumina Filled Epoxy Resin under dc Field and Temperature”. CEIDP, 2013
[67] P.Notingher, G. Teyssedre, “Performance of Materials used for HVDC Cables”, Tutorial T1,
European Seminar on materials for HVDC cables and accessories, 2013
[68] A. Kuechler, “High Voltage Engineering”, Springer Vieweg, 5th ed. 2018, ISBN 978-3-642-
11992-7
[69] B. Lutz, J. Kindersberger, “Influence of Absorbed Water on Volume Resistivity of Epoxy Resin
Insulators”, International Conference on Solid Dielectrics, Potsdam, July 4-9, 2010
[70] G. Ueta, S. Okabe, “Electric conductivity characteristics of FRP and epoxy insulator for GIS
under DC voltage”, IEEE Trans. Dielectr. Electr. Insul., Vol. 22, No. 4, august 2015, pp. 2320-
2328
[71] S. Okabe, G. Ueta, K. Nojima, "Resistance characteristics and electrification characteristics of
GIS epoxy insulators under DC voltage", IEEE Transactions on Dielectrics and Electrical
Insulation, vol. 21, issue 3, p. 1260 – 1267
[72] L. Zavattoni, R. Hanna, O. Lesaint, O. Gallot-Lavallee, “Dark current measurements in
pressurized SF6: Influence of relative humidity and temperature”, IEEE Conference on Electrical
Insulation and Dielectric Phenomena (CEIDP), pp. 23-26, Des Moines, 2014.
[73] R. Hanna, O. Lesaint, L. Zavattoni, “Dark current measurements in humid SF6 at high uniform
electric field”, IEEE Conference on Electrical Insulation and Dielectric Phenomena (CEIDP), pp.
19-22, Toronto, 2016.
[74] L. Zavattoni, C.-T. Vu, P. Vinson, A. Girodet, “Leakage current measurements in Direct Current
Gas Insulated Substations equipment”, IEEE International Conference on Dielectrics (ICD), vol.
2, pp. 860-863, Montpellier, 2016.
[75] K. Juhre, M. Hering: “Influence of extreme temperature conditions on the gas-solid insulating
system under DC voltage stress”, CIGRÉ Winnipeg 2017 Colloquium, paper D1-163, Wnnipeg /
Canada, 2017
[76] U. Riechert, R. Gremaud, M. Callavik, “Application options and electrical field studies as basis for
adequate testing of gas-insulated systems for HVDC”, CIGRÉ A3, B4 & D1 International
Colloquium, Winnipeg, MB Canada · September 30 – October 6, 2017
[77] M. Hering, J. Speck, K. Backhaus, S. Grossmann, U. Riechert, “Capacitive-resistive transition in
gas insulated DC systems under the influence of particles on the insulator surface”, 19th
International Symposium on High Voltage Engineering, Pilsen 2015.
[78] T. Yasuoka, Y. Abe, M. Shiiki, T. Karube,” Dielectric tests for 250 kV DC-GIS”, CIGRE-IEC
Conference on EHV and UHV (AC & DC). Hakodate 2019.
71
[79] R. Gremaud, C. Doiron, M. Baur, P. Simka, V. Teppati, B. Källstrand, K. Johansson, M. Hering, J.

Speck, S. Grossmann, U. Riechert, U: Straumann, “Solid-gas insulation in HVDC gas-insulated
system: Measurement, modeling and experimental validation for reliable operation”, Cigré
Science & Engineering, Volume N°7, February 2017, ISSN : 1286-1146, p. 133-142
[80] S. Zhao, J. Kindersberger, M. Hering, K. Juhre,”Measurement of surface potential at the gas-
solid interface for validating electric field simulations in gas-insulated DC systems”. Cigré-
Session, paper D1-102, Paris 2018.
[81] S. Zhao, J. Kindersberger, M. Hering, K. Juhre,”Influencing factors on field distribution of GIS
insulators under DC voltage”, VDE Conference High Voltage Technique, 12.-14.11.2018 in Berlin
[82] S. Zhao, "Elektrische Feldverteilung in gasisolierten Anlagen unter Gleichspannungsbelastung“
(in German), Ph.D. thesis, Technical University of Munich, 2020 (figures translated).
[83] M. Hering, J. Speck, S. Grossmann, U. Riechert, "Influence of gas temperature on the
breakdown voltage in gas-insulated systems", IEEE Transactions on Dielectrics and Electrical
72
5. Typical defects and their PD characteristic

Similarly to gas-insulated AC systems the following typical PD defects can be found in gas-insulated DC
systems: Mobile particles, protrusions on the HV conductor, particles laying on a spacer, displaced,
misaligned, or loose shields, and voids in solid insulating components. However, their DC PD
characteristics are different from those observed under AC conditions.
PD magnitude and PD behaviour of typical defects at DC voltage

Table 5.1-1 lists PD magnitudes of typical defects based on measurements in test cells, for a PD
detection threshold of 0.7 pC [1][2].
Table 5.1-1: PD magnitudes of typical defects based on measurements in test cells
Defect Minimum Average Maximum
Moving particle 0.7 pC 50 pC 100 pC

Protrusion at DC- 0.7 pC 1 pC 5 pC
Protrusion at DC+ 0.7 pC 5 pC 100 pC
Floating electrode 0.7 pC 50 pC 1000 pC
Void * 0.7 pC 5 pC 10 pC
Particle on insulation * 0.7 pC 5 pC 100 pC
* actually only few tests results available
PD Characteristics of typical defects at DC voltage

5.2.1 Moving particle
The most frequent PD defect in gas-insulated systems are moving particles. It is well known that the
particles can move around between the HV conductor and the enclosure. Different types of particle
motion can be observed at positive and negative DC voltage (Figure 5.2-1) [3].
Horizontal lying Lift-off Standing motion Bouncing motion
firefly
Horizontal lying Lift-off Standing motion Bouncing motion
Figure 5.2-1: Types of particle motion at positive and negative DC voltage [3]
Beside the basic behaviour of moving particles, such as standing and bouncing motion, further effects
can be observed [4].
73
Generally, particles are attracted towards high field areas caused by changes in the geometry. When a
particle remains on the same spot in the high field region, it cannot move into lower field areas, such
as a particle trap. It is like a barrier which the particle cannot pass. In such case the particle remains in
the same position steadily emitting discharges and thus impairing the insulation strength of the gas. It
also acts as a protrusion, which could cause a flashover, if a transient overvoltage occurs.
a) b)
Figure 5.2-2: Particles remaining at high field areas [4]

a) Particles remaining at a particle trap designed for AC voltage
b) Particles at standing motion on the edge of slot and remaining there
Figure 5.2-2a shows an example of an arrangement at positive DC voltage, in which particles remain at
the high-field edges of a typical AC particle trap at the enclosure. In contrast, at negative polarity
particles exhibit a standing motion at the bottom side of the conductor, as it can be seen in Figure
5.2-2b. Here, several particles remain on the upper side of the slot and cannot pass this virtual barrier.
In consequence, high partial discharge activity can be measured.
5.2.1.1 Fundamentals of particle motion
The forces acting on a particle consist of electrostatic force, gravitational force and viscous force. A
particle motion follows equation (5–1) [6].
𝑑²𝑟 𝑑𝑟
𝑚 −𝜂 + 𝑄𝐸⃗ + 𝑚𝑔 = 0 (5–1)
𝑑𝑡² 𝑑𝑡
m: particle mass
𝑟: particle position of the center of gravity
η: the viscous coefficient of SF6 gas
Q: particle charge
𝐸⃗ : applied field strength
𝑔: gravitational constant
When the lifting force 𝑞𝐸⃗ exceeds the gravitational force 𝑚𝑔, a particle levitates from the bottom of an
enclosure. Under DC voltage and when the particle charge does not change, a particle continues its
upward motion and finally collides with the high-voltage conductor because the electric field vector 𝐸⃗
always acts in only one direction. After charge exchange at the conductor, the particle moves back
towards the enclosure. Thus, a particle moves up-and-down violently between a high-voltage conductor
and the enclosure. When the inner conductor of the DC gas-insulated system is at negative potential,
partial discharges easily appear from a particle and change the amount and polarity of particle charge.
This causes the firefly phenomenon close to the negative electrode.
5.2.1.2 Lift-off field strength

With no voltage applied, particles are usually found laying on the bottom of the enclosure. When the
electrostatic force acting on a particle exceeds the gravitational force due to increasing voltages, the
particle lifts off and levitates. The electrostatic force Fe is expressed as the product of electric charge Q
and electric field strength E. The values of Q and Fe depend on the shape, material and diameter of the
particle. Especially in the case of a wire shaped particle, as the lift-off field strength is higher than the
levitation field strength, the particle always levitates immediately following after lift-off. When an
electrode is coated with insulating material, particles do not get an electric charge directly from the
74
electrode. According to experimental observation and measurements, partial discharges are the main
cause of particle electrification [6][7].
The entire gas-insulated system will vibrate mechanically due to circuit breaker or disconnecting switch
operation. These vibrations can impart an acceleration to a particle such that it often starts levitation at
field strengths lower than the value of EL obtained in a static condition. EL values decrease as
acceleration velocity increases (Figure 5.2-3) [8].
Figure 5.2-3: Dependence of levitation field strength on acceleration velocity of sheath

vibrations for particles [8]
5.2.1.3 Motion of particles after lift-off

After particle lift-off, particles move in different modes between or on the electrodes. The different
modes of particle motion were already described above in Figure 5.2-1. As soon as the particle has lifted
off, it crosses the gap. Subsequently, two different phenomena can be observed: either bouncing or the
so called ‘firefly’ phenomenon. The firefly phenomenon is typically observed near the inner conductor
when it is at negative polarity. Large partial discharges usually appear whenever the particle touches
either the outer enclosure or the inner conductor [5][9].
In the bouncing mode the charged particle is accelerated towards the HV electrode. Due to the elastic
impact caused at the electrodes and discharging/recharging, and then getting accelerated in the E-field,
an up-and-down movement of the particle between the electrodes occurs. This motion can be described
by a pseudo-resonance frequency. This phenomenon mostly occurs with heavier particles like spheres
at higher gas pressure. The firefly phenomenon mostly happens, if the particle is able to discharge
moving towards the opposite electrode. Firefly usually takes place at the negative electrode by a dancing
motion of the particle along the lengthwise direction of the electrode. This phenomenon is typical for
sharp-edged particles at lower gas pressure. The discharging process in the form of corona is taking
place in the field enhancement region formed by the sharp edges of the particle.
75
5.2.1.4 Particle bouncing

The pulse sequence of the signal caused by a bouncing particle is shown in Figure 5.2-4. PD magnitudes
in three different ranges with a nearly constant repetition rate can be seen.
Figure 5.2-4: Pulse sequence of bouncing particle in a test cell at ±35 kV [2][5]
a) Negative polarity b) Positive polarity
The particle motion can schematically be described by means of Figure 5.2-5 [5].
HV electrode
time
PD amplitude
Figure 5.2-5: Schematic presentation of the motion of a bouncing particle [5]
When the system is energized, a particle laying at the bottom of the enclosure is charged by the electric
field between enclosure and HV electrode (a). If the Coulomb force exceeds the particle’s weight, the
particle is accelerated towards the HV electrode (b). As soon as the surface field strength of the particle
exceeds the inception field strength, a discharge occurs between particle and electrode before the
particle gets in contact with the HV electrode. This discharge can be detected as a PD pulse (c). The
particle will be recharged (d) and a force of repulsion acts on the particle, which is now accelerated
towards the earthed enclosure. Due to the decreasing field strength the force, acting on the particle is
reduced (e, f), and a weaker discharge occurs when reaching the earthed enclosure (g). Touching the
earthed enclosure, the particle is recharged and the particle again moves back towards the HV electrode
as before, and the cycle typically repeats many times.
5.2.1.5 Firefly phenomena and the general motion

Firefly motion is typically characterized by a rapid, uniform oscillation motion of the particle(s) near one
electrode, accompanied by PD at the particle’s tip. Depending on the particle type, its mass and the
field strength of the arrangement, firefly motion of particles exhibits several distinct modes [9]:
 Vertical hopping and wobbling firefly with
o With small jumping amplitudes
o With large jumping amplitudes
 Levitating firefly
In wobbling firefly mode, typically a predominately elongated particle rotates around its center of mass
while also bouncing on the electrode. This mode is typically a quasi-stable state lasting for several
minutes with the particle lingering within a limited localized area.
76
In vertical hopping firefly mode, the particle movement follows the electric field lines while rotating
around its axis. This firefly mode can occur with both large and small jumping amplitudes. Typical for
this mode of motion are the bursts of PD pulses with a V-shaped envelope [9]. Figure 5.2-6 shows PD
pulse sequences in case of large and small jumping amplitudes.
a) large jumping amplitudes, UDC =-230 kV b) small jumping amplitudes, UDC=-310 kV
Figure 5.2-6: UHF-PD signal of a 4 mm wire-shaped particle during firefly motion [8]
At the bottom of the V-shaped envelope, the particle is in contact with the electrode, as no PD pulse is
to be seen Figure 5.2-6. In intervals with no PD pulses. the local field strength at the particle tip is not
sufficient to generate PD. PD does not happen when the distance between the particle and the electrode
is large enough, see Figure 5.2-7. In Figure 5.2-6b the time interval between the V-shaped envelope of
the burst sequence is much shorter which can be attributed to higher field strengths and/or sharp edged
particles.
A schematic description of the particle motion during firefly can be given by means of Figure 5.2-7 [5].
HV electrode
time
PD amplitude
Figure 5.2-7: Schematic presentation of the particle motion during firefly [5]
As soon as the lift-off field strength is reached, the particle stands up (Figure 5.2-7 (a)) and starts
moving towards the HV electrode due to the Coulomb forces acting on it (b). Local field enhancement
caused by the sharp edges of the particle exceed the critical field strength such that partial discharges
occur, which are detected as pulse sequences qbi. As the particle approaches the HV electrode, the field
at the edges of the particle progressively decreases, such that the number of PD pulses qci in the pulse
sequence (c) increases and their individual magnitude decreases. If the particle touches the HV
electrode, it acts like a protrusion on HV potential, causing a high number of PD pulses qdi at the opposite
end of the particle (d); thus a space charge region is created at the particle’s tip. This reduces the force
affecting the particle, leading to a circling movement of the particle at the HV electrode. If this
movement becomes unbalanced, the particle is repelled from the electrode. During this motion the
particle loses charges and the repulsive force is reduced, finally resulting in a change of direction (f).
Subsequently, the movement towards the HV electrode starts again (c).
77
Levitating firefly mode occurs, if the particle floats near to the electrode and no visible lifting motion
appears [9]. The pulse sequence presented in Figure 5.2-8 shows more or less uniform pulse intervals
and amplitudes indicating minor changes in the distance to the particle. The particle is assumed to move
slowly in parallel to the HV electrode. Since particles remain in this mode only for tens of milliseconds,
levitating firefly is not stable and mostly occurs in combination with other modes.
Figure 5.2-8: UHF-PD signal of a wire-shaped particle during levitating firefly motion,
UDC=-190 kV [9]
Figure 5.2-9 shows an example of firefly behaviour in terms of the relation between the electric field on
an HV conductor and a particle length under negative DC voltage (concentric cylinder electrode of
40 mm / 140 mm diameter) [10]. In the case of <1>, the particle repeats the back-and-force motion
between the HV conductor and the enclosure (no firefly). In the case of <2> the particle continues its
vibration oscillation near the HV conductor (firefly) under negative DC voltages. The electric field
strength for firefly initiation gradually decreases as particles are longer.
Figure 5.2-9: Relation between firefly phenomenon and particle length under negative DC
voltages (concentric cylinder electrode of 40 mm/ 140 mm diameter).
<1> No firefly, <2> Firefly [10]
5.2.1.6 Summary of particle motion

Summarizing the sub-chapters above, two basic types of particle motion can be distinguished.
A) The particle is bouncing between the HV electrode and ground electrode/enclosure. The lift-off
electric field, the motion frequency, and the position at pseudo resonance [5] depends on the
geometry of the electrodes and the particle, its weight, the gas type, and pressure and in particular
the voltage magnitude.
B) If the particle is able to emit its absorbed charge before reaching the electrode, a different behaviour
arises, the so-called firefly effect in which some periodic superposition of glow and pulsed discharge
78
can be observed. This mainly occurs in combination with high electric field strength on electrodes of
negative polarity, sharp edged particles and at a low gas pressure [2][11][12].
A comparison of the electrical signals received from firefly and crossing modes are compared in Figure
5.2-10. The particle length was 3 mm for both cases. The PD charge magnitude during firefly was about
20 pC and much larger than that for crossing mode of 5 pC.
(a) Firefly (-DC 215 kV, 20 pC) (b) Crossing (-DC 110 kV, 5 pC)
Figure 5.2-10: Comparison of electrical signals between firefly and crossing (3 mm particle) [13]
Figure 5.2-11 compares the electrical signal time interval between firefly mode (a) and crossing mode
(b) of the particles. The histogram of the firefly (Figure 5.2-10a) showed one peak distribution, whose
typical value was around 35 µs. When the particle was crossing to the HV conductor, the peak value
was about 20 ms (Figure 5.2-10b), 600 times longer than that in the case of firefly mode.
(a) Firefly (-DC 215 kV, 20 pC) (b) Crossing (-DC 110 kV, 5 pC)
Figure 5.2-11: Histograms of interval of electrical signals (3 mm particle) [13]
5.2.2 Protrusion
In case of protrusions on the HV conductor, the PD behaviour at inception voltage can be very irregular,
alternating between extinction and re-inception of the PD activity. Beside varying magnitudes,
interruptions of the PD activity in the range of seconds can be observed as a result of low number of
start electrons and ions drifting between the electrodes. An example of the pulse sequences for
protrusion measurements at DC voltage at both negative and positive polarity is shown in Figure 5.2-12.
79
(a)
(b)
Figure 5.2-12: Corona at DC voltage with positive (a) and negative (b) polarity [2]
(UDC = PD inception voltage, gap distance s = 17 mm, tip radius r = 50 µm, SF6, p = 0.1 MPa)
For DC voltage levels above the inception voltage, a continuous discharge behaviour occurs. The
magnitudes of the PD impulses and the time intervals between consecutive impulses are in the region
of a few pC and hundreds of µs respectively [2]. By increasing the voltage up to the breakdown voltage,
an extinction or reduction of the PD impulses can be observed, and although an exponential increase
of the DC current [5][14][15][16][17]. An example of this phenomenon at positive DC voltage is shown
in Figure 5.2-13.
Figure 5.2-13: PD behaviour of protrusion at DC voltage with positive polarity [2]

(s = 40 mm, r = 2.7 µm, air, p = 0.1 MPa)
5.2.3 Floating electrode

The PD behaviour of a floating electrode is characterized by a continuous and constant repetition of
sequences of PD impulses [2]. The time between the PD impulses is in the range of milliseconds to
seconds, the PD amplitudes are in the range of some few pC up to some hundred pC. As an example,
a pulse sequence recorded on an arrangement in a test cell is given in Figure 5.2-14 [5].
80
a) negative polarity b) positive polarity
Figure 5.2-14: Pulse sequence of a floating metallic part recorded on an arrangement in a test
cell, UDC = ±32 kV, SF6, p = 0.5 MPa [5]
If the floating electrode attains a potential at which the critical field strength of the gas insulation is
exceeded, a discharge occurs either towards the earthed or the HV electrode. Under special conditions
the free electrode may remain on a potential at which the critical field strength is not exceeded, thus
no further discharges will occur.
5.2.4 Void
The PD behaviour of voids at DC voltage is not continuous and not constant and depends on many
influencing factors. The PDIV (partial discharge inception voltage) and PDEV (partial discharge extinction
voltage) are very hard to determine, because the PD activity is associated with the change in the voltage
magnitude [1][18][19]. If the voltage is increased, PD may occur, but if the voltage is constant, the PD
activity stops instantly or after a few seconds or minutes, respectively. PDIV at DC voltage can only be
determined by a slow and stepwise increase of the voltage. The duration (tm at Figure 5.2-15) of these
steps must be longer than the electrical time constant of the investigated insulation system. Otherwise
the PDIV observed will be higher than the PDIV at constant DC voltage. Also, pre-stressing of the
insulators has a significant influence on their PD behaviour (Figure 5.2-15 and Figure 5.2-16) [1][18].
PDIV
∆U
|voltage|
tm
*
//
0
time / min
Figure 5.2-15: Void in an epoxy resin insulator at DC; measurement of PDIV (3 PD impulses / 30 s)
with variation of tm [19]
81
Figure 5.2-16: Void in an epoxy resin insulator at DC; influence of pre-stressing on PD activity
(impulses during polarity reversal: noise) [19]
5.2.5 Particle on insulator

Assuming inception voltage is reached (due to the particle's position and geometry), PD impulses with
a low magnitude build up stable space charges at the particle tips. These act to reduce the field
enhancement at the sharp tips and prevent a strong decrease of the insulation withstand strength.
These partial discharges are difficult to detect, occur at low voltages and also produce charge carriers
and decomposition products thus creating a space charge at insulator surface. The latter effect
suppreses the PD behaviour at the insulator surface such that further PD activity will disappear. It should
also be noted, that PDIV and breakdown voltage are very close, depending on the gas pressure, particle
dimensions and position (Figure 5.2-17). Especially at superimposed voltages (e.g. DC+LI), these
defects can become critical [20].
breakdown voltage UBDV
Voltage U / UBDV (without defect, 0,1 MPA)
without defect
PD inception voltage UPDIV,
negative polarity
PD inception voltage UPDIV,
Break off of test due positive polarity
to limits of test setup breakdown voltage UBDV,
positive polarity
breakdown voltage UBDV,
negative polarity
LI breakdown voltage UBDV_LI,
negative polarity
LI breakdown voltage UBDV_LI,
positive polarity
Flashovers without
preceding PD PD inception voltage UPDIV,
calculated, edge 0,05 d
gas pressure
Figure 5.2-17: Particle on insulator surface; PD inception and breakdown voltage at different
gas pressures caused by a particle on an insulator [20]
82
A. Pirker, U. Schichler, “Partial discharge at DC voltage - measurement and pattern
recognition”, Condition Monitoring and Diagnosis, Report No. 228, Xi’an, China, 2016
A. Pirker, U. Schichler, “HVDC GIS/GIL - PD Identification by NoDi* Pattern”, 20th International
Symposium on High Voltage Engineering, Report No. 446, Buenos Aires, Argentina, 2017
T. Berg, “Conductive particles in a coaxial tubular conductor under high DC voltage stress (in
German)”, PhD thesis, TU Graz, December 2014
T. Berg, K. Juhre, T. Fedke, H. Koch, C. Neumann, “Specific Characteristic of Particle Traps for
Application in DC Gas-insulated Transmission Lines (DC GIL),”, VDE Conference High Voltage
Technique 2020, Berlin, November 2020 (Paper accepted)
A. Pirker: Measurement and presentation of partial discharges at DC for identification of defects
in gas-insulated systems (in German). thesis TU Graz, February 2020.
CIGRE WG D1.03, “Gas Insulated Systems for HVDC: DC Stress at DC and AC Systems”, CIGRE
Technical Brochure No. 506, 2012
T. Yasuoka, Y. Hoshina, M. Shiiki, M. Takei, A. Kumada, K. Hidaka, “Insulation Characteristics in
DC-GIS: Surface Charge Phenomena on Epoxy Spacer and Metallic Particle Motions”, CIGRE
Session, Paris, 2018.
T. Hasegawa, K. Yamaji, M. Hatano, P. Endo, T. Rokunohe, T. Yamagiwa, “Development of
Insulation Structure and Enhancement of Insulation Reliability of 500 kV DC GIS”, IEEE
Transactions on Power Delivery, Vol. 12, No. 1, pp. 194 - 202, 1997
P. Wenger, M. Beltle, S. Tenbohlen, U. Riechert, G. Behrmann: Combined characterization of
free-moving particles in HVDC-GIS using UHF PD, high-speed imaging, and pulse sequence
analysis. IEEE Transactions on Power Delivery, Aug. 2019.
T. Hasegawa, A. Kawahara, M. Hatano, M. Yoshimura, H. Fujii, K. Inami, H. Hama,
K. Nakanishi, “Improvement of withstand voltage at particle contamination in DC – GIS due to
dielectric coating on conductor”, Gaseous Dielectrics VIII, pp.581-586, 1998
Y. Negara, K. Yaji, J. Suehiro, N. Hayashi, M. Hara, “DC Corona Discharge from Floating Particle
in Low Pressure SF6”, IEEE Transactions on Dielectrics and Electrical Insulation, Vol. 13, No. 6,
pp. 1208 - 1216, 2006
N. Nojima, X. Zhang, M. Sato, T. Yasuoka, M. Shiiki, M. Takei, S.A. Boggs, “Forces Affecting
Metallic Particle Motion in GIS”, International Symposium on Electrical Insulating Materials, pp.
132 - 135, Niigata, Japan, 2014
N. Takeji, K. Takahata, M. Hatano, K. Inami, Y. Shimizu and H. Takeuchi, “PD detection in DC
GIS –The first report”, Annual Conference of IEEJ, Paper No. 1435, 1995 (in Japanese)
T. Takahashi, T. Yamada, N. Hayakawa, S. Yuasa, S. Okabe, H. Okubo, “Space Charge
Behaviour and Corona Stabilization Effect in SF6 Gas Viewed from Sequential Generation of a
DC Partial Discharge”, Journal of Physics D: Applied Physics, Vol 34, 2001
T. Hinterholzer, W. Boeck, “Space-Charge-Stabilization in SF6”, Conference on Electrical
Insulation and Dielectric Phenomena, pp. 392 - 96, Kitchener, Canada, 2001
T. Hinterholzer, W. Boeck, “Breakdown in SF6 Influenced by Corona-Stabilization,” Conference
on Electrical Insulation and Dielectric Phenomena, Vol. 1, pp. 413 - 416, Victoria, Canada, 2002
E. Ouss, L. Zavattoni, A. Beroual, A. Girodet, P. Vinson, “Measurement and Analysis of Partial
Discharges in HVDC Gas Insulated Substations”, 20th International Symposium on High Voltage
Engineering, Report No. 219, Buenos Aires, Argentina, 2017
E. Lemke, “Using a Field Probe to Study the Mechanism of Partial Discharges in very Small Air
Gaps under Direct Voltage”, IEEE Electrical Insulation Magazine, Vol. 32, No. 4, pp. 43 - 51,
2016
M. Hartje, L. Kaestingschaefer, M. Farahani, P. Werle, A Pirker, U. Schichler, “Applicability of
IEC 60270 for Partial Discharge Measurement under DC Voltage - Results of a Round Robin
83
Test”, 20th International Symposium on High Voltage Engineering, Report No. 349, Buenos
Aires, Argentina, 2017
M. Hering, Flashover behavior of gas-solid insulating systems under DC voltage stress (in
German), PhD thesis. TU Dresden, 2016.
84
6. Background for Dielectric testing for proving the

capability to withstand the phenomena in gas-
insulated DC systems
Insulator in the gas-insulated environment: DC insulation system
test
6.1.1 Basic idea
Dimensioning of HVDC GIS requires the knowledge of electric field distributions occurring in the case of
DC application. Starting from a capacitive field distribution at the moment of energisation, electric field
distribution in HV DC gas-insulated systems is continuously evolving with time, depending on the surface
and bulk currents in the solid insulation defined by the volume conductivity as well as on the ionic
currents in the gas. This results in interface charging, particularly of the solid-gas surface and space
charge accumulation in the solid insulation until the resistive steady state is reached [1]. The design of
solid insulating components as well as adequate testing procedure to verify the electrical insulation
behaviour is therefore of great importance. More information on basics is given in chapter 4 of this
brochure.
When a DC voltage is applied, the low effective DC conductivity of an Al3O3-filled epoxy composite solid
insulation determines the rate of transition from a capacitive to a resistive field distribution in the system.
A resistive field distribution forms, while the capacitive field distribution relaxes on the time scale given
by
𝜏m = ε0 𝜀r /σ (6–1)
As an example for a DC conductivity of 𝜎 = 10-14 to 10-19 S/m, the transition to a DC field distribution
will range over a period of hours to months in the solid. As a result of the temperature dependence of
DC conductivity, temperature gradients primarily define where field enhancement and space charge
accumulation occurs in the solid, and also shape the capture volume for ions near the solid-gas interface.
Moreover, the surface field can reach its minimum or maximum value during the transition between
voltage switch-on and DC steady state. For comparison, the duration of the heating-up period for typical
GIS components determined during continuous current tests is usually shorter than eight hours. This
variety of possible operation conditions demonstrates the requirement for long-term DC insulation
system tests.
6.1.2 Duration of DC transition

The time duration of the long duration continuous DC voltage test depends on the transition time from
capacitive to resistive field conditions and has to be determined prior to carrying out the tests.
The transition to the DC steady-state is characterised by an asymptotic change in field strength. For the
determination of testing times the dielectrically relevant locations, mostly at outer electrodes, need to
be considered. The degree of charging 𝑑c of a specific location is defined by the effect on the momentary
electric field 𝐸(𝑡), by comparing the capacitive (AC) electric field 𝐸AC at energisation with the asymptotic
DC steady state 𝐸DC according to
𝐸(𝑡) − 𝐸AC
= 𝑑c (𝑡) (6–2)
𝐸DC − 𝐸AC
If the degree of charging of 90% has been achieved at the specific location, the transition time has
been reached. As the DC stress is only reached asymptotically, the 90% value seems to be a fair
compromise for testing purposes. At some positions, for instance at triple points, longer times for the
transition to DC fields are possible. When they are of minor importance due to relatively low electric
field strength, it is not reasonable to take them as a basis to decide upon testing time.
85
A technical feasible compromise is to consider all areas where the electric field strength is higher than
20% compared to the transient (AC) electric field strength 𝐸𝐴C at energization and the asymptotic DC
steady state field strength 𝐸𝐷𝐶.
abs (𝐸(𝑥)) ≥ 0.2 ∙ abs ( 𝐸DC )

(6–3)
abs (𝐸(𝑥)) ≥ 0.2 ∙ abs ( 𝐸AC )
The transition itself depends on the local temperature distribution and on the lowest temperature. The
transition to a DC field distribution could lead to long test duration stretching from hours to months
(Table 6.1-1).
Table 6.1-1 Duration dDC to reach the DC steady state depending on enclosure temperature for
typical epoxy resin properties [2][3][4]
Enclosure Relative permittivity Conductivity insulator Duration to reach DC

temperature epoxy resin material material steady state dDC
in °C in S/m in days
20 8>>2 10-19 <  < 10-16 2500 > 3  > 6
40 8>>2 10-17 <  < 10-14 250 > 3  >1
70 8>>2 10-15 <  < 10-12 25 > 3  >0.1
The duration of the test can be approximated with the following methods [5][6]:
 Worst case approximation of dielectric time constant according equation (6–1) (taking the
longest value over the whole insulation system, i.e. typically the location with lowest
conductivity). For the estimation of the dielectric time constant it is necessary to measure
permittivity and electrical conductivity of the insulating material (bulk). A description of
appropriate measuring methods is given in section 4.2.3 of this brochure.
 DC electric field simulation. A simulation verified by experiments (at least by means of model-
arrangements) has to be used [4][7][8]. Material and gas characterisations, which are relevant
for the numerical model, have to be provided [9][10]. The scalability of the model has to be
demonstrated. Of importance are the electric field strength, temperatures and temperature
gradients. These parameters have to represent realistic service conditions. Examples are given
in the sections 4.3.1 / 4.3.2 of this brochure.
 Measurement of the DC potential field on the actual insulator surface in energized state on
different locations along the insulator radius. The temperature gradient across the insulators
shall represent the worst case under service conditions with tolerances less than 20%. Examples
are given in section 4.3.2 of this brochure.
Also the surface conductivity of the insulating material shall be measured. If the charge transport in the
solid insulation is dominated by the bulk conductivity compared to the charge transport caused by the
surface conductivity, only the bulk material has to be taken into consideration for calculation of the
dielectric time constant (in case of dominant bulk conductivity).
Especially in the case of the third method, the time to reach the DC steady state tDC is only indirectly
determined. In those cases, tDC is considered to be fulfilled, if the rate of change of the measured
potential field is lower than 10 % of the initial rate (initial time delays shall be ignored).The accurate
definition of the transition time and the verification of the transition behaviour is essential to derive a
reliable testing procedure for DC gas-insulated systems.
Based on these observations the following definitions can be given. The DC steady state is defined as
90 %-transition from a capacitive to a resistive field distribution in the gas-insulated system. Depending
on the temperature of the insulating material the transition to a DC field distribution can take times
from hours to months. The duration tDC is the time to reach the DC steady state. In case the DC steady
state is unknown and the time to reach the DC steady state dDC could not directly be determined, tDC is
considered to be fulfilled, if the rate of change of the measured potential field is less than 10% of the
initial rate (initial time delays shall be ignored).
86
6.1.3 Test conditions

To aid in understanding as well as to verify the adequate testing methods, a temporal evolution of the
electric field on the surface of a model insulator was studied as function of insulator geometry,
characteristic thermal and electrical times, as well as the test sequence used.
The maximum field strength as well as its location on the surface is calculated for typical GIS disk
(rectangular and trapezoidal cross-section) and conical (parallelogram cross-section) insulator
geometries. Results are benchmarked with a HVDC GIS insulator design used in the field.
Additional parameters included in the study are the ratio between the dielectric relaxation time of the
system and the time to reach thermal equilibrium after switch-on of the nominal current, which is the
typical heating time of the system. As a reference, the no-heating case is presented. Particularly
interesting is the comparison between the two possible test sequences, namely 1) first switch-on of the
nominal current, then DC voltage or 2) vice-versa, along with the occurrence – or not – of a transient
maximum in the electric field.
Two thermal situations are considered: isothermal (room temperature) and the situation in the presence
of a thermal gradient across the insulation system. Three ratios between the DC transition time of the
system and the typical thermal time for temperature rise-up are also taken into account. In contrast to
already established DC products such as HVDC cables, in GIS solid and gas insulation coexist electrically
and thermally in parallel: the established fields at the interfaces are the result of a competition of
different electrical conduction mechanisms prevailing in each insulating medium. Interfaces are critical
locations in the system: a failure occurs in the gas, but is often mediated by charges accumulated on
insulator surfaces: surface flashovers generally follow a short path of high electric field [11].
Three model geometries are considered for this study, together with a real insulator geometry optimized
for HVDC GIS application (See Figure 6.1-1) [12].
A HV GND A HV GND A HV GND
Gas Gas
surface
Solid Solid Solid
Gas
a) b) c)
Figure 6.1-1: Geometries of a) rectangular b) trapezoidal c) slanted insulators [12]
A: rotation axis. “surface”: solid-gas interface
Generally, for the simulations, an applied voltage of 100 kV was used. The solid material is considered
ohmic with an Arrhenius temperature-dependent conductivity σ according to equation (4–4)[7]. For
comparison, an optimized DC insulator geometry was also included in the study [13]. For the modelling
of electric fields in the gas-insulated DC systems, three cases are considered for the conductivity values
of the solid epoxy material:
1. Typical sigma value of epoxy → DC transition time is longer than the thermal rise-up time
2. Medium sigma = (typical sigma)·104 → DC transition time is similar as the thermal rise-up time
3. High sigma = (typical sigma)·106 → DC transition time is shorter than the thermal rise-up time
For this part of the study, the gas conductivity is considered negligible. All value of the electric field
strength presented are on the gas side of the solid-gas interface, as flashover typically occurs along the
interface, in the gas. The dimensions of insulator model geometries are shown in Table 6.1-2.
Table 6.1-2: Dimensions of insulator model geometries [12]
87
Insulator dimensions (in mm)

Geometry inner thickness outer thickness
thickness delta inner radius r_c insulator width
w_in w_out
a) Rectangle 50 50 0 50 120
b) Trapezoid 50 10 0 50 120
c) Slanted 50 50 50 50 120
Typical values for the thermal parameters of epoxy are considered, resulting in a time for temperature
rise up of about 3 h. The temperature difference between HV and ground (GND) electrodes is 20 K. For
obtaining a realistic radial temperature distribution along the surface, an effective convective heat
transfer coefficient =20 W/(m2K) is assumed, with the following heat transfer flux boundary condition
on the solid-interface: 𝑄̇ = ℎ(𝑇av − 𝑇), with the local temperature 𝑇 and the average temperature of the
whole interface 𝑇av .
Typical Sigma
Temperature
Sigma*10^4 Trapezoid Spacer
1.8 365
1.8 Sigma*10^6 365
Temperature
1.6 Typical Sigma 360
Max Electric Field (E/E_cap)

1.6 360
Sigma*10^4
Sigma*10^6 355
355 1.4
Temperature [K]
1.4
Temperature [K]
350
350
1.2
1.2
345
345
1.0
1.0
340
340
0.8
0.8 335
335
0.6
0.6 330
330
10-3 10-2 10-1 100 101 102 103 104 105 106 107 108 109
10-3 10-2 10-1 100 101 102 103 104 105 106 107 108 109
Time (s)
Time (s)
A) B)
Figure 6.1-2: Possible test schemes A) Heating of system until complete temperature rise-up and
thermalisation vs B) DC stress and heating applied together. Lower panels: principle. Upper panels:
example of temporal evolution of the maximum electric field on the solid-gas interface for the
three conductivity scenarios. Depicted is the average temperature of the solid-gas interface. [12]
Possible test procedures are presented in Figure 6.1-2. It is clear that, for the evaluation of the
magnitude and location of electric field maxima, the evaluation of case B) for the three conductivity
values is sufficient. Indeed, in A) only the speed of the transition from a capacitive to a resistive electric
field is affected, while the field distribution for any time can be mapped to another time of case B), with
typical sigma value for conductivity. In the following paragraph, case B) will be evaluated for the four
geometries considered.
The parameters studied are the ratio between the DC transition time of the system – in DC it is controlled
by the DC conductivity of the solid insulating material – and the time to reach thermal equilibrium after
switch-on of the nominal current, i.e. the typical heating time of the system. As reference, the no-
heating case is presented. Particularly interesting is the comparison between the two possible test
sequences, namely 1) first switch-on of the nominal current, then DC voltage or 2) vice-versa and the
occurrence – or not – of a transient maximum in the electric field.
88
First, steady-state capacitive and resistive fields are presented (see Figure 6.1-3) with (warm, with
temperature gradient) and without the presence of temperature gradient. Field data are normalized by
the maximum value of the capacitive field distribution.
Figure 6.1-3: Resistive and capacitive electric field along the solid-gas interface for all considered
geometries. For the rectangle insulator, warm and cold resistive field distribution are identical
(perfect symmetric interface results in zero normal field component) [12]
The temporal evolution of the location on the gas-solid interface with the maximum field is shown in
Figure 6.1-4. While the best geometry for minimizing the electric field is the rectangle version, it is not
practicable for mechanical and production related reasons. The next best version is the optimized
spacer. It is important to note, that the maximum electric field stress occurs at the beginning of the DC
stress period (AC conditions) or at the end under DC steady state conditions and maximum temperature
gradient conditions, independent on the insulator geometry and material properties.
89
Relative Temperature Change (T_av-T_cold)/(Delta_T)

Relative Temperature Change
1.8 1.0 100
1.7 Real Spacer Real
90 Rectangle
1.6 Rectangle 0.9
Trapezoid
1.5 Trapezoid 80
Slanted (Upper)
0.8 Slanted (Lower)
1.4 Slanted (Upper)
Loc of Max Field (%)

1.3 Slanted (Lower) 70
0.7
1.2
1.1 0.6 60
1.0
0.9 0.5 50
0.8
0.4 40
0.7
0.6 30
0.3
0.5
0.4 20
0.2
0.3
0.2 0.1 10
0.1
0.0 0.0 0
10-4 10-3 10-2 10-1 100 101 102 103 104 105 106 107 108 109 1010 10-4 10-3 10-2 10-1 100 101 102 103 104 105 106 107 108 109 1010
Time (s) Time (s)
Typical sigma (Case 1)

1.8 Real 1.00 100
1.7 0.95
Rectangle 0.90 90
1.6
Trapezoid 0.85
1.5
Slanted (Upper) 0.80 80
1.4
0.75 Real

1.3 Slanted (Lower)
0.70 70 Rectangle
1.2 0.65 Trapezoid
1.1 60 Slanted (Upper)
0.60
Slanted (Lower)
1.0 0.55
0.9 0.50 50
0.8 0.45
0.40 40
0.7
0.6 0.35
0.30 30
0.5
0.25
0.4 20
0.20
0.3 0.15
0.2 0.10 10
0.1 0.05
0.0 0.00 0
10-4 10-3 10-2 10-1 100 101 102 103 104 105 106 107 108 109 1010 10-4 10-3 10-2 10-1 100 101 102 103 104 105 106 107 108 109 1010
Time (s) Time (s)
Medium sigma (Case 2)


1.8 1.00 100
1.7
Real 0.95
1.6 Rectangle 0.90 90
Trapezoid 0.85
1.5 Real
0.80 80
1.4 Slanted (Upper) Rectangle
0.75
1.3 Slanted (Lower) Trapezoid

0.70 70 Slanted (Upper)
1.2 0.65 Slanted (Lower)
1.1 0.60 60
1.0 0.55
0.9 0.50 50
0.8 0.45
0.40 40
0.7
0.6 0.35
0.30 30
0.5
0.25
0.4 20
0.20
0.3 0.15
0.2 0.10 10
0.1 0.05
0.0 0.00 0
10-4 10-3 10-2 10-1 100 101 102 103 104 105 106 107 108 109 1010 10-4 10-3 10-2 10-1 100 101 102 103 104 105 106 107 108 109 1010
Time (s) Time (s)
High sigma (Case 3)
Figure 6.1-4: Temporal evolution of the location on the solid-gas interface with the maximum
electric field for the three cases of conductivity (left) and temporal evolution of the location of the
maximum electric field on the solid gas interface. 0%: HV electrode (conductor), 100%: ground
electrode (enclosure) (right) [12]
Because the maximum electric field stress occurs at the beginning of the DC stress period (AC
conditions) or at the end under DC steady state conditions and maximum temperature gradient
conditions, dielectric testing, especially impulse voltage testing superimposed to DC voltages, is of
higher importance under these conditions. Therefore, superimposed voltage tests are required under
the following conditions:
1. Superimposed voltage tests after relatively short DC pre-stress of 2 h and cold conditions
without temperature gradient across the insulators.
90
2. Superimposed voltage tests after long DC pre-stress to reach the DC steady state as
defined and worst-case temperature conditions with maximum temperature gradient
across the insulators.
Superimposed voltage tests after short DC pre-stress of 2 h and worst case temperature conditions with
maximum temperature gradient across the insulators are not mandatory, but could be performed in
addition to the type tests. Additional testing during the transition time is not necessary.
6.1.4 Load conditions

As mentioned in the previous chapter, the duration of the long duration continuous DC voltage test
depends on the transition time from capacitive to resistive field conditions and has to be calculated
before starting the tests. The transition itself depends on the local temperature distribution and on the
lowest temperature. The temperature difference across the insulators is of high importance and must
be defined and verified for testing. ΔTmax is the maximum temperature difference over the gas insulation
in thermal steady state at which the gas-insulated DC system is designed to operate at rated current.
This value is also to be calculated or measured during pre-tests and stated by the supplier, who should
also provide evidence of the correlation between this design value and data measured during testing.
Tcond,max is defined as the maximum temperature at which the conductor is designed to operate at rated
current. This value is to be stated by the supplier. For superimposed voltage tests after long DC pre-
stress to reach the defined DC steady state and worst-case temperature conditions with maximum
temperature gradient across the insulators high load (HL) conditions must be used. High load consists
of a continuous heating period at rated current up to the thermal steady state (duration d). For the
insulation system test a higher equivalent DC or AC current compared to the rated DC current is allowed,
because the maximum conductor temperature and maximum temperature drop across the insulation
has to be safely achieved.
The duration d is defined as the time sufficient for the temperature rise to reach a stable value and
should be evaluated by pre-tests on the same test arrangement as used for dielectric HL tests as
preferred procedure (thermal calibration). If this is not possible, type tests on similar, but typical gas-
insulated components of the same type could be used to determine the duration d according to 6.5 of
IEC 62271-203. The test shall be made over a period of time, sufficient for the temperature rise to reach
a stable value. This condition is deemed to be obtained when the increase of temperature rise does not
exceed 1 K in 1 h. This criterion will normally be met after a test duration of five times the thermal time
constant of the tested device. Duration d for gas-insulated components is typically in the range of some
hours. The time for the whole test may be shortened by preheating the circuit with a higher value of
current, provided that sufficient test data is recorded to enable calculation of the thermal time constant.
As described the time duration tDC is defined as time required to reach at least 90% of the DC steady
state electric field at the major locations (i.e. locations with at least 20% of Emax) on the insulator
surface. One example for a DC transition simulation result is shown Figure 6.1-5 [14]. The transition
depends on the local temperature and the process time varies with the temperature at the specific
location. In the case shown, a transition duration of some months has to be chosen, following the worst-
case consideration in the coldest region on the outer bottom (refer to Figure 6.1-5) surface of the
enclosure. The time duration could be reduced by increasing the temperature due to higher currents or
an increase of the ambient temperature. Figure 6.1-5 shows an example of the results for an increased
ambient temperature of 40 °C. The ambient temperature could be realized by an additional housing
around the test device along with forced ventilation to achieve a homogeneous temperature distribution
throughout the interior of the housing. In this case a time duration tDC of 30 days has to be chosen to
reach at least 90 % of the DC steady state electric field at each location of the insulator surface as
shown in Figure 6.1-5 [14].
91
1.2
1 99 %
95 %
90 %
0.8
DC field [%]
0.6
outer top
0.4 outer side
outer bottom
0.2 inner bottom
0
0 5 10 15 20 25 30
time [d]
Figure 6.1-5: Transition time for the insulator, depending on the location and ambient temperature
[14]; DC field strength normalized
6.1.5 Heating methods

The current causes a heating of the insulating system. This process has an essential impact on the
production of charge carriers and on the charging process in general. Therefore, a heating method
should be implemented resulting in a heating comparable to the heating at rated DC current.
The heating method used shall be ohmic heating generated by passing the equivalent DC or AC current.
Gas-insulated systems can be subject to significant harmonic current content. In particular the
components connected to the transformer valve windings are subject to the same harmonics current
that flow inside the transformer. The current flowing to the DC gas-insulated systems usually has a low
harmonic content. Such harmonic current cannot be easily reproduced in laboratories. Equivalent DC
and AC power frequency current (50 Hz or 60 Hz) can then be used. The magnitude of the equivalent
test current shall produce the same total watt losses calculated for the specified harmonic current
spectrum.
The calculation of the equivalent DC and AC current is given for HVDC bushings in Annex B of IEC/IEEE
65700-19-03 [15].
AC current heating is often applied, generated by operating a current transformer inversed, reducing
testing expenditure. The objective of heating with equivalent AC current is to generate similar
temperature gradients Δ𝑇 at the insulators as well as temperature rises 𝜃 at the inner conductor as with
rated DC current [16]. Testing with an AC heating current IAC = IrDC would lead to higher thermal stress,
since the skin effect at AC current increases the power losses in the assembly. Furthermore, as the
withstand voltage depends on the gas density, locally decreased gas density due to gas convection close
to the conductor may lead to a decreased withstand voltage. Therefore, when using AC test current to
provide heating, it has to be adapted, to be representative to the later DC operation in the system.
The equation
𝑅 (𝑇 )
𝐼ep,AC = 𝐼rDC ∙ √ DC amb ⁄𝑅 (𝑇 ) (6–4)
AC amb
presented in [16], assuming equal power losses for AC and DC power supply fulfils the above mentioned
requirements satisfactorily, as shown in [16]. An AC current of 4600 A equivalent to a DC current of
5000 A leads to a slightly higher temperature gradient Δ𝑇 and temperature rises 𝜃. In [16] an equivalent
testing current of 4700 A was chosen, which includes a safety margin of approximatly 2 % to cover all
further effects (e.g. harmonics).
92
Figure 6.1-6: Normalized temperature gradient Δ𝑇 across the insulator and temperature rises 𝜃
at the inner conductor [16]
Left: Temperature gradient across the insulator
Right Temperature rises at the inner conductor
All values normalized to the hot-spot temperature at 5000 A DC
This relation was determined in a temperature rise test carried out on a real DC GIS test arrangement
by acquisition of temperatures at various positions at the insulators, the conductor and the enclosure,
followed by an interpolation of the results obtained at different heating current levels. It corresponds
very well with the AC current determined by the equation (6–4) in [16]. For simplification it seems to
be sufficient to measure the AC and DC resistance at ambient temperature instead of the resistance at
HL temperature, as given in [15].
The rated current shall also cover most situations, where harmonic currents (see Figure 6.1-7) cause
further temperature-rise in addition to the DC current. The currents shown in Figure 6.1-7 for VSC
stations are typical for cascaded two-level voltage source converter (CTL VSC) links of earlier
generations and are even lower in the case of more recent VSC technologies [17]. Currents, as shown
below can thus be considered conservative with regard to their thermal impact. Furthermore, the typical
harmonic currents for LCC applications are shown in Figure 6.1-7 [18][19].
Figure 6.1-7: Relative harmonic currents for typical VSC converter stations [17] and LCC converter
[18] stations based on a rated current of 4000 A
The harmonic currents are low in magnitude. However, they may sum up to relevant additional losses
due to their relatively large skin effect at frequencies in the region of some kHz. Such impact on the
resistance of the conductor for frequencies in the region of kHz can be estimated using the skin depth
approximation
93
2⋅𝜌
𝑑skin = √ (6–5)
𝜔⋅𝜇
This approximation together with typical conductivities and conductor dimensions leads to skin effect
factors (resistance ratio) in the range of 3 to 10 for frequencies of several kHz. The accumulated
additional power losses due to harmonic currents in the examples given in Figure 6.1-7 range from
0.03 % to 0.5 %. IEC 65700 Annex B.3 states an alternative equation to calculate the skin effect factor
for tubular conductors. However, lower skin effect factors are obtained by using this approach and thus
the results obtained based on the skin depth are considered conservative, also from this perspective.
As a consequence for testing, high load conditions shall include an additional 0.5 % of current to account
for 1 % of additional losses due to harmonic currents.
For convenience of testing, high load conditions may be achieved by heating the equipment with AC
current, which implies two differences in regard of temperature rise:
 The skin effect will cause additional power losses and temperature rise in the inner conductor.
 Voltages are induced in the enclosure. If the enclosure of the test setup forms a closed current
path, an enclosure return current will flow. Its magnitude is almost as high as the conductor current
and thus a significant temperature rise is caused. If the enclosure does apparently not form a closed
current path, eddy currents will flow. Their magnitude is a strong function of geometry. However,
they are typically significantly smaller than the conductor current. The impact of both of those
enclosure currents in terms of temperature-rise is typically a few degrees Kelvin.
Figure 6.1-8: Skin effect factor k as function of hollow conductor diameters b/d, frequency and DC
resistance per m [20]
The additional power losses due to the skin effect constitute a higher stress than the rated one. An
equivalent current to achieve power losses, similar to those which would be caused by a DC current, is
recommended. The skin effect factor of the hollow inner conductors found in gas-insulated equipment
is in the range 1.02 < k < 1.1; the precise value can be obtained from Figure 6.1-8 (which provides a
significantly more precise value for skin effect factors in the frequency region < 100 Hz than an
estimation based on the skin depth). The current reduction factor when testing DC equipment with AC
1
current is 𝑘AC = .
√𝑘
94
Figure 6.1-9: Temperature difference conductor – enclosure considering AC / DC current and

impact of enclosure current
The enclosure currents (enclosure return currents as well as eddy currents) cause additional
temperature-rise of the test object. However, the temperature difference Δ T is practically not a function
of enclosure currents (see Figure 6.1-9). Computations of the temperature rise of a HVDC GIS loaded
with AC current (with and without enclosure current) or DC current are performed based on the thermal
network method [20]. Only negligible impact of the enclosure currents on the ΔT were discovered.
Though generally marginal in absolute quantities, it should be noted that the effect on ΔT is more
pronounced for thinner enclosure walls than for cast enclosures which tend to be thicker.
Ohmic heating with AC current allows a rather simple test setup with current transformers as the heating
current source (see Figure 6.1-10 below). The test voltage is several ten thousand times higher than
the AC voltage that drives the heating current. Thus, the ripple of the DC voltage caused by the AC
voltage of the heating current source is negligible.
For tests of HVDC GIS equipment under in-service condition, stresses due to DC voltages of both
polarities, polarity reversals, superimposed impulse voltages and various load conditions have to be
combined. The load conditions are characterized by a temperature difference Δ T between the inner
conductor and the enclosure. For this Δ T, the harmonic current content shall be accounted for. This
applies to both AC and DC currents. The skin effect due to AC will result in higher ΔT, so a rule of
compensation is given. The increase in enclosure temperature does not impact the resulting ΔT
considerably; thus, no further compensation is required.
Figure 6.1-10: Circuit diagram of test object considering voltage source and current
source
6.1.6 Definition of test voltages

The aim of the DC insulation system test is to demonstrate satisfactory electrical performance of DC
insulators (partitions, support insulators, rods, tubes ….) under the influence of space and surface
charges. Therefore, the rated values have to be applied as test voltages.
95
As DC voltage the rated continuous DC voltage has to be used. The rated continuous DC voltage is the
maximum continuous direct voltage assigned to the gas-insulated system by the manufacturer for
specified operating conditions UrDC = 1.1 ∙ UnDC (sometimes lower values are given, e.g. UrDC =
1.05 ∙ UnDC; for these recommendations the highest reported value is chosen).
For superimposed lightning and switching impulse voltages, again the rated values must be used.
Regarding the number of impulses, the test procedure A of IEC 60060-1 is the preferred test procedure
[21]. The test procedure is normally recommended for tests on degradable or non-self-restoring
insulation. If during DC insulation system testing a flashover in the self-restoring insulation (gas) occurs,
the electric field distribution could be changed. Therefore, the procedure A has to be chosen as preferred
procedure. The gas-insulated system has passed the impulse tests if the following conditions are
fulfilled:
 Each series has at least 3 impulses

 Three impulses of the specified shape and polarity at the specified withstand voltage level
are applied to the test object. The requirements of the test are satisfied, if no indication of
failure is obtained.
The duration of lightning and switching impulse voltage stress is too short to modify the electric field
distribution under DC stress significantly. Therefore, the time between two successive impulses is
allowed to be short, but not less than 1 minute. In order to check the superposition and the impulse
time parameters, pre-shots may be applied in advance to adjust the impulse voltage generator. The use
of appropriate methods, such as the application of two impulses between 60 % and 80 % of the rated
withstand voltage before the test, is recommended. Additional impulses up to a maximum of 60% of
the rated withstand voltage before the test are allowed.
6.1.7 DC insulation system test procedure

The DC insulation system test has to be performed under high load conditions. After a heating period,
the maximum conductor temperature and maximum temperature drop across the insulation has to be
achieved and maintained for the complete test duration. It is of advantage to measure partial discharges
(e.g. by employing UHF PD monitoring), temperature (ambient and test device), test current and test
voltage during the entire test and to record the data. The measured temperatures have to be compared
to data obtained from calibration measurements from previous continuous current tests. For insulation
system testing, a sufficient number of insulators assembled in realistic arrangements must be tested. A
dielectric routine test or preconditioning could be considered before starting the insulation system test.
The normal sequence of tests is described in Table 6.1-3.
Table 6.1-3: Sequence of DC Insulation System Test
Conditions
Test
Test Values Load Remarks
Heating
Pre-tests
Dielectric pre-tests
Maximum continuous opera-
Long duration continuous DC voltage test HL duration dDC
ting DC voltage (-) / (+)
Superimposed lightning impulse voltage tests
(bipolar and unipolar superposition)
Rated values HL
Superimposed switching impulse voltage tests
Polarity reversal HL
Maximum continuous opera-
Long duration continuous DC voltage test HL duration dDC
ting DC voltage (+) / (-)
Superimposed lightning impulse voltage tests
Rated values HL
Superimposed switching impulse voltage tests
96
The DC insulation system test needs be carried out once only, unless there is a substantial change in
the solid insulation system with respect to materials, manufacturing processes, construction, design
parameters or requirements [22][23][24].
At first glance, the DC insulation system test procedure is similar to the pre-qualification test for
polymeric insulated DC cables. However, the DC insulation system test is intended to verify the insulating
capability of the gas-insulated HVDC system consisting of insulating gas and solid insulating materials
with special regard to surface properties and the transition from capacitive to resistive field distribution
to reach the DC steady state conditions under high load conditions [22].
The pre-qualification test for DC extruded cable systems is intended to indicate the electrical long-term
performance test on the voltage-time (V-t) characteristic of the insulating material and to cover thermo-
mechanical aspects. For gas-insulated HVDC systems a verification of the electrical lifetime (V-t
characteristic) is not of significant importance, because:
 The electrical lifetime (V-t characteristic) of solid insulating material used in GIS/GIL is equal
or even better under DC voltage stress compared to AC at typical service stress [25] (see
chapter 6.2).
 Experiences with AC gas-insulated systems show that all parts of the insulation system
assuming sound manufacturing practices according to the relevant quality requirements do not
reveal any ageing mechanisms which cause critical ageing. Therefore, an overall entirely sound
insulation system should not exhibit any increase of the failure rate with time. After 30 years
of operation there is no general ageing which recognizably affects the long-term performance.
The lifetime can be estimated to be much higher than 30 years. This is in line with the findings
based on considerations about the critical physical phenomena and investigations of the
statistical long-term performance [26].
 Additional mechanical stresses caused by load cycles similar to cables are of minor interest for
GIS/GIL applications and are covered by thermal cycles performance tests of each insulator
design according to IEC 62271-203 (subclause 6.106) [27]. Additional tests are not necessary.
Nevertheless, a combination with the DC insulation system test under high load conditions
could be possible.
6.1.8 Examples for test set-ups

Figure 6.1-11 shows one example of a test set-up for the DC insulation system test (320/350 kV HVDC).
In this case, a new HVDC gas-insulated test generator was developed suitable for continuous DC voltage
tests up to 500 kV. Using an overhead connection to an impulse voltage generator, superimposed
voltage tests are possible as well. The bushing is placed in a second test hall and could be disconnected
using a gas-insulated HVDC disconnector to enable continuous testing in the second test hall (see
Figure 6.1-12).
Heating
transformer
Figure 6.1-11: DC insulation system: test set-up (left) and details of the test object (red) [28]
97
The DC insulation system test has to be performed for all solid insulators such as partitions, support
insulators or drive rods. In the case under consideration, more than 10 insulators assembled in realistic
arrangements were tested (Figure 6.1-11) [28].
Bushing (Connection to SI / LI)
Test Device Hall

Divider
Disconnector
Resistor
Rectifier 1
Rectifier 2
AC
Figure 6.1-12: DC insulation system test: test set-up (right) and test device (partitions)
(left) [6]
Figure 6.1-13 shows another example of a test set-up for the DC insulation system test (500 kV DC)
[29]. The DC voltage source is connected via a damping resistor, to allow a superposition of impulse
voltages (via spark gap). The device under test includes more than 10 partition insulators and 3 drive
rods, assembled in their normal operating positions. It is designed in a closed loop in order to allow
inducing an AC current with a current transformer to reach the temperature distribution of the maximum
operating DC current.
Figure 6.1-13: DC insulation system test: Test set-up, prepared for both DC and
superimposed tests (left) and device under test with solid insulators (right) [29]
Figure 6.1-14 presents a 320 kV DC test set-up comprising of 12 partition insulators and 2 disconnectors
during DC insulation system tests. The superimposed test is performed using a spark gap. A water filled
resistor is used to protect the DC source and an RC divider is used to measure the voltage applied to
the test object. The high load conditions are generated by an AC current transformer [30].
98
Figure 6.1-14: DC insulation system test: Test set-up, prepared for both DC and
superimposed tests [30]
99
Particles – mitigation measures, detection and identification by

analysis of PD data
Beside the surface charge of the insulator, free moving particles can reduce the breakdown voltage of
a gas-insulated HVDC system considerably [31]. Therefore, different countermeasures have to be
introduced to make particles harmless. Furthermore, an efficient testing is required to prove the
effectiveness of these measures and to detect and identify PD defects in general.
6.2.1 Mitigation measures
To avoid particles and to mitigate the risk to cause flashovers, the following principal countermeasures
can be applied:
 Avoidance of particles by high cleanliness during manufacturing and assembly process
 Prevention of particle lift-off and particle movement by
o Large-sized equipment to reduce electric field strength at the enclosure
o Dielectric coating of the enclosure to suppress lift-off
 Application of particle traps to capture particles
o Particle trap at the enclosure, particularly for positive polarity
o Particle trap at the conductor, particularly for negative polarity
 Conditioning procedure primarily by application of AC voltage including PD measurements
6.2.1.1 Coated electrodes
Particles usually lay on the bottom of a sheath, when no voltage is applied. When the electrostatic force
acting on a particle exceeds the gravitational force due to increasing applied voltage, the particle lifts
off and levitates. When an electrode is coated with insulating material, particles do not get an electric
charge directly from the electrode. According to experimental observation and measurements, partial
discharges are the main cause of particle electrification [31] [32] [33] [34] [35]. Various dielectric
coating materials and different coating thickness are described in literature [35] [36] [37]. The thickness
and the conductivity of the coating is of importance. Furthermore, it should be free of imperfections
which may lead to decreased electric withstand field strength and to discharges destroying the coating
surface [38]. An example of a test setup and coating types under investigation [35] are given in Figure
6.2-1.
Figure 6.2-1: Experimental setup and specification of dielectric coatings to investigate the
particle lift-off from enclosure [35]
100
Acceleration of the particle to initiate lift-off was generated by a mechanical shock, created by striking
the outside of the enclosure with a hammer, and this value was measured with a sensor. DC voltage
with positive and negative polarity was applied.
The results without vibration in conventional and new dielectric coatings show no particle lift-off under
the experimental conditions with applied DC voltage of 1.0 p.u. for 4 hours, 1.5 p.u. for 2 hours and
1.75 p.u. for 1 minute, respectively, under DC voltage with positive and negative polarity. A contact
point between particle and coating, the conductivity of the coating and the effective conductivity of the
SF6 gas play important roles in particle lift-off without vibrations, because these characteristics dominate
the charging-up of the particle under normal operating and dielectric test condition in DC GIS where
the electric field formed at the triple junction is lower than the partial discharge inception field strength.
Based on an investigation of contact area measurement, the contact area is extremely small, thus,
charging of the particle through either the coating or the SF 6 gas is likely to be insufficient to allow
particle lift-off. It might be effective even after the coating polarizes to a steady state condition [35].
Figure 6.2-2 shows the particle lift-off characteristics under the influence of mechanical shock. The
relationship between acceleration and lift-off probability for different coating materials at applied DC
voltage with positive and negative polarity is presented. The particles lifted off when the acceleration
exceeded 20 g, particles at DC voltage with negative polarity lifted off more easily than those with
positive polarity, and particles with a higher DC voltage of 1.0 p.u. lifted off more easily than those of
0.9 p.u.. As a result, the probability of particle lift-off with the new coating at 1.0 p.u. is the same value
as on a conventional coating at 0.9 p.u., meaning that the electric field strength to achieve particle lift-
off was increased by about 10% [35][36].
Figure 6.2-2: Particle lift-off characteristics for different coatings with vibrations at DC voltage
with positive (left) and negative (right) polarity [35]
6.2.1.2 Particle traps

Beside insulating coatings another mitigation measure is to install particle traps at the HV and ground
side, to deactivate particles [40].
The particle trap has to be designed in such a way that the particle is captured by it, but the field
strength has to be sufficiently low to prevent particles from escaping from it. To increase the trap
efficiency, it is important to guide particles into the particle trap. The effectiveness of the
countermeasure should be proven. Figure 6.2-4 shows examples of two types of particle traps, one on
the HV side (conductor) and one on the GND-enclosure side (enclosure).The former is placed on the
HV conductor adjacent to a spacer and the latter is located on the GND enclosure just underneath the
HV trap. The HV side trap is particularly aimed at firefly phenomena. In the case under consideration,
the duration of firefly phenomena is very short under normal operating voltage (probability of duration
of 1 second or more is below 10%) [35].
101
Figure 6.2-4: Mitigation measures for improving insulation performance against metallic
particles [35][36]
The effectiveness of the developed particle trap was investigated with a prototype 250 kV DC-GIS [36].
The particle positions before and after the experiment are shown in Figure 6.2-3. In this experiment,
strong acceleration was applied to the particle in order to have the particle lift-off forcibly. It was found
that the number of particles adhering to the epoxy spacer was zero, and many particles were trapped
at the GND side. Particles were found that were not trapped at the GND side; however, it is assumed
that particles outside the trap are also eventually trapped at the GND side.
Figure 6.2-3: Particle before and after experiment; particle dimension: 3 mm length, 0.25 mm
diameter [7][36]
Another particle trap solution is shown in Figure 6.2-6 [41], in which particles should be trapped at their
highest probability density. For positive polarity that is the enclosure and for negative polarity the
conductor. Therefore, a particle trap is integrated in the lower side of the conductor (Figure 6.2-6a) and
the bottom of the enclosure (Figure 6.2-6b).
102
a) b)
Figure 6.2-6: Examples of particle traps [41]

a) Particle trap integrated in the HV conductor
b) Particle trap with multiple notches at the bottom of the enclosure
To prevent already trapped particles from being re-activated, the field within the particle trap must be
sufficiently low. Tests have shown that at negative voltage and applied superimposed impulse voltage,
particles already trapped could be re-activated again. The same effect can also be triggered by a polarity
reversal from positive to negative voltage, but not vice versa [42].
Figure 6.2-5: Particle coming out of the particle trap at polarity reversal [42]
Figure 6.2-5 shows particles escaping from the wings as well as from the center notch of a particle trap
positioned on the enclosure. To reduce the testing expenditure the effect was triggered by a polarity
reversal from positive to negative polarity. To exclude this effect, an adequate relation between the
height and width of the notches has to be found. Furthermore, the electric field distribution at the
surface of the particle trap should be equalized to avoid areas of increased field strength where particles
could remain [42].
In order that a particle can move deep into the low field area under the wing of a particle trap positioned
on the enclosure, it must be ensured that the slope at the opening is steep enough. This can be done,
if the enclosure diameter D and the particle trap width B1 is in a certain ratio, as it can be seen in Figure
6.2-7a. To be efficient, particle traps deployed on the inner conductor should be positioned at an angle
of 90 degrees between the lines W1 and W2 from the center point M, as shown in Figure 6.2-7b.
a) b)
a = D/B1 with 2 ≤ a ≤ 13 Angle between line W1

and W2 = 90°
Figure 6.2-7: Basic design criteria for particle trap under DC voltage conditions [42]
a) Enclosure positioned particle trap b) Conductor positioned particle trap
103
Based on this basic knowledge, particle traps positioned on the enclosure as well as at the inner
conductor were developed and their efficiency was verified in a DC GIL test set-up. During all tests with
positive polarity, at which particle standing motion at the bottom of the enclosure or bouncing motion
between enclosure and conductor may occur, no permanent standing motion of particles on the surface
of the particle trap positioned on the enclosure was observed. In the case of bouncing motion, the
particle moves up and down in the gas gap between enclosure and conductor. This movement causes
the risk of a flashover. Therefore, the particle should be captured as fast as possible to reduce the
flashover probability. With the enclosure positioned particle trap under investigation, an average
movement time of 0.65 s was obtained, which means that the particle was captured rather fast.
For negative polarity, a particle trap positioned at the conductor was designed. In contrast to the positive
polarity, at negative polarity particles perform a standing motion on the surface of the conductor rather
than a bouncing motion. This leads to a longer time span of trapping, which is not really an issue
because the breakdown probability at negative voltage is far lower than at positive voltage.
Furthermore, the trapping rate was determined by visual inspection after the tests. For the particle
trap positioned on the enclosure as well as positioned at the conductor a trapping rate of 95% was
observed [42].
6.2.2 Detection and identification by analysis of PD data

Much experience was gathered with PD testing of gas-insulated AC systems. Therefore, it is
recommended to apply AC voltage for PD measurements at routine test and onsite tests. PD
measurements under DC voltage are of interest, e.g. after commissioning before putting into service or
during service or when checking the effectiveness of the above mentioned countermeasures [43].
6.2.2.1 Principal methods

As no phase correlation exists at DC voltage, pulse magnitude and pulse sequence have to be applied
for characterisation of typical PD defects.
Ai Ai+1
ti ti+1
ti ti+1
𝐴𝑖+1 = 𝑓(𝐴𝑖 ) (a) ∆𝑡𝑖+1 = 𝑓(∆𝑡𝑖 ) (b)
∆𝐴𝑖 = 𝑓(∆𝑡𝑖 ) (c) ∆𝐴𝑖 = 𝑓(𝐴𝑖 ) (d)
∆𝐴𝑖+1 = 𝑓(∆𝐴𝑖 ) (e) ∆𝑡𝑖 = 𝑓(∆𝐴𝑖 ) (f)
Figure 6.2-8: Defect identification by pulse sequence analysis (PSA) (according to [46][50][51])
Different methods can be used for presentation and analysis of PD data recorded at DC voltage. One
method of representation of PD data is the density histogram of the PD magnitude [44]. Another method
analyses the magnitudes of the consecutive pulses by representing the average magnitude of the
successor discharge as a function of the discharge magnitude, thus taking into account the different
memory effects of the various PD defects [45].Other methods apply statistical distributions of basic
quantities for defect classification, such as PD magnitude Ai and Ai+1 of PD pulse i and subsequent pulse
i+1 or differences of PD magnitude ∆Ai and ∆Ai+1 between subsequent pulses respectively, and the time
difference ∆ti and ∆ti+1 between subsequent pulses (Figure 6.2-8) [46][50][51]. The objective is to
develop characteristic PD patterns under DC stress for various defects by pulse sequence analysis (PSA).
104
The PSA data can be recorded by either conventional or UHF method [48][51]. Recordings with the
conventional method normally follow the notations Qi, Qi+1, ∆Qi, ∆Qi+1 instead of Ai, Ai+1, ∆Ai, ∆Ai+1.
6.2.2.2 Pulse sequence analysis of mobile particles

One approach is the so called NoDi* analysis [46][49][50], which is an improved version of the modified
Chaotic Analysis of PD (CAPD analysis), which is described in more detail in [47]. The NoDi* analysis
applies three typical patterns for defect identification and assessment: NoDi* Q pattern, NoDi*T pattern
and NoDi*QT pattern.
Examples of applying NoDi* analysis to the most common particle defects in gas-insulated DC systems
are presented in Figure 6.2-9 [50]. It can be seen that the NoDi* technique can differentiate between
bouncing particles and particles in firefly mode. Further examples of other PD defects are given in
Appendix B.
Figure 6.2-9: Typical NoDi*-pattern for PD defects caused by particles according to [50]
a) Bouncing particles b) Particles in firefly mode
105
Another approach uses the quantities A i+1 related to A i and ti related to A i for PSA [51][52].
Corresponding PSA patterns acquired from a wire-shaped particle in different modes of firefly motion
are presented in Figure 6.2-10. Figure 6.2-10a shows a PSA pattern during firefly mode with large
jumping amplitudes, Figure 6.2-10b with small jumping amplitudes and Figure 6.2-8c during levitating
firefly. From Figure 6.2-10 it is evident that identification and distinction of firefly particle motion by the
PSA method applied is possible.
a) Firefly motion with large jumping amplitude
b) Firefly motion with small jumping amplitudes
c) Levitating firefly motion
Figure 6.2-10: PSA pattern of a wire-shaped particle during different modes of firefly motion
(according to [51])
In other investigations of typical PD defects in a gas-insulated DC arrangement by means of the UHF

method the before mentioned approaches were modified [53]. Using further PD quantities and a
logarithmic scaling for clustering and normalizing the time axis a better characterisation of the defect in
question was achieved. The modified approach makes use of all PD quantities presented in Figure 6.2-8.
Patterns of typical PD defects are presented in Appendix B1 [53]. This method was applied for defect
identification at pre-tests in the frame of the prototype installation test of a DC GIL [54]. The PSA
pattern acquired at -660 kV and -550 kV for 1 min are presented in Figure 6.2-11, top. The reference
signals obtained during the pre-investigations are shown at the bottom of Figure 6.2-11. A comparison
of the pattern acquired on-site with the reference signals shows a good correspondence with reference
patterns caused by mobile particles at the inner conductor (firefly mode). In any case it distinctly differs
from a reference pattern caused by a 5 mm protrusion.
106
Figure 6.2-11: PSA patterns recorded on-site and reference patterns obtained in the
laboratory [54]
107
Lifetime tests of insulating material

The ageing of bulk epoxy material is an important aspect for application in AC gas-insulated systems,
to be considered for the design of reliable insulators. Experience in long-term testing has been gained
in several tests worldwide [55] to support the estimation of field stress limits for safe insulators. While
the typical short-time breakdown strength of mineral filled epoxy material is in the range from 30 kV/mm
up to 50 kV/mm (RMS values), only 10% of these values are applied for GIS long-term operation to
ensure long-term reliability [56]. Today’s experiences with AC gas-insulated systems in service confirm
the outstanding reliability of the insulation components [57]. Voltage endurance graphs describe the
relation of the electric field strength E to time with the failure probability as parameter and are
approximated with a large number of test results. Figure 6.3-1 gives an example of a typical curve for
epoxy materials under AC stress [58]. Considering the mandatory high reliability of GIS, very low levels
of failure probabilities, e.g. 0.01% after 50 years, are aimed.
E / E0 years
1 5 10 50
10.0
n = 12
(1)
10 %
(2)
0.01 %
1.0
max. service stress
(mineralic filled epoxies)
0.1
2 3 4 5 6
10
100 1 10
000 1010
000 10010
000 10000
1 000
time / hours
Figure 6.3-1: Voltage endurance graph of epoxy insulators under AC stress [58]
Much less long-term service experience with epoxy insulators in DC applications is available today. This
means that reliable insulator design without any critical degradation must be estimated based on
knowledge about potential ageing processes and testing experience, at least in comparison to the known
AC conditions.
The electrical ageing of epoxy material under DC stress tends to be slower than under AC stress. This
effect is reported [59] to be based on a typically much lower PD repetition rate at DC voltage, compared
to AC voltage. At AC voltage (50/60 Hz), PD events can recur every 8,3/10 ms under the same field
conditions. At DC voltage, the very high resistivity of typical insulating materials strongly increases the
time until the same field conditions were achieved after a PD event.
Analogous behaviour has been observed in experiments to investigate the propagation of electrical trees
in strong inhomogeneous fields [60]. Tree growth under DC stress has been found to require much
higher electric field strengths for inception and growth than at AC voltage. Strong polarity dependence
was found in the experiments. While tree growth under positive polarity led to runaway and breakdown
under the specific experimental conditions, under negative polarity tree propagation was self-limiting.
Tree growth and the observed polarity dependencies were explained by space charge effects in the
epoxy material.
Similar ageing behaviour was observed for epoxy-mica based insulated Roebel bars, as applied in
rotating machines [61]. Voltage-endurance tests were performed on twelve 13.8 kV epoxy mica-based
insulation stator bars, while 50% were tested at 35 kV AC and 50% at 59.5 kV DC (1.7 x 35 kV). All
bars subjected to AC voltage failed between 25 h and 150 h, while no failure occurred on bars subjected
to DC voltage, even after 2086 h. Afterwards the DC pre-stressed bars were also tested at DC voltage,
with average times to failure about 50% longer than without pre-stress. The authors concluded that no
significant degradation of the insulating material at DC voltage was found.
From the macroscopic point of view, the effects described may lead to decelerated ageing at DC voltage,
indicated by a tendency towards higher voltage endurance coefficients n ≥ 20 [44] as shown in Figure
6.3-2. A typical value for AC voltage is n = 15 [57].
108
Figure 6.3-2: Voltage endurance graph of epoxy insulators under DC stress [57]
With insulator samples including voids, other authors [62] found ageing characteristics at DC stress
comparable to AC stress (‘bathtub curve’), with an n value in the range of 9…12.
Based on the test results shown in Figure 6.3-2, the test conditions were chosen to prove the reliability
of a Japanese 500 kV DC GIS: A test voltage level of 625 kV DC was applied for one year [44] to verify
a service life of 30 years at 500 kV. Figure 6.3-3 shows the test setup. Starting with a voltage of -625 kV,
a polarity reversal test was carried out after 6 months, followed by a further six-month period at +625 kV
and a further polarity reversal. Thus, both the long-term and the polarity reversal tests were successfully
concluded.
Figure 6.3-3: 500 kV DC GIS long-term test setup [41]
This type of DC GIS, consisting of disconnectors and one bus bar, is in service at Anan Converter station
of Shikoku Electric Power since the year 2000, at an operating voltage of ±250 kV [44].
A GIS busbar with a DC voltage of ±150 kV with superimposed harmonics is in operation since
1983/1987 in Gotland (Sweden). The gas-insulated connections between the converter transformer and
the valve hall are as shown in the left of Figure 6.3-4. Subsequently, a ± 500 kV HVDC-GIS was
developed in 1986 [63]. From 1990 until 1995, long-term tests at BPA’s test center were carried out as
shown in Figure 6.3-4 center and right [64]. The project involved energizing a test pole containing the
elements of a SF6-insulated station for a duration of approximately 2 years. The elements of the test
pole consisted of GIS spacers, SF6-air bushings, air-insulated arrester, SF6-insulated arrester, and SF6-
oil bushing. The primary concern was to assess the dielectric performance of the components. This
project was performed using a combination of 550 kV AC equipment and 800 kV AC equipment. All
equipment was modified for DC application by installing special GIS insulators. The long-term tests were
successfully completed in 1996.
109
Figure 6.3-4: DC busbar in Gotland 2, Svenska Kraftnät, transformer to valve connection

(left) and long-term tests at BPA’s test center (center) and test set-up (right) [63][64]
Further test results on short-time breakdown strength and long-term testing of typical epoxy insulators
for gas-insulated AC and DC systems under increased electrical stress were reported in [65][66]. The
short-time breakdown strength was used as a first rough indicator to compare the DC voltage values
with the known data for AC voltage. A test setup as it is shown in Figure 6.3-5 was applied; 34 material
samples were tested until breakdown (5 kV-steps, 1 min at each step). The short-time breakdown
strength of the samples under test at DC was more than 250%, compared to the RMS value of AC
(Figure 6.3-5), results which were in line with other investigations [67].
Figure 6.3-5: Short-time breakdown tests at AC and DC voltage; test setup and test results [65]
Further long-term tests were performed in a GIS-comparable test setup (Figure 6.3-6) with
approximately 130 insulators under SF6 atmosphere, in outdoor installation exposed to sun and ambient
temperature, ranging from -20 °C … +50 °C.
Figure 6.3-6: Long-term test setup to investigate the ageing behaviour under high DC voltage [65]
For this type of test no temperature gradient was applied; in the specific case of the insulators under
test, this is the condition with the highest electric field strength inside the epoxy material, as qualitatively
shown in Figure 6.3-7.
110
Figure 6.3-7: Electric field distribution of a conical insulator at DC voltage without (left) and with
(right) a temperature gradient between conductor and enclosure [65]
Different types of GIS insulators, made of different epoxy types, were investigated. To obtain a reliable
assessment of manufacturing processes, all tests were performed on real-size insulators. An overview
is shown in Table 6.3-1. The test voltage was 500 kV DC, at both polarities, applied in cycles. Compared
to DC GIS service conditions, the electric field strength inside the epoxy material was increased up to a
factor of 5.4.
At the time of publication of [66], up to 41600 testing hours had been achieved for a large number of
insulators. No puncture occurred even for the highly stressed smaller sized insulators. Details can be
found in Table 6.3-1.
Table 6.3-1: Results of DC long-term ageing test with ±500 kV DC [66]
Insulator type pcs Electric stress* Time at ±500 kV Result
Cylindrical type (small epoxy volume) 32 2.8 41600 h (4.7 a) No puncture
Cylindrical type (medium epoxy volume) 51 2.8 41600 h (4.7 a) No puncture
Cylindrical type (large epoxy volume) 13 1.0 29800 h (3.4 a) No puncture
Cylindrical type (small, extra high stress) 30 5.4 9700 h (1.1 a) No puncture
DC GIS insulator type 8 1.0 30400 h (3.5 a) No puncture
*- normalized to DC GIS service stress
Small insulators of cylindrical type exhibit an especially high withstand field strength at DC voltage, also
over the long-term. The comparison between voltage endurance curves at AC voltage (RMS value) and
DC voltage is shown in
Figure 6.3-8, based on the assumption of a factor n=12. As there was no puncture at the time of
publication, the test results are indicated as ‘longer than’ and for the moment no distinct factor n could
be determined based on the test results thus far. Nevertheless, other publications indicate higher n
factors, e.g. n ≥ 20 [44], supporting the conclusion that ageing performance at DC voltage is less critical
than when compared to AC voltage at the same dielectric stress.
Figure 6.3-8: Voltage endurance graph of different insulator types under AC and DC stress with
10% failure probability [66]
(Note: Test samples under DC voltage without breakdown, indicated by the arrows; graph
represents worst case scenario at current status of continued long-term test; factor n assumed to
be as at AC voltage)
111
Prototype installation test

Up to now, only a few gas-insulated HVDC systems are in operation worldwide [44]. In consequence,
little service experience or information about the long-term performance of this technology is available
until now. Before installation in the grid, customers might desire proof of a stable long-term performance
under DC service conditions of the total gas-insulated system, in order to ensure the technology
readiness level for real service conditions (see section 6.1.7). This leads to the general question whether
long-term tests on gas-insulated HVDC systems are necessary. Especially GIL assemblies require proof
of long-term reliability under real service conditions, similar to other underground line systems such as
cables, on which prequalification tests are usually performed [72], [73].
The phrase “prototype installation test” means, that a first installation of a new gas-insulated system is
subject to a long-term test. The purpose of such prototype installation testing is to provide a level of
confidence for first pilot customer-projects, that the gas-insulated system can be erected and operated
according to the ratings and that a stable long-term performance under real service condition is ensured.
The test shall demonstrate the required technology readiness level. The overall assembling process of
the test arrangement shall be comparable to later customer projects. That means that the pre-
assembled modules and sub-modules built in the factory are assembled at site to achieve the complete
overall arrangement. The test arrangement shall contain all typical components and the size of the test
arrangement shall be representative for later customer projects. During the ‘prototype installation test
lasting for one year, the dielectric DC stress and overvoltage stress under real service conditions are
reproduced, thus the installation is tested in long-term operation similar to its later operation in the grid.
6.4.1 Necessity of long-term tests on gas-insulated hvdc systems

When considering the necessity of long-term tests on gas-insulated DC systems, in particular GIL, many
pro and con arguments can be cited [1].
Arguments against (con) long-term testing:
 Gas insulated systems mainly contain SF6 or N2/SF6 gas mixture as insulating medium. This
medium does not show any known ageing phenomena [26].
 The insulators are well proven and their long-term reliability is well known from long-term
investigations. The lifetime of insulators amounts to more than 50 years. Furthermore, each
insulating component is tested thoroughly in course of the quality assurance procedure.
 Gas-insulated HVDC systems are type tested in a sophisticated and long-lasting procedure
considering all critical stresses to be expected during service, e. g. the charging process of the
insulating components and stresses by superimposed impulse voltages.
Arguments for (pro) long-term testing:
 The DC and overvoltage long-term performance of the insulators in combination with the gas-
insulated system has to be proven before the installation in the grid. Based on this argument,
tests on larger scales than type tests are required for such new technologies and before
committing to large investments in future grids.
 Some critical phenomena in gas-insulated HVDC systems such as e.g. mobile particles and
insulator surface charging effects, can only be studied adequately during long-term tests. The
gas-insulated system needs to operate reliably during DC long-term and overvoltage stress,
even if these phenomena occur.
 The dielectric behaviour of the gas-insulated HVDC system following realistic manufacturing
and assembling conditions might differ with the type tests done in laboratory conditions. The
robustness and stability of the design against typical defects can be proven more realistically
with first prototype installations.
 DC cables are subjected to a long-term test to prove the long-term performance.
Comprehensive recommendations are presented in CIGRE Brochure 496 [72]. If DC GIL is
considered to be an alternative to DC cables, the long-term performance of those systems has
to be proven as well.
 AC GIL was also subjected to extensive long-term tests before installation in the EHV grid.
Different tests on prototype installations are reported in literature, e. g. [74], [76]. Additionally,
information for long-term test on buried AC GIL is given in IEC 62271-204 Annex C [77].
112
In conclusion, a prototype installation test is useful. The test is non-mandatory, since the type tests
already prove the basic functionality of the gas-insulated HVDC system. But to ensure the overall
functionality of gas-insulated DC systems erected and operated under real service conditions, a long-
term test is helpful. The most convincing pro-argument is the lack of experience with this new
technology. Therefore, it is urgently recommended to collect more experience, before the first
installation of new gas-insulated DC systems is put into service. Customers should expect that gas-
insulated HVDC systems show the same reliable performance as HVAC systems.
6.4.2 Basic test scenario

The prototype installation test should be carried out after successfully passing all required type tests.
The main intention of this long-term test for gas-insulated HVDC systems is to confirm the reliability
under real service conditions. Therefore, all major modules of the gas-insulated HVDC system should
be tested and be installed using the same installation procedure as for future customer projects. The
test procedure is described in detail in chapter 7.9.
For gas-insulated switchgear, the focus of the test is on the dielectric performance. Besides the dielectric
stress, the maximum thermal and mechanical stress should be applied to the system (e.g. movements
of sliding contact systems due to heating and cooling phases, behaviour of switches).
GIL test set-ups must be of sufficient length, to enable neglecting cooling effects at the test set-up’s
boundaries and to adequately test the thermo-mechanical behaviour. In the case of GIL, the system
will typically be installed above ground on gantries, directly buried, or in tunnels. The maximum thermo-
mechanical stress arises for directly buried GIL. Additionally to the test procedure described in chapter
7.9, the values of static and sliding friction of the tubes in the soil and the forces and movements on
the angle modules should be determined by measurements for the special case of directly buried
systems [78].
Gas-insulated systems in the grid are often fitted with PD measurement and monitoring systems.
Therefore, these systems should preferably be installed during the prototype installation test as well, to
prove their functionality and to monitor the GIS/GIL condition. The knowledge gained during the test
would improve the later evaluation and interpretation of PD signals during operation.
Basically, the test should consist of 3 phases:
 Pre-test of the system
 Long-term test
 Condition check
Before dielectric testing, thermo-mechanical pre-tests should be carried out to ensure the mechanical
integrity and current carrying capability of the system. Subsequently, the dielectric integrity of the
installation is tested. In case of a failure, the test arrangement has to be checked and the failure has to
be localized. The pre-test of the system shall define the starting conditions of the gas-insulated system
and prove, that the equipment is in sound condition before the test. The long-term test represents the
actual in-service stress the equipment will undergo. During this long-term period the condition of the
equipment might change. Therefore, a condition check of the equipment should be performed after the
test to ensure that the equipment is still able to withstand the service stresses.
6.4.3 Basic test level considerations

6.4.3.1 DC voltage level
The long-term test is to be considered as an accelerated procedure. Therefore, a test at rated DC
voltage UrDC is not reasonable. Taking into account a lifetime exponent of n=12 for the gas-insulated
system determined by the solid insulation, a test voltage of 1.4 UrDC seems adequate to confirm a
lifetime of 50 years. On the other hand, a test voltage significantly higher than the rated voltage could
lead to a field strength at the insulators higher than in practice, probably affecting the charge
accumulation at the insulator and thus the charging time. Again, the main purpose of the test is to
confirm the capability of the system to withstand the charging processes and stresses due to the
superimposed voltage and not to prove ageing performance. Furthermore, as already discussed in
section 6.1.6 and 6.3, no critical ageing of the system is be assumed. In conclusion, a test voltage of
1.2 UrDC is a compromise which can largely prevent charging processes not occurring in practice [1]
113
Low conductive materials hardly reach their DC steady state during practical testing times (refer to
section 6.4.4.1). With slightly higher testing voltages, the DC steady state for rated voltage will be
reached faster. This results in a more reasonable testing strategy.
6.4.3.2 Current level
Generally the same considerations are valid for the prototype installation test as for the insulation system
test (refer to section 6.1.5). In addition, it has to be considered, that prototype installation test
assemblies will usually be much larger than insulation system test assemblies.
The current causes a heating of the insulating system. This process has an essential impact on the
production of charge carriers and on the charging process in general. Therefore, a heating method
should be implemented resulting in a heating comparable to the heating at rated DC current. The
heating method used shall be conductor heating at the current carrying conductor (see section 6.1.5).
In general, three current heating options are possible to test the operation of the HVDC equipment in
the laboratory:
1. AC current heating with the rated DC current value
2. AC current heating with a representative AC current equivalent to the rated DC current stress
3. DC current heating with rated DC current
Option 1 means that, for example, a test assembly with 4000 A DC rated current will be tested with
4000 A AC r.m.s in the laboratory. This will result in higher thermal stresses, since the skin effect
increases the losses in the assembly. The effect will be higher at 60 Hz compared to heating with 50 Hz.
Thermal stresses and electrical stresses due to space charges inside the equipment will be higher
compared to operation with rated DC current. Since this heating method places higher stresses on the
equipment, it can be considered as valid for testing.
Option 2 requires calculations and comparisons between DC and AC current temperature rise tests, i.e.
a calibration procedure for the AC current heating needs to be defined. Since the heating mainly
influences the charge distribution at the insulator, the temperature differences across the insulators
reached during testing should be comparable to those in service conditions. To fulfil this requirement
for the test assembly, the following method may be used [16]:
 Determination of the DC resistance RDC of the test assembly. RDC is the DC resistance of the
rated current carrying assembly at cold condition1
 Determination of the AC resistance RAC of the test assembly (50 Hz or 60 Hz). RAC is the AC
resistance of the rated current carrying assembly under test at cold conditions
 Calculation of the representative AC current IAC for the DC current IDC with the approach
according to IEC/IEEE 65700-19-03 [15]
The overall watt losses in the test object will be equal for this approach ( IAC² RAC = IDC² RDC).
Option 1 and Option 2 might result in return currents on the enclosure, if the enclosure forms a closed
current loop. This issue was discussed in section 6.1.5, concluding to be neglectable for most gas-
insulated HVDC assemblies.
Option 3 will heat the inner conductor corresponding to the later operation in the HVDC network. Since
this leads to the same thermal stresses as in practice, this heating method can also be considered for
testing. Option 3 is preferred, because it produces stresses and conditions closest to the normal service.
Gas-insulated HVDC systems can be subject to significant harmonic current content. This effect shall be
modelled in the laboratory by increasing the heating current (either AC or DC current). The total
amplitude of the test current shall produce the same total watt losses calculated for the specified
harmonic current spectrum. The calculation of the equivalent DC and AC current is given in IEC/IEEE
65700-19-03 [15] (refer to section 6.1.5 and chapter 7).
1
It is much harder to measure the AC and DC resistance at high load conditions than in zero load, i. e. cold conditions. Since
the representative current is calculated by the ratio of RAC/RDC, the effect of the increase of the AC and DC resistance due to
increased temperature will be mostly compensated, as both follow mainly the same temperature coefficient. Therefore it is
sufficient, if the resistance in cold condition is taken for calculation of the equivalent current [16].
114
6.4.3.3 Superimposed LI and SI voltage tests

The test object shall be subjected to superimposed impulse voltages. These tests simulate the
overvoltage stresses during service. Therefore, the superimposed voltage stress is applied directly after
DC voltage and current cycles.
Overvoltages are caused by line to ground faults as well as converter faults – represented by switching
impulse voltages – or by lightning strikes, represented by lightning impulse voltages. When determing
the magnitude of the superimposed impulse voltages, some differences between the type test and the
prototype installation test with regard to statistical as well as insulation co-ordination considerations
have to be considered. [1]
Statistical considerations
The type test is conducted with rated voltage on a test arrangement consisting of about five insulators,
and three impulses of each polarity are applied. The prototype installation test is carried out on a test
object potentially comprising of many more insulators and subjected to many more impulses depending
on the number of cycles. As the breakdown voltage is related to the number of insulators (volume
effect) and to the number of impulses, the magnitude of the latter has to be adopted [80], [81].
Depending on the number of insulators and the number of impulses applied, the impulse voltage would
have to be reduced to about 90% of the rated SI or LI voltage [1]. Details are presented in Appendix
A1 [1].
Insulation co-ordination considerations
If the installation is adequately designed according to the insulation co-ordination procedure in
IEC 60071-1 [83], no overvoltage exceeding the co-ordination withstand voltage Ucw shall occur. Taking
into account a safety factor ks, the required co-ordination withstand voltage, which is lower than or
equal to the rated voltage, is determined. According to [80] a safety factor ks = 1.15 is recommended
for internal (non-self-restoring) insulation. However, for gas-insulated systems a higher safety factor is
reasonable. In practice, mostly a safety factor of 1.25 is typically applied [84].
As a result, to avoid stresses exceeding those in practice, the magnitude of the superimposed impulse
voltage applied to the test object during the prototype installation test shall be reduced to 80 % of the
rated LI and SI withstand voltage levels. An impulse voltage test level of 80 % is also considered during
the commissioning tests of gas-insulated systems on-site [68]. Furthermore, the superimposed voltage
test during the prototype installation test shall be performed at rated DC voltage.
6.4.3.4 Superimposed voltage testing on long test arrangements
The total test set-up for the prototype installation test may result in larger test arrangements. Assuming
a testing length for prototype installation tests on DC GIL assemblies, the total length of the test loop
can be estimated to be in the order of at least 100 m [85]. This assumption corresponds to pre-
qualification tests on cables (IEC 62895). GIS assemblies will also result in larger loops for the prototype
installation test. Literature shows prototype installation test GIS assemblies with roughly 40 m in loop
length [88]. In both cases conventional lightning impulse (LI) testing with 1.2 μs front-time is technically
difficult. Travelling wave effects through the testing loop will occur due to the length, as well as a high
capacitance of the test object of e.g. 5-10 nF, especially for GIL assemblies. In conclusion, larger front-
times than 1.2 μs have to be considered for prototype installation test arrangements.
Travelling wave effects occur in the testing loop during lightning impulse voltage testing. Taking 100 m
for the length of the testing loop and a velocity of c 0=300 m/μs, the travel time is 0.33 μs. Thus the
travel time is in the range of the front time of 1.2 μs lightning impulse voltage. Figure 6.4.1 shows
simulations of this effect for a typical GIL assembly of 100 m length [85]. The general behaviour
depends on the loop arrangement; in closed loops the travelling waves will split while at open loops the
wave will travel up to the end of the line.
Such travelling wave effects result in undefined overvoltages in the test set-up. Furthermore, oscillations
occur due to these travelling wave effects. Further increasing the length of the test loop further
increases both problems. Additionally, a higher capacitance of the test object requires higher capacity
values in test generators, e.g. a 10 nF test object capacitance would require approximately 180 kJ
charging energy to reach 500 kV rated LI and SI voltage levels [85].
Impulse voltage testing on long assemblies is performed in practice with oscillating impulse voltage.
Usually, these generators are used for on-site testing after the installation of the equipment. Oscillating
impulse voltage generators are smaller and allow higher tolerances for the time parameters of the test
115
voltage [86]. Mobile oscillating impulse voltage generators are easier to transport and therefore allow
easier testing procedures. In conclusion, utilisation of oscillating impulse voltage testing solves many
problems for the prototype installation test.
(a) - closed loop (b) - open loop

Figure 6.4.1: Simulation of Travelling wave effects on 100 m typical GIL assembly with 1.2/50
lightning impulse voltage
Since the setting for a prototype installation test is similar to on-site testing and the test object has
already passed the type tests before, it is acceptable to perform the superimposed voltage tests during
the prototype installation test using oscillating impulse voltage according to IEC 60060-3.
IEC 60060-3 specifies higher tolerances for the time parameters T1 and T2 compared to IEC 60060-1.
For example, standard LI has a maximum value of T1 = 1.56 μs and T2 = 60 μs, whereas oscillating
lightning impulse voltage (OLI) allows maximum T1 = 20 μs and T2 = 100 μs. Testing with different
time parameters may influence the flashover probability of the insulating system. Considerations are
given in Appendix A2. It can be concluded, that the influence of the different time parameters is low.
Since the magnitude during superimposed voltage testing is reduced to 80% (refer to section 6.4.3.3)
and especially the flashover voltage of the insulators is not affected (refer Appendix A2), further
adjustments of the test voltage owing to the different time parameters for OLI and OSI are not
considered. In conclusion, it is acceptable to apply the time parameter tolerances during superimposed
testing according to the specification of the oscillating impulse voltage (IEC 60060-3) for both testing
with LI / SI and OLI / OSI.
6.4.4 Basic consideration for test sequence

6.4.4.1 High Load (HL) and Zero Load (ZL) cycles
By means of the prototype installation test, more service experience shall be gained. A minimum test
duration of one year is reasonable to achieve this goal, to be able to test several operation cycles.
During these cycles real service conditions shall be considered to stress the overall insulation system in
ways comparable to actual operation. The long-term performance of the DC insulators as well as the
gaseous insulation, especially with regards to particles, is of major interest. The focus of the test cycles
should be to simulate the most critical practical situations of the HVDC equipment. Chapter 4 as well as
section 6.1 explain, that the most critical electric field stresses occur at the beginning of the test (AC
field stress at t = 0) and after the DC steady state is reached with maximum temperature difference
across the insulators (DC field stress at t >> 0). The electric field stress of intermediate states is covered
by these described cases. Intermediate stresses, for example during load cycles with time depending
testing current, are not of interest, since they do not represent any critical status for the HVDC
equipment. The focus of the prototype installation test should be to test the most critical electrical field
stress conditions expected in service. This can be achieved with sufficiently long tests at DC voltage and
with test currents corresponding to high load (HL), in order to test the DC steady state.
The AC field distribution usually occurs at commissioning, pre-tests and directly after switching on the
current and voltage, presuming that all charges accumulated at the insulator remaining from the
previous cycle have disappeared. Applying DC voltage without current heating (ZL) is the nearest
practical approximation of the AC status (see Figure 6.1-3). Therefore, ZL cycles are in general of
116
interest during the prototype installation test. ZL at the HVDC equipment also occurs in practice. A very
common stress for gas-insulated systems is the low load condition. The first case occurs when the
current flowing in the system is very low, and the second is when the gas-insulated system has much
higher current ratings than other components e.g. cables. Therefore, stresses at the gas-insulated
system with currents smaller than the nominal current rating are comparable to the ZL stress.
Furthermore, other situations are possible. For example, the current path may be disconnected, but the
equipment is left running under DC voltage. In conclusion, one ZL cycle should be integrated in the
prototype installation test.
After the commissioning phase and before the long-term cycle, DC voltage and current are applied. At
least one load cycle with high load and no-load phases should be carried out. By doing this, thermal
expansion of the modules, sliding contacts and compensators of GIS or GIL are initiated. Hence, thermal
and mechanical stress is tested with this test procedure. In addition to voltage and current
measurements, it is advisable to measure temperatures, mechanical forces and displacements of sliding
components and compensating devices during the test procedure, especially for GIL applications.
6.4.4.2 Cycle duration

After application of DC voltage, the low effective DC conductivity of the usually used epoxy composite
solid insulation determines the transition from a capacitive to a resistive field distribution in the system.
The transition to a DC steady state field distribution takes from hours to months for epoxy insulators,
depending on the permittivity and conductivity of the material and the temperature. Temperature
gradients primarily define the temperature dependence of the DC conductivity, where field enhancement
and space charge accumulation occur in the solid, but also shapes the capture volume for ions near the
solid-gas interface. Moreover, the surface electric field strength can reach its minimum or maximum
value during the transition between voltage switch-on and DC steady state. This, associated with the
variety of possible operating conditions, requires long-term DC insulation system tests [79]. A test
duration of 30 days for each DC step is an acceptable compromise to realize almost DC steady state
conditions at high load and no load.
6.4.4.3 Superimposed voltage testing

For simulation of overvoltages, e.g. caused by lightning strikes, earth faults or converter faults, LI and
SI voltage superimposed on DC voltage are applied. The objective of corresponding tests during the
prototype installation test is to prove the withstand cababiliy against those streeses under real service
conditions. The actual long-term test with DC voltage starts with a first test sequence. After that, the
test object shall always be tested with superimposed voltage. Preferably no interruption between the
long-term DC stress and the superimposed voltage stress should occur. Therefore, depending on the
test voltage generators, it can be reasonable to perform SI and LI tests separately, e.g. running the SI
test following one long-term cycle, then running the LI test following the next cycle, or vice versa.
Furthermore, the mounting time for changing the generator modules often requires switching off the
DC voltage source. Especially for OLI and OSI generators (refer section 6.4.3.4) the interruption time
will be longer because more generator elements have to be changed. Thus, these longer pauses can be
avoided, if the LI and SI test is carried out in separate cycles.
If the long-term test has to be interrupted in order to change the generator from LI to SI, the procedure
according to section 6.4.5 and chapter 8.2 has to be followed. This may occur if the LI and SI will not
be tested separately, but both impulse shapes are tested directly after one long-term cycle. Considering
the procedure of section 6.4.5 and 8.2 testing of SI and LI in separate cycles as well as after one cycle
are technically equivalent.
6.4.5 The influence of test interruptions on the DC insulation system

6.4.5.1 Voltage source interruptions
Interruption may occur during the prototype installation test. Especially outages of the DC voltage
source are of major interest, because this affects the insulation system. The following interruption
scenarios may occur:
117
1. Outage of the DC source, voltage goes to 0 kV via resistive paths of voltage dividers in the
overall test assembly.
2. Outage of the DC source, test object is directly earthed via automatic earthing switches.
3. Outage of the DC source, test object and all resistive paths are disconnected, so that the test
object remains at floating potential.
Scenario 3 requires switches and controlling devices, which disconnects the test object in case of
outages of the DC source. However, it has to be considered, that the voltage of the floating section is
unknown and measurement of that potential is difficult. Furthermore, it has to be considered, how the
overall network will behave, when the overall network is re-energized. Nevertheless, scenario 3 has the
advantage, that the voltage across the insulator will be only reduced by the low conductivity of the DC
insulator. Therefore, the change of surface and space charge effects is minimized. But scenario 1 and
2 will occur most commonly in practice. Therefore, the influence of scenario 1 and 2 has to be
investigated. Scenario 1 and 2 are similar, because both finally result at 0 kV between conductor and
enclosure. The focus of the consideration is on scenario 2 which is the more critical.
Investigations of scenario 2 have been performed on low conductivity insulators [87]. Measurements of
the electric potentials before and after interruptions can be found in the literature. After 4 months at
DC voltage and DC current stress, the insulators reached the DC stationary state. Afterwards, the
insulators have been earthed for 3 days in order to simulate the interruption, followed by 11 days of
recovery. Subsequently, the potential at the insulator surface was measured and based on the potential
measurement the radial electric field strength was calculated. The difference of the radial electric field
strength along the insulator surface for different radii before interruption and after recovery is shown
in Figure 6.4.2.
Figure 6.4.2: Relative difference of the radial electric field strength according to surface potential
measurements before 3 days interruption and after recovery [87]
Figure 6.4.2 shows a maximum difference at the insulator surface of ±6 % due to the interruption.
Simulations show similar results assuming the same scenario. The electric field strength at the insulator
surface is shown in Figure 6.4.3.
118
Figure 6.4.3: Simulation of the electric field strength at the insulator surface after 3 days
interruption and 11 days recovery [87]
Figure 6.4.3 shows similar results as Figure 6.4.2. Therefore, interruptions have a very low influence on
the electric field distribution at the insulator surface. Experiences with high conductive materials shows
similar results, but a high reduction of the electric field strength at the beginning of the interruption can
be observed.
The overall discharging process is strongly dependant on the conductivity of the insulation material.
Generally, the insulator will be discharged after a time equal to or higher than t90. As long as the
recharging time is higher, compared to the discharging time, a DC state similar to that preceding the
interruption will be reached again. According to the results of Figure 6.4.2 and 6.4.3, small deviations
of the electric field strength may occur during this process. But these deviations can be neglected,
because the test voltage during the DC long-term stress amounts to 1.2∙Ur (refer section 6.4.3). This
covers possible deviations due to interruptions. Short interruptions, especially with high conductivity
materials, need special considerations.
To conclude, a practical test procedure needs to be defined. Based on the interruption time, a recharging
time has to be defined and this recharging time has to be added to the testing time of the cycle. If the
interruption will happen during the long-term stress, high conductivity materials will quickly return to
their DC status. The field strength at low conductivity insulators will not change much, so that
interruptions during the long-term stress are therefore less critical. Before the superimposed voltage
stress at the end of the cycle, the insulators shall reach its DC stationary status in order to test their DC
impulse voltage performance. Interruptions at the end of the long-term stress are therefore more
critical. For short interruptions a minimum recharging time has to be defined, because accumulated
charges may disappear very quickly for high conductivity arrangements. A practical maximum
interruption time needs to be defined in order to avoid long pauses. Basically, a maximum interruption
time of one weekend is a very practical approach. The final procedure will be presented in section
8.2.3.3.
6.4.5.2 Current source interruptions
Outages of the current source will mainly influence the temperature distribution. At the beginning, the
temperature distribution will change, because the temperature gradient will decrease. If the DC voltage
source is still switched on, this process will not strongly affect the charge distribution at the insulators
due to the large discharing time constant. Therefore, short pauses of the current source are not critical
and can be neglected. If longer pauses occur, the overall system shall be reheated. The reheating
procedure shall be similar to the recharging procedure of outages of the DC voltage source (section
6.4.5.1), because usually voltage and current source interruptions will occur simultaneously. Again, this
will be covered in the final procedure presented in section 8.2.3.3.
6.4.6 Examples for test setups
This chapter shows some examples of prototype installation test assemblies. Figure 6.4.4 shows the
prototype installation test of a 350 kV DC GIS. All typical GIS components are integrated in the test
assembly. The total length of the test assembly is approximately 40 m. The test loop is heated with
119
three conventional AC current transformers. A gas-insulated RC divider is integrated in the circuit. The
connection of the DC voltage as well as the impulse voltage is performed at the HV connection bushing.
Besides the GIS assembly, monitoring systems are also integrated into the test. To gain more experience
with UHF monitoring systems under DC voltage, such systems are installed in the test assembly.
Moreover, optical and HFCT, based partial discharge measurement systems are connected to the GIS
as well.
Figure 6.4.4: Prototype installation test assembly for 350 kV DC GIS [88]
A prototype installation test assembly for 525 kV DC GIL is shown in Figure 6.4.5 [89].
The HVDC GIL test arrangement is constructed of eight straight modules (2) and two 45° DC GIL angle
modules (3). The total current loop is approximately 100 m long, installed above ground and mostly
outdoor. All typical GIL parts are installed in the test arrangement, among others approximately
35 insulators plus several insulating rods in switching devices. The test equipment for feeding the
HVDC GIL with current and voltage is installed in a high voltage hall (1). The current loop of the test
setup is connected by ±550 kV HVDC GIS modules and a lateral compensation module (4).
120
Figure 6.4.5: Prototype installation test assembly for 525 kV DC GIL [89]
A novel generator to inject DC current at high voltage potential is used to feed the testing loop [90].
Superimposed tests are performed with oscillating impulse voltage to be able to handle the long test
arrangement. UHF PD monitoring systems are installed also in order to gain more experience with them
during the prototype installation test. The voltage measurement is performed by a gas-insulated RC
divider. The DC current measurement is performed with a current transformer according to the zero
flux principle.
121
C. Neumann, M. Hallas, M. Tenzer, M. Felk, U. Riechert, “Some thoughts regarding prototype
installation tests of gas-insulated HVDC systems”, CIGRE A3, B4 & D1 International
Colloquium, Winnipeg, MB Canada, September 30 – October 6, 2017, “HVDC & HVAC Network
Technologies for the Future”
T. Vu-Cong, A. Beroual, A. Girodet, P. Vinson, “Time Constant Evaluation of Transient AC – DC
Field Distribution”, 19th International Symposium on High Voltage Engineering (ISH 2015),
University of West Bohemia, Pilsen, Czech Republic, August 23 - August 28, 2015
R. Gremaud, F. Molitor, C.B. Doiron, T. Christen, U. Riechert, U. Straumann, B. Kälstrand,
K. Johansson, O. Hjortstam, “Solid Insulation in DC Gas-Insulated Systems”, CIGRE Report
D1-103, 45th CIGRE Session, August 24-August 30, 2014, Palais des Congrès de Paris, Paris,
France, 2014
R. Gremaud, M. Schueller, C.B. Doiron, U. Riechert, U. Straumann, C.M. Franck, “Experimental
validation of electric field modeling in DC gas-insulated system”, International Study
Committee Meeting and Colloquium 2013 CIGRE Study Committee D1 (Materials and
Emerging Test Techniques), Rio de Janeiro, Brazil, September 13th-18th, 2015, Trends in
Technology, Materials, Testing and Diagnostics Applied to Electric Power Systems,
Proceedings, paper 21
U. Straumann, U. Riechert, R. Gremaud, M. Schueller, C.M. Franck, “HVDC Insulator Charging
in SF6 Insulated Systems“, DPG Frühjahrstagung, Deutsche Physikalische Gesellschaft e.V., P
21: Plasma Technology II, P21-1, Berlin/Germany, March 17-21, 2014
U. Riechert, F. Blumenroth, P. Skarby, “Testing methods of gas-insulated HVDC components
and switching equipment" (in German), GIS – Anwender Forum, Fachtagung:
Hochspannungs-Schaltanlagen: Anwendung, Betrieb und Erfahrungen, 14. October 2014,
Welcome Hotel Darmstadt, Germany, 2014
R. Gremaud, et al., “Measurement of DC conduction in alumina-filled epoxy”, 2016 IEEE
International Conference on Dielectrics (ICD), 2016, pp. 1097-1101
M. Hering, J. Speck, S. Grosmann, U. Riechert, "Field transition in gas-insulated HVDC
systems", IEEE Transactions on Dielectrics and Electrical Insulation, vol. 24, issue 3, p. 1608 –
1616
U. Straumann, et al., "Theoretical investigation of HVDC disc spacer charging in SF6 gas
insulated systems", Dielectrics and Electrical Insulation, IEEE Transactions on, vol. 19, pp.
2196-2205, 2012
B. Lutz, J. Kindersberger, “Surface Charge Accumulation on Cylindrical Polymeric Model
Insulators in Air: Simulation and Measurement”, IEEE Trans. Dielectr. Electr. Insul, Vol. 18,
pp. 2040-2048, 2011
R. Gremaud, R.; C. Doiron, M. Baur, P. Simka, V. Teppati, B. Källstrand, K. Johansson,
M. Hering, J. Speck, S. Grossmann, U. Riechert, U. Straumann, “Solid-gas insulation in HVDC
gas-insulated system: Measurement, modeling and experimental validation for reliable
operation”, Cigré Science & Engineering, Volume N°7, February 2017, ISSN : 1286-1146, p.
133-142
U. Riechert, R. Gremaud, S. Thorson, M. Callavik, “Application options and electrical field
studies as basis for adequate testing of gas-insulated systems for HVDC”, CIGRE Winnipeg
2017 Colloquium Study Committees A3, B4 & D1, Winnipeg, Canada, September 30 –
October 6, 2017, paper D1-139
Conference & Exposition (T&D), Conference May 2-5: Exposition May 3-5: Kay Bailey
Hutchison Convention Center Dallas, Texas, USA, paper TD0264, DOI:
10.1109/TDC.2016.7519973
122
U. Riechert, R. Gremaud, M. Callavik, “Application options and electrical field studies as basis
for adequate testing of gas-insulated systems for HVDC, CIGRE A3, B4 & D1 International
Colloquium”, Winnipeg, MB Canada · September 30 – October 6, 2017
IEC/IEEE 65700-19-03, “Bushings for DC application”, 2014.
M. Hallas, M. Kosse, K. Juhre, M, Secklehner, V. Hinrichsen, “Determination of AC test
currents for thermo-electric laboratory stresses on gas-insulated HVDC systems”, 2020 CIGRE
Canada Conference, Toronto Ontario, October 19-22, 220
Harmonics Data, ABB, 2016
IEC 61869-14 ED1 38/560/FDIS, Instrument Transformers - Part 14: Specific Requirements
for DC Current Transformers, IEC, 2018.
PROMOTioN Deliverable D15.2 Document on test requirements, procedures and methods
H. Loebl: Basics of thermal networks; 1999, TU Dresden
IEC 60060-1: ed3.0: High voltage test techniques: Part 1: General specifications and test
requirements, Publication date 2010-09-29
U. Riechert, U. Straumann, “Dielectric Testing of Gas/Solid Insulation Systems for HVDC
GIS/GIL”, CIGRE Contribution D1, PS1-Q1-02, 45th CIGRE Session, August 24-August 30,
2014, Palais des Congrès de Paris, Paris, France, 2014
U. Riechert, U. Straumann, F. Blumenroth, E. Sperling, “Dielectric Testing of Gas/Solid
Insulation Systems for HVDC GIS/GIL”, International Study Committee Meeting and
Colloquium 2013 CIGRE Study Committee D1 (Materials and Emerging Test Techniques), Rio
de Janeiro, Brazil, September 13th-18th, 2015, Trends in Technology, Materials, Testing and
Diagnostics Applied to Electric Power Systems, Proceedings, paper 7
E. Sperling, U. Riechert, “HVDC GIS RC-dividers in new GIS substations with increased
dielectric requirements”, 2015 CIGRE SC A3 (High Voltage Equipment) & B3 (Substations)
Joint Colloquium: Challenges for Future Reliability of T&D Substations and Equipment, 28
September – 2 October 2015, Nagoya, Japan
U. Riechert, H. Hama, F. Endo; K. Juhre, J. Kindersberger, S. Meijer, C. Neumann, S. Okabe,
U. Schichler, On behalf of CIGRÉ Task Force D1.03.11, “Gas Insulated Systems for HVDC,
Gasisolierte Systeme für HGÜ“, ETG Fachtagung: Isoliersysteme bei Gleich- und
Mischfeldbeanspruchung 2010, 27. - 28. September 2010, Köln, Germany, ETG-Fachbericht
125, 2010, S. 101-107, VDE VERLAG GMBH, Berlin und Offenbach, ISBN 978-3-8007-3278-4
CIGRE Task Force 15.03.07 of WG 15.03, On behalf of Study Committee 15, W. Boeck,
(Convener); A. Diessner, F. Endo, K. Feser, A. Giboulet, A. Girodet, S. Halliday,
W. Koltunowicz, Li Ming, L. Lundgaard, S. Meijer, A.H. Mufti, C. Neumann, R. Pietsch,
P. Prieur, U. Riechert, W.R. Rutgers, H. Slowikowska, “Long-Term Performance of SF6
Insulated Systems“, CIGRE Report 15-301, 39th CIGRE Session, August 25-30, 2002, Palais
des Congrès de Paris, Paris, France
IEC 62271-203: High-voltage switchgear and controlgear, Part 203: Gas-insulated metal-
enclosed switchgear for rated voltage above 52 kV
U. Riechert, F. Blumenroth, U. Straumann, B. Kaufmann, M. Saltzer, P. Bergelin, “Experiences
in Dielectric Testing of Gas-insulated HVDC Systems”, CIGRE Report D1-101, 47th CIGRE
Session, August, 2018, Palais des Congrès de Paris, Paris, France, 2018
M. Hering, H. Koch, K. Juhre, “Direct Current ±550 kV High-Voltage Gas-Insulated Switchgear
(DC GIS)”, CIGRE-IEC Conference on EHV and UHV (AC & DC), Hakodate, 2019
T. Vu-Cong, G. Ortiz, F. Jacquier, P. Vinson and A. Girodet: Design and validation tests of
320kV HVDC GIL/GIS. MATPOST 2019, 20-22. Nov. 2019, Lyon.
F. Endo, A. Giboulet, A. Girodet, H. Hama, M. Hanai, K. Juhre, J. Kindersberger,
W. Koltunowicz, H.-G. Kranz, S. Meijer, C. Neumann, S. Okabe, U. Riechert and U. Schichler,
“Gas-insulated systems for HVDC: DC stress at DC and AC systems”, CIGRE Task Force
D1.03.11 Technical Brochure, No. 506, 2012
123
M. Hara, K. Oda, K. Kanda, T. Oshige, Akazaki, “Calculation of Field Strength and Force Acting
on Conducting Sphere in Gaps and its Application for Prediction of Gaseous Breakdown
Voltage”, Transactions of the Institute of Electrical Engineers of Japan, Vol. 95-A, No. 12,
pp. 525 - 532, 1975.
A.H. Cookson, P.C. Bolin, H.C. Deopken et. al., “Recent Research in the United States on the
Effect of Particle Contamination Reducing the Breakdown Voltage in Compressed Gas-
Insulated Systems”, CIGRE Session, Report 15 - 09, Paris, 1976
M. Leijon, A.E. Vlastos, A. Bartnicki, “Lifting Fields on Metallic Particles in a SF6 Gas-Insulated
System with uncoated Electrodes”, IX International Conference of Gas Discharges and Their
Application, pp 291 - 294, Italy, 1988
T. Yasuoka, Y. Hoshina, M. Shiiki, M. Takei, A. Kumada, K. Hidaka, “Insulation Characteristics
in DC-GIS: Surface Charge Phenomena on Epoxy Spacer and Metallic Particle Motions”, CIGRE
Session, Paris, 2018.
T. Yasuoka, Y. Abe, M. Shiiki, T. Karub, “Dielectric tests for 250 kV DC-GIS”, PaperP1-14,
CIGRE-IEC 2019 Conference on EHV and UHV (AC & DC), April 23-26, 2019, Hakodate,
Hokkaido, Japan
T. Hasegawa, A. Kawahara, M. Hatano, M. Yoshimura, H. Fujii, K. Inami, H. Hama and K.
Nakanishi, “Improvement of withstand voltage at particle contamination in DC – GIS due to
dielectric coating on conductor”, Gaseous Dielectrics VIII, pp.581-586, 1998
T. Goetz, T. Linde, O. Simka, J. Speck, K. Backhaus, T. Gabler, U. Riechert, S. Grossmann:
Surface discharges on dielectric coated electrodes in gas-insulated systems under DC voltage
stress. VDE Conference High Voltage Technique 2018, 12–14-11-2018, paper 463.
M. Saito, T. Takahashi, N. Hayakawa, K. Kawakita, H. Okubo, “Metallic Particle Motion and
Breakdown Characteristics in GIS with 0.1-Hz VLF (Very Low Frequency) High Voltage Applied,
Transactions of the Institute of Electrical Engineers of Japan, Vol. 139, No. 4, pp. 33 - 40,
2002
T. Hasegawa, K. Yamaji, M. Hatano, F. Endo, T. Rokunohe, T. Yamagiwa, “Development of
Insulation Structure and Enhancement of Insulation Reliability of 500 kV DC GIS”, IEEE
Transactions on Power Delivery, Vol. 12, No. 1, pp. 194 - 202, 1997
T. Berg, H. Koch, K. Juhre, “Free moving particles in gas-insulated lines under DC conditions –
Basic properties, specific effects and countermeasures”, 21th ISH, Budapest (Hungary),
August 26-30, 2019
T. Berg, K. Juhre, T. Fedke, H. Koch, C. Neumann, “Specific Characteristic of Particle Traps for
Application in DC Gas-insulated Transmission Lines (DC GIL),”, VDE Conference High Voltage
Technique 2020, Berlin, November 2020
C. Neumann, K. Juhre, U. Riechert, U. Schichler, “Basic phenomena in gas-insulated HVDC
systems and adequate dielectric testing”, Paper 128, CIGRE-IEC 2019 Conference on EHV and
UHV (AC & DC), April 23-26, 2019, Hakodate, Hokkaido, Japan.
CIGRE Working Group D1.03 (TF11), F. Endo, A. Giboulet, A. Girodet, H. Hama, M. Hanai,
K. Juhre, J. Kindersberger, W. Koltunowicz, H.G. Kranz, S. Meijer, C. Neumann, S. Okabe;
U. Riechert, U. Schichler, “Gas Insulated Systems for HVDC: DC Stress at DC and AC
Systems”, CIGRE Technical Brochure 506, August 2012, ISBN: 978- 2- 85873- 198-5
P. Morshuis, M. Jeroense, J. Beyer, “Partial Discharge. Part XXIV: The Analysis of PD in HVDC
Equipment”, IEEE Electrical Insulation Magazine, Vol. 13, No. 2, pp. 6-16, 1997
A. Pirker, U. Schichler, “Partial Discharge Measurement at DC Voltage - Evaluation and
Characterization by NoDi* Pattern”, IEEE Transactions on Dielectrics and Electrical Insulation,
Vol. 25, No. 3, pp. 883 - 891, 2018.
I. J. Seo, J. Y. Koo, Y. J. Lee, B. W. Lee, J. T. Kim, J. H. Lee “Identification of Insulation
Defects by modified Chaotic Analysis of Partial Discharge under DC Stress”, CIGRE Session,
Paris, France, Report D1-310, 2012.NoDi* Pattern for Visualization of PD at DC Voltage.
124
A. Pirker, U. Schichler, “Application of NoDi* Pattern for UHF PD Measurement on HVDC

GIS/GIL”, International Conference on Condition Monitoring, Diagnosis and Maintenance
CMDM 2019 (5th edition), September 9th – 11th, 2019, Radisson Blue Hotel Bucharest,
Romania.
A. Pirker, B. Schober, U. Schichler, “PD Monitoring on HVDC GIS/GIL”, CIGRE Chengdu 2019
Symposium, September 20-26, 2019. Paper no. 0103.
A. Pirker, “Measurement and representation of partial discharges at DC voltage for
identification of defects of gas-insulated systems (in German)”, PhD Thesis, Technical
University of Graz, 2019.
P. Wenger, M. Beltle, S. Tenbohlen, U. Riechert, G. Behrmann, “Combined characterization of
free-moving particles in HVDC-GIS using UHF PD, high-speed imaging, and pulse sequence
analysis”, IEEE Transactions on Power Delivery, Vo. 34, No. 4, August 2019.
P. Wenger, M. Beltle, S. Tenbohlen, U. Riechert, “UHF-PD Measurement and High-Speed-
Imaging of Firefly Motion at the Positive Electrode in HVDC-GIS”, IEEE Conference on
Electrical Insulation and Dielectric Phenomena, 2019- Washington – USA.
M. Geske, C. Neumann, T. Berg, R. Plath,“Assessment of typical defects in gas-insulated DC
systems by means of Pulse Sequence Analysis based on UHF partial discharge
measurements”, VDE Conference High Voltage Technique 2020, Berlin, November 2020
C. Neumann, M. Hallas, V. Hinrichsen, D. Gross, M. Geske, M. Tenzer, “PD measurements on
a DC gas-insulated transmission line (DC GIL) conducted in the frame of the Prototype
Installation Test according to recommendation of CIGRE JWG D1/B3.57”, VDE Conference
High Voltage Technique 2020, Berlin, November 2020
CIGRE Working Group C4.302, “Insulation Co-ordination Related to Internal Insulation of gas
insulated Systems with SF6 and N2/SF6 Gas Mixtures under AC Conditions”, CIGRE Technical
Brochure 360, Oct. 2008.
CIGRE Working Group D1.28, “Optimized Gas-Insulated Systems by Advanced Insulation
Techniques”, Technical Brochure, No. 571, page 29, ISBN 978-2-85873-266-1, 2014
CIGRE TF 15.03.07, “Long-term performance of SF6 insulated systems”, CIGRE Session paper
15-301, Paris, 2002
K. Juhre, E. Kynast, “Long-term performance under high voltage of mineralic filled and fiber-
reinforced epoxy insulators used in GIS”, 14th ISH, Beijing, China, 2005.
P.H.F. Morshuis, J.J. Smits, “Partial Discharges at DC Voltage: their Mechanism, Detection and
Analysis”, IEEE Transactions on Dielectrics and Electrical Insulation”, Vol. 12 (2), pp. 328-340,
2005.
I. Iddrissu, Z. Hualong, S.M. Rowland, "DC electrical tree growth in epoxy resin and the
influence of the size of inceptive AC trees", IEEE Transactions on Dielectrics and Electrical
Insulation, vol. 24, issue 3, p. 1965 – 1972
M. Belec, C. Guddemi, C. Millet, “Effect of long-term aging test under DC voltage on Roebel
bars”, 2012 IEEE International Conference on Condition Monitoring and Diagnosis, journal
paper, p. 412 – 416, ISBN 978-1-4673-1020-8, 2012
U. Fromm, “Partial Discharge and Breakdown Testing at High DC Voltage”, PhD Thesis, TU
Delft, 1995.
R. Alvinsson, E. Borg, A. Hjortsberg, T. Höglund, and S. Hörnfeldt, “GIS for HVDC Converter
Stations”, CIGRE 1986, Report, 14.02.
M. Mendik, S.M. Lowder, F. Elliott, “Long term performance verification of high voltage DC
GIS”, Transmission and Distribution Conference, 1999 IEEE, vol.2
125
B. Lutz, K. Juhre and D. Imamovic, “Long-term performance of solid insulators in gas

insulated systems under HVDC stress”, 19th International Symposium on High Voltage
Engineering ISH), Pilsen, Czech Republic, 2015
K. Juhre, M. Hering, “Testing and long-term performance of gas-insulated systems for DC
application”, CIGRE-IEC Conference on EHV and UHV (AC & DC). Hakodate 2019.
S. Menju, K. Takahashi, “DC Dielectric Strength of a SF6 Gas Insulated System", IEEE Trans.
on Power Apparatus and Systems, vol. PAS-97, iss.1, p 217-224, 1978 S. Menju, K. Takahashi,
"DC Dielectric Strength of a SF6 Gas Insulated System", IEEE Trans. on Power Apparatus and
Systems, vol. PAS-97, iss.1, p 217-224, 1978
IEC 62271-203: High-voltage switchgear and controlgear, Part 203: Gas-insulated metal-
enclosed switchgear for rated voltage above 52 kV, 2011.
L. Zavattoni, "Conduction phenomena through gas and insulating solids in HVDC Gas
Insulated Substations, and consequences on electric field distribution", PhD Thesis, Université
de Grenoble, Grenoble, 2015
TREK. (2013). TREK Model 541A Non-Contacting Electrostatic Voltmeter for EOS/ESD.
Available: http://www.trekinc.com/pdf/541A_Sales.pdf
PROMOTioN Deliverable D15.2 Document on test requirements, procedures and methods
CIGRE Working Group B1.23 “Recommendations for Testing DC Extruded Cable Systems for
Power Transmission at a Rated Voltage up to 500 kV”, Cigré Technical Brochure 496, April
2012, ISBN: 978-2-85873-188-6
IEC 62895, “High voltage direct current (HVDC) power transmission - Cables with extruded
insulation and their accessories for rated voltages up to 320 kV for land applications - Test
methods and requirements”, 2017.
CIGRE Task Force 15.03.07 of WG 15.03, On behalf of Study Committee 15, W. Boeck,
(Convener); A. Diessner, F. Endo, K. Feser, A. Giboulet, A. Girodet, S. Halliday,
W. Koltunowicz, Li Ming, L. Lundgaard, S. Meijer, A.H. Mufti, C. Neumann, R. Pietsch,
P. Prieur, U. Riechert, W.R. Rutgers, H. Slowikowska, “Long-Term Performance of SF6
Insulated Systems”, CIGRE Report 15-301, 39th CIGRE Session, August 25-30, 2002, Palais
des Congrès de Paris, Paris, France
H. Koch et al.,”Electrical and mechanical long time behaviour of gas-insulated transmission
lines”, CIGRE 21/23/33-03_2000.
C. Neumann, “Assessment of GIL as a new type of transmission system”, CIGRE SC 15
Symposium „Gas insulated Systems“, Dubai, May 9th, 2001.
IEC 62271-204, “Rigid gas-insulated transmission lines for rated voltages above 52 kV”. 2011
T. Magier, M. Tenzer and H. Koch, “Direct Current Gas-Insulated Transmission Lines”, IEEE
Transactions on Power Delivery, ISSN 0885-8977, doi: 10.1109/TPWRD.2017.2716182,to be
published in November 2017.
Conference & Exposition (T&D), Conference May 2-5 : Exposition May 3-5: Kay Bailey
Hutchison Convention Center Dallas, Texas, USA, paper TD0264
IEC 60071-2, “Insulation co-ordination, Part 2: Application Guide”, December 1996.
C. Neumann, M. Hallas, M. Felk, M. Tenzer, U. Riechert, ”Some thoughts regarding prototype
installation tests of gas-insulated HVDC systems”, CIGRÉ Winnipeg 2017 Colloquium, Study
Committees A3, B4 & D1, Winnipeg, Canada, September 30 – October 6, 2017. Paper D1-110.
IEC 60071-1, “Insulation co-ordination, Part 1: Principles and rules”, Jan 23, 2006.
126
CIGRE JWG 33/23, “Insulation Co-ordination of GIS: Return of Experience, On site Tests and
Diagnostic Techniques”, Electra No. 176, Feb. 1998, pp. 66-97.
M. Hallas, C. Dorsch, V. Hinrichsen, “Superimposed Voltage Testing of HVDC Equipment with
Oscillating Impulse Voltage”, IEEE International Conference on High Voltage Engineering and
Application (ICHVE 2018), 10. - 13. September 2018, Athens, Greece, 2018
E. Gockenbach, J. Meppelink, “Erzeugung schwingender Blitzstoßspannung und deren
Anwendung in der Hochspannungstechnik” (in German), etz Archiv Bd. 5 H. 4, page 135-140,
1983
U. Straumann, U. Riechert, R. Gremaud, K. Johansson, N. Lavesson, “Dielectric stress on and
design of GIS support insulators for HVDC-applications”, prepared for CIGRE Session 2020
U. Riechert; PROMOTioN Projekt “Novel switchgear for future multi-terminal HVDC Grids –
Developement and performance demonstration of HVDC gas insulated switchgear”, Cigre-IEC
2019 Conference on EHV and UHV (AC+DC); 23.04.19 – 26.04.19, Hakodate, Japan, 2019
M. Hallas, V. Hinrichsen, C. Neumann, M. Tenzer, B. Hausmann, D. Gross, T. Neidhart,
M. Lerch, D. Wiesinger, “Cigré Prototype Installation Test for Gas-Insulated DC Systems –
Testing a Gas-Insulated DC Transmission Line (DC-GIL) for ±550 kV and 5000 A under Real
Service Conditions”, CIGRE D1-107, 2020
M. Hallas, T. Wietoska, V. Hinrichsen, “Generator for Current Injection on High DC Potential to
Test HVDC Equipment“. ISH 2017 - Buenos Aires
127
7. Recommendation for dielectric testing of gas-

insulated HVDC systems
Scope
This chapter recommends a series of dielectric tests (type tests, routine tests, on-site tests and DC
insulation system tests) for gas-insulated HVDC systems for power transmission and distribution systems
with rated voltages up to and including 550 kV.
For GIS/GIL, all other tests (except the dielectric tests) are defined in the relevant IEC standards for
GIS/GIL; IEC 62271-203, 'Gas-insulated metal-enclosed switchgear for voltages above 52 kV' [1] and
in addition, for GIL, IEC 62271-204 [2] is applicable. The type tests, which are relevant for dielectric
testing and the purpose for which they are carried out are listed below in Table 7.1-1. A list of all
mandatory tests according IEC 62271-203 and IEC 62271-204 is given in Appendix C.
Table 7.1-1: Type tests relevant for dielectric testing
Sub clause according to IEC 62271-203 [1]

Purpose of test
or reference to the present document
Tests to verify the insulation level of the This document
equipment
Tests on partitions [1] subclause 6.104 (and this document in
reference to voltage test as condition check)
Tests to verify performance under thermal [1] subclause 6.106 (and this document in
cycling and gas tightness tests on insulators reference to voltage test as condition check)
Summary of tests
Where applicable, test definitions are in line with IEC 62271-1 [3], IEC 62271-203 [1], IEC 62271-102
[4], IEC 62271-204 [2], and the CIGRE Technical Brochure TB 496 [5].
Design tests: Tests done during the development of gas-insulated HVDC systems.
DC Insulation system
tests: Tests to demonstrate satisfactory electrical performance of DC insulators
(partitions, support insulators, rods, tubs ….) under the influence of space and
surface charges.
Type tests: Tests done on a specific type of gas-insulated HVDC systems to demonstrate
satisfactory performance for the intended application (voltage level, load)
typically as a condition of a commercial supply contract.
Routine tests: Manufacturer's routine factory tests on each component to verify that the
component meets the specified requirements before leaving the factory.
On-site tests: Final tests on the installed gas-insulated HVDC system to demonstrate their
integrity prior to energisation.
Prototype installation: Optional test done on an agreed-upon representative set-up of a specific type
of a gas-insulated HVDC system, covered by this recommendation, in order to
demonstrate satisfactory long-term performance.
Definitions
7.3.1 Abbreviations
HVDC High Voltage Direct Current
LCC Line Commutated Converters; in this type of HVDC converter, the transmission system
voltage polarity changes when the direction of power flow is reversed IEC 60633 [6]
VSC Voltage Source Converters; in this type of converter, transmission system voltage
polarity does not change when the power flow direction reverses CIGRE TB 289 [7]
PD Partial Discharge
128
SI Switching Impulse (voltage)

LI Lightning Impulse (voltage)
S/IMP Superimposed Impulse (voltage)
OLI Oscillating Lightning Impulse (voltage)
OSI Oscillating Switching Impulse (voltage)
FAT Factory Acceptance Test (routine test)
SAT Site Acceptance Test (on-site test)
7.3.2 Test voltages

UDC direct voltage
UnDC the nominal DC voltage is the mean value of the direct voltage required to transmit
nominal power at nominal current [8] (e.g.: nominal voltage = 320 kV).
UrDC the rated continuous DC voltage is the maximum continuous direct voltage assigned to
the gas-insulated HVDC system by the manufacturer for specified operating conditions
UrDC = 1.1 ∙ UnDC (sometimes lower values are given, e.g. UrDC = 1.05 ∙ UnDC; for this
recommendation the highest reported value is chosen).
UrwDC the rated DC withstand voltage UrwDC = 1.5 ∙ Urdc during type tests and routine tests
[9].
UT the DC test voltage during the prototype installation test. A value of UT = 1.2 ∙ UrDC is
the preferred value; the preferred value is higher than the maximum DC voltage in
service, but lower than the preferred values for cables [5] in order to avoid thermal
overstress of conductivity-optimized insulators.
Ûpre-stress AC the AC pre-stress voltage Ûpre-stressAC = 1.5 ∙ UrDC during type tests, routine tests, and
on-site tests to pre-stress the equipment before PD measurements are made.
Ûpd-test AC is the AC test voltage Ûpd-testAC = 1.2 ∙ UrDC for PD measurement during type tests,
routine tests and on-site tests.
Upre-stress DC is the DC pre-stress voltage Upre-stressDC = 1.5 ∙ UrDC during type tests to pre-stress the
equipment before PD measurements are made.
Upd-test DC is the DC test voltage Upd-testDC = 1.2 ∙ UrDC for PD measurement during type tests,
routine tests and on-site tests.
Uost the AC test voltage (RMS) Uost = UrDC / √2 for on-site tests (commissioning).
USI switching impulse voltage.
ULI lightning impulse voltage.
US the rated switching impulse withstand voltage.
UP the rated lightning impulse withstand voltage.
UIG out the impulse voltage generator output voltage achieved during SI tests or LI tests,
respectively. The required generator voltage UIG out to reach ÛSI or ÛLI during
superimposed tests depends on the coupling element (spark gap or coupling capacitor)
and the polarity (refer section 8.1 and Figure 8.1-3)
ÛSI the peak value of the composite voltage formed by a superposition of DC voltage Udc
and switching impulse voltage USI on one energized terminal of the test object,
generated by appropriate connection of two separate test voltages sources [10]. The
tests have to be carried out in both unipolar (same) and bipolar (opposite) polarity
(Figure 7.3-1).
ÛLI the peak value of the composite lightning impulse voltage formed by a superposition of
two different test voltages generated by appropriate connection of two separate test
voltage sources at voltage levels Udc and UIG out (superimposed voltage test) [10]. The
tests have to be carried out in both unipolar (same) and bipolar (opposite) polarity
(Figure 7.3-1).
Notes: The ripple factor of DC-voltage should be not more than 3 % for all tests [10].
129
Figure 7.3-1: Schematic representation of composite voltages (superposition of DC

voltage and impulse voltage) – the figure shows the principal waveform. The real
waveform depends on the test circuit used and is explained in more detail in chapter 8
7.3.3 Test currents

IDC direct current.
IAC alternating current.
IrDC the rated continuous DC current (the maximum continuous direct current) that the gas-
insulated system is required to carry under the specified operating conditions.
Ieq,DC the total equivalent (or test) DC current [9].
Ieq,AC the applied fundamental frequency AC current [9] during the type tests and long
performance test.
Notes:
HVDC gas-insulated systems can be subject to significant harmonic current content. Such harmonic
current cannot be easily reproduced in laboratories. Equivalent DC and AC power frequency current
(50 Hz or 60 Hz) shall then be used. The amplitude of the equivalent test current shall produce the
same total watt losses calculated for the specified harmonic current spectrum. The calculation of the
equivalent DC and AC current is given in chapter 6 and in reference IEC/IEEE 65700-19-03. [9].
The accumulated additional power losses due to harmonic currents as given in chapter 6 ranges from
0.03 % to 0.5 %. Therefore, high load conditions shall include an additional current of 0.5 % to account
for 1 % of additional losses due to harmonic currents. The current reduction factor when testing DC
1
equipment with AC current is 𝑘AC = and for typical GIS using hollow conductors lower than 5%. The
√k
increase in enclosure temperature does not impact the resulting ΔT considerably. Thus, no further
compensation is required.
7.3.4 Thermal GIS design parameters

Limits of temperature and temperature rise for various parts and materials are according IEC 62271-1
[3].
130
7.3.5 Load conditions for tests

High Load (HL) High load consists of a continuous heating period at rated current up to the
thermal steady state (duration d), the heating method used shall be conductor
heating [1], and the heating shall be generated with equivalent DC or AC
current [9]; the results are equivalent for both heating methods. The test is
valid and the relevant requirements are fulfilled by performing and passing
either one of the alternatives.
For the insulation system tests, a higher equivalent DC or AC current (compared
to the rated DC current) is allowed because the maximum conductor
temperature and maximum temperature drop across the insulation has to be
safely achieved.
Duration d The time required for the temperature rise to reach a stable value should be
evaluated by pre-tests on the same test arrangement used for dielectric HL
tests as the preferred procedure (thermal calibration). If not possible, type tests
on similar, but typical gas-insulated components of the same type could be used
to determine the duration d according to 6.5 of IEC 62271-203 [1].
The test shall be made over a period of time sufficient for the temperature rise
to reach a stable value. This condition is deemed to be obtained when the
increase of temperature rise does not exceed 1 K in 1 h [1]. This criteria will
normally be met after a test duration of five times the thermal time constant of
the device under test.
Duration d for gas insulated components is typically in the range of some
hours.
The time for the whole test may be shortened by preheating the circuit with a
higher value of current, provided that sufficient test data is recorded to enable
calculation of thermal time constant.
Zero Load (ZL) No heating is applied.
Load Cycles (LC) Load cycles consisting of both heating period(s) and cooling period(s) at
constant DC voltage.
A typical '24 hours' load cycle consists of at least 8 hours of heating followed
by at least 16 hours of natural cooling. During at least the last 2 hours of the
heating period, a conductor temperature ≥ Tcond,max and a temperature drop
across the insulation ≥ ΔTmax shall be maintained. Other definitions of daily load
cycles are possible and have to be defined between manufacturer and user
before starting the test.
The test has to be carried out at ambient temperature and at the equivalent DC
or AC current [9] of the gas-insulated HVDC system.
Tcond,max The maximum temperature at which the conductor is designed to operate at
rated current. This value is to be stated by the supplier.
ΔTmax The maximum temperature difference across the gas insulation in steady state
at rated current. This value is to be calculated or measured during pre-tests
and stated by the supplier, who shall also provide evidence of the correlation
between this design value and data measured during testing.
Ambient temperature Unless otherwise specified in the details for the particular test, tests shall be
carried out at an ambient temperature of (20 ± 15) °C.
7.3.6 DC STEADY STATE

DC steady state DC steady state is defined as when minimum 90 % of the resistive field
distribution is reached; i.e. at the end of the transition from a capacitive to a
resistive field distribution in the gas-insulated HVDC system. Depending on the
temperature of the insulation material the transition to a DC field distribution
takes from hours to months [19].
131
Duration tDC Time to reach the DC steady state. In case the DC steady state is unknown and
the time to reach the DC steady state tDC could not be directly determined, tDC
is considered to be fulfilled, if the rate of change of the measured potential field
is lower than 10% of the initial rate (initial time delays shall be ignored).
Notes:
The transition to the DC field is characterized by an asymptotic changing of the field strength. For the
definition of test durations, the dielectrically relevant locations, typically at the outer electrode
(enclosure) must be considered. The degree of charging 𝑑c of a specific location is defined by the effect
on the momentary electric field 𝐸(𝑡) , by comparing with the transient (AC) electric field 𝐸AC at
energisation with the asymptotic DC case 𝐸DC according to
𝐸(𝑡) − 𝐸AC
= 𝑑c (𝑡) (7–1)
𝐸DC − 𝐸AC
If a degree of charging of 90% has been reached at the given location, the transition time is considered
as having been reached. As the DC field is only reached asymptotically, the 90% value seems to be a
fair compromise for testing purposes. At some positions, for instance at triple points, longer times for
the transition to DC fields are possible. When they are of minor importance due to relatively low electric
field strength, it is not reasonable to take them as a basis to decide upon testing time.
A technical feasible compromise is to consider all areas where the electric field strength is higher than
20% compared to the transient (AC) electric field strength 𝐸𝐴C at energization and the asymptotic DC
steady state field strength 𝐸𝐷𝐶.
abs (𝐸(𝑥)) ≥ 0.2 ∙ abs ( 𝐸DC )

(7–2)
abs (𝐸(𝑥)) ≥ 0.2 ∙ abs ( 𝐸AC )
Test definitions
7.4.1 Partial discharge test with AC voltage
Today the experience in the field of PD measurement and interpretation of PD patterns at DC voltage
is limited. Therefore, it is proposed to perform the PD test under AC voltage stress. The test shall be
carried out at ambient temperature.
The applied power-frequency voltage is raised to pre-stress value Ûpre-stress AC and maintained at that
value for 1 min. Partial discharges occurring during this period shall be disregarded [1]. Then, the
voltage is decreased to the test voltage for PD measurement Ûpd-test AC and maintained at that value for
a minimum of 1 min.
The maximum permissible partial discharge shall not exceed 5 pC [1].
7.4.2 Partial discharge test with DC voltage
The applied DC voltage is raised to pre-stress value Upre-stress DC within a period not exceeding 1 min and
the DC voltage shall be maintained at that value for 1 min [9]. Partial discharges occurring during this
period shall be disregarded [1]. Then, the voltage is decreased to the DC test voltage for PD
measurement Upd-test DC within a period not exceeding 1 min and maintained at that value for a minimum
of 1 min.
The interpretation of PD measurements at DC voltage stress is briefly touched upon in IEC60270 [11]
(see paragraphs 11.2 and 11.4, and also Annex H). The two methods shown are pulse counting vs. PD-
level and the other is accumulative pulse-count over a given time interval, but at present [39] can only
be considered as a rough guide for evaluating HVDC PD. Much further investigation is required for more
rigorous clarification of acceptance level, count number (over time), and other acceptance criteria for
132
DC. A further method to identify PD under DC is the PSA method. Information to PSA are given in
chapter 6.2.
In any case, no partial discharges of magnitude greater than 5 pC are allowed during the test. The test
shall be carried out at both positive and negative polarity. The pulse train response defined in IEC 60270
[11] is not appropriate for direct voltage tests. An accepted and agreed-upon method must be employed
in order to clearly differentiate between PD within the gas-insulated HVDC system under test from any
external interference during the PD tests.
7.4.3 Rated dc withstand voltage test
The test shall be carried out at rated DC withstand voltage and ambient temperature at ZL conditions
at positive and negative polarity. The duration of test for each polarity shall be 1 min. No breakdown is
allowed.
7.4.4 Superimposed impulse voltage test
The duration of pre-stress with rated DC voltage shall be 2 h. This pre-stress has to be applied before
each superimposed impulse voltage test; a recharging is necessary after changing the voltage waveform
or disconnecting the test object from the DC source. A DC voltage pre-test of 2 hours was chosen
following test specifications for other components like bushings and voltage measurement devices. This
duration was chosen to cover most of the fast charging processes for these components, excepting
insulators, and remains as a compromise which could also be applied to gas-insulated HVDC systems.
For insulators, an additional type test is defined in chapter 7.4.7.
The tests have to be carried out for unipolar (same polarity) and bipolar (opposite polarity) superposition
of impulse voltage at rated DC voltage UrDC (Figure 7.3-1).
Each test series consists of at least 15 impulses [10]. The time between two successive impulses shall
be not less than 1 minute. In order to check the superposition and the impulse time parameters, pre-
shots may be applied in advance to adjust the impulse voltage generator. The use of appropriate
methods, such as the application of two impulses between 60 % and 80 % of the rated withstand
voltage before the test, is recommended. Additional impulses up to a maximum of 60% of the rated
withstand voltage before the test are allowed.The superposition of an impulse wave on a DC voltage is
obtained by using a blocking capacitor or a sphere gap and a current limiting resistor (Figure 7.4-1,
Figure 7.4-2) [12].
The results according to both procedures are considered equivalent.
The test is valid and the relevant requirements are fulfilled by performing and passing either one of the
alternative procedures.
The choice of the blocking elements for the DC voltage has an influence on the protection effect and
the waveform. Using coupling capacitors, the coupling capacitor and the test object form a capacitive
voltage divider. Therefore, the DC voltage UDC and the impulse voltage generator output UIG out can be
added to receive approximately the amplitude of the superimposed voltage ÛLI/ ÛSI. Spark gaps show a
different behaviour; upon ignition of the spark gap, the test object is directly connected to the impulse
voltage generator. Therefore, in this case, the amplitude of the composite voltage ÛLI/ ÛSI is equal to
the generator output voltage UIG out. On the other hand, the impulse voltage waveshape may be not in
accordance with the standard LI or SI waveshape. In any case, attention must be paid to the design of
the test circuits, and in particular, the coupling elements. Details and recommendations for tests with
superimposed voltages are described in chapter 8.1.
The time parameters shall meet the requirements of IEC 60060-1 [10] and shall be determined with the
DC voltage source set to zero output or disconnected, i.e. without energising the test object with DC
voltage, and with the spark gap short-circuited. Once the time parameters have been determined, there
shall be no changes to the test setup other than connecting the DC voltage source and removing the
short-circuit across the spark gap.
The front time of LI and the time to peak of SI for superimposed voltages cannot be defined according
IEC 60060-1 [10], in the case of sphere gaps (Figure 7.4-2), as the ignition of the sphere gap is a
random process and the transient voltage after ignition of the sphere gap does not meet the IEC’s
voltage waveforms. It should be set up such that the sphere gap always ignites between 50% – 90%
of the voltage difference between impulse and direct voltage. The time to half-value for LI and SI is
defined according IEC 60060 [10].
133
In case blocking capacitors (Figure 7.4-1) are used, the definitions of time parameters for LI and SI
given according IEC 60060 [10] have to be met, taking into account the DC offset.
The preferred method to measure the impulse voltage is by using an approved measuring system
according to IEC 60060-2. Alternatively, the method described in chapter 8 may be used at the discretion
of the manufacturer.
Damping Blocking
Resistor Capacitor
Impulse-Divider
DC-Source
Test object
generator
Mixed-Divider
Impulse
DC-Divider
Measurement system
Figure 7.4-1: Superposition of an impulse waveform on a DC voltage, obtained by use of

a blocking capacitor and a current limiting resistor [12]
Damping
Resistor Sphere Gap
Impulse-Divider
DC-Source
Test object
generator
Mixed-Divider
Impulse
DC-Divider
Measurement system
Figure 7.4-2: Superposition of an impulse waveform on a DC voltage obtained by use of a

sphere gap with the impulse voltage divider connected to the impulse generator side
[12]
7.4.5 Polarity reversal test

The polarity reversal test is applicable for LCC applications only. The dielectric stresses are covered by
more critical tests, e.g. the superimposed voltage tests. Therefore, polarity reversal tests are optional
tests and not mandatory. Nevertheless, a proposal for a test procedure is given below in Figure 7.4-3.
134
Figure 7.4-3: Proposal for polarity reversal test profile
The duration of pre-stress with DC test voltage UT shall be t1. After the polarity reversal, the duration
of the opposite test voltage shall be t1. After this procedure is completed, an additional DC voltage stress
shall be added, consisting of again applying the opposite polarity ( t2) [9]. Preferred values for the
durations of each step are given below in Table 7.4-1. The recommended time duration for a polarity
reversal is also given in Table 7.4-1 [5].
Table 7.4-1: DC polarity reversal test (PRT)
Time PRT Procedure 1 PRT Procedure 2

t1 120 min time equivalent to transition time to
reach 90% of the DC steady state
duration dDC
t2 45 min 45 min
time duration for a < 2 min < 2 min
polarity reversal
The test shall be carried out for positive and negative polarity at DC test voltage UT.
No breakdown is allowed.
Note 1: If, for practical reasons, polarity reversal cannot be achieved within 2 minutes, the duration for
polarity reversals shall be agreed between customer and supplier [5].
7.4.6 Voltage test across open switching devices

The voltage tests across open switching device (Figure 7.4-4) are divided in two parts:
135
GIS enclosure
Figure 7.4-4: Diagram of connection of open switching device
a) DC-withstand voltage tests
The test has to be carried out according to 7.4.3, with rated DC withstand voltage UrwDC for the
following combinations shown in Table 7.4-2 and both polarities (positive and negative):
Table 7.4-2: DC withstand voltage test conditions
Test condition Voltage applied to Earth connected to

1 A B, E
2 B A, E
b) Combined voltage tests
The test has to be carried out according to 7.4.3 with rated DC-voltage UrDC and rated impulse
voltage (Us and Up) for the combinations shown in Table 7.4-3.
Table 7.4-3: Combined voltage test conditions
Test DC voltage and Impulse voltage and Earth

condition polarity applied to polarity applied to connected to
1 A (positive DC) B (negative impulse voltage) E
2 A (negative DC) B (positive impulse voltage) E
3 B (positive DC) A (negative impulse voltage) E
4 B (negative DC) A (positive impulse voltage) E
7.4.7 DC insulation system test

For verification of the insulation system under high load (HL) condition and DC steady state, a long
duration voltage test has to be carried out. Normally, for well-designed systems using typical cone-type
or flat disk insulator geometries, the maximum electric field stress occurs on the surface of the insulator
under no-load or high-load condition. This is valid for both insulators with low conductivity (duration d
< duration dDC) and insulators with high conductivity (duration d ≥ duration dDC). Further explanations
are given in chapter 6. The aim of the insulation system test is to verify the dielectric performance of
gas-insulated HVDC systems under high load conditions. Tests under no load conditions are described
in chapter 7.6. In case of doubts, the worst case load condition has to be defined by simulations using
the real insulator geometry.
The duration of the test can be approximated with the following methods [22], [6]:
1) Worst case approximation of dielectric time constant m = 0r/
136
2) DC electric field simulation; a simulation verified by experiments (at least by means of model
arrangements) has to be used [19], [26], [16]. Material and gas characterisations which are
relevant for the numerical model must be provided [20], [18]. The scalability of the model has
to be demonstrated. Of importance are the electric field strength, temperatures, and
temperature gradients; these parameters have to represent realistic service conditions.
3) Measurement of the DC potential field on the actual insulator surface in energized state at
different locations along the insulator radius. The temperature gradient across the insulators
shall represent the worst case under service conditions with tolerances lower than 20%. The
DC voltage during the measurement on the actual insulator shall be representative for service
conditions, which could be considered as proven for a DC voltage higher than 80% of the rated
DC voltage. If the measurements are only possible at lower DC voltages, the independence of
the charging duration on the voltage must be verified by suitable tests. More information is
given in section 4.3.2 of this brochure.
The relevant requirements are fulfilled by demonstrating either one of the alternative methods. Further
details are given in Section 4.3 of this brochure.
Note 1: Also the surface conductivity of the insulating material shall be measured. If the charge
transport in the solid insulation is dominated by the bulk conductivity compared to the charge transport
caused by a surface conductivity, only the bulk material has to be taken into account for calculation of
the dielectric time constant (in case of dominant bulk conductivity).
Note 2: Especially in the case of the third method, the time to reach the DC steady state tDC is not
directly determined. In those cases, dDC is considered to be fulfilled if the rate of change of the measured
potential field is lower than 10% of the initial rate (initial time delays shall be ignored).
The transition to a DC field distribution could lead to long test durations, lasting from hours to months.
The insulation system test needs to be carried out once only, unless there is a substantial change in the
solid insulating system with respect to materials, manufacturing processes, construction, design
parameters, or requirements [19], [22], [21].
7.4.7.1 Test object

A minimum of 5 insulators (support and partition) of each type shall be tested.
For other insulators such as disconnector shafts, rods or tubes in minimum 3 samples shall be tested.
For surge arrestors it is only necessary to verify the insulation performance of the interface between
surge arrestor and gas-insulated HVDC system, if the design is different from the other insulators.
7.4.7.2 Test sequence

The time span of the long-duration continuous DC voltage test depends on the transition time from
capacitive to resistive field conditions tDC and has to be calculated before starting the tests. The transition
time itself depends on the local temperature distribution and on the lowest temperature ([19] and Table
7.4-4).
Notes:
The time duration under high load condition (HL) can be reduced by increasing the ambient
temperature, e.g. by enclosing the test device within an additional housing and providing means to
circulate the air to achieve homogeneous temperature distribution inside the housing.
The test can be divided into 2 to 4 test series with different DC voltage polarities (only positive or
negative DC voltage for the long duration continuous DC voltage test phase) and with different
superimposed impulse voltages (lightning or switching). The test can also be performed using identical
test objects.
The DC transition duration tDC is to be defined as transition time by simulations and / or measurements
before the insulation system test.
The test has to be carried out at DC, LI and SI rated voltages (7.3.2) according sequence in Table 7.4-4:
137
Table 7.4-4: Sequence of DC insulation system test
Test Conditions Load Remark

Thermal Pre-Test Heating @ defined HL thermal
temperature ±5 K calibration1*)
Dielectric Pre-Test PD test with AC or DC ZL according 7.4 or
voltage 7.4.2 2*)
Long-duration continuous DC voltage Rated DC voltage UrDC HL duration tDC
test (one polarity)
Superimposed lightning impulse voltage Rated LIWV values, HL 3 impulses3*) 4*) 5*)
test (bipolar and unipolar) superimposed to the 7*)
rated DC voltage UrDC

Superimposed switching impulse voltage Rated SIWV values, HL 3 impulses3*) 4*) 5*)
test (bipolar and unipolar) superimposed to the 6*) 7*)

Long-duration continuous DC voltage Rated DC voltage UrDC HL duration tDC
test (other polarity)
Superimposed lightning impulse voltage Rated LIWV values, HL 3 impulses3*) 4*) 5*)
test (bipolar and unipolar) superimposed to the 7*)

Superimposed switching impulse voltage Rated SIWV values, HL 3 impulses3*) 4*) 5*)
test (bipolar and unipolar) superimposed to the 6*) 7*)

1*)
During the thermal calibration test, the current has to be determined for the maximum
conductor temperature and maximum temperature drop across the solid insulators. This current
has to be used for the long duration continuous DC voltage test. For the DC insulation system
test, a higher equivalent DC or AC current compared to DC rated current is allowed, because
the maximum conductor temperature and maximum temperature drop across the insulation
must be safely achieved.
2*)
Before starting the DC insulation system test, further pre-testing under the responsibility of the
manufacturer is allowed.
3*)
Because of laboratory constrains, it may be necessary to interrupt the heating of the test object.
The maximum heating interruption time should be less than 60 minutes. After a heating
interruption and before further tests, the steady state temperature must be reattained.
4*)
Due to laboratory constraints, it may be necessary to disconnect the test object from the DC
source. The DC voltage drop at the test object shall not exceed 5% of the test voltage while
disconnecting. To verify the voltage on the test object during the disconnect interval, the DC
voltage has to be measured using adequate voltage measurement instruments. Alternatively,
the electrical time constant of the whole test device (between the disconnecting points) could
be measured before starting the test and used to calculate the test voltage drop.
5*)
The order of superimposed voltage tests is not of importance. It is possible to start with positive
or negative polarity. Moreover, the order of lightning or switching impulses could be chosen
according to the laboratory constraints.
6
*) The S/IMP tests with LI or SI can also be carried out in separate test sequences, if a long
interruption time between LI and SI testing or vice versa becomes necessary. In this case, it
has to be ensured that the DC steady state is obtained again before S/IMP testing.
7*)
If the rated lightning impulse voltage is 1.3 times of the rated switching impulse voltage or
larger, superimposed tests with switching impulse voltages are not mandatory.
8*)
The test is valid and the relevant requirements are fulfilled by performing and passing the tests
in accordance with Table 7.4-7 or either one of the alternatives 5*) or 6*).
During the long duration continuous DC voltage test, partial discharges, temperature (ambient and
enclosure), test current and test voltage should be monitored and the measured data recorded. The
measured temperatures should be compared to data obtained from thermal calibration test. It is also
an advantage to apply arc detection and gas quality/pressure measurements.
The time between two successive impulses shall be not shorter than 1 min.
138
Generally, the verification of the dielectric performance under polarity reversals is covered by
superimposed voltage tests. Therefore, the time to change the polarity during the DC insulation system
tests could be chosen based on the possibilities and limitations of the laboratories (hours to months).
The two test parts for the different polarities are independent tests.
7.4.8 Criteria to pass the test
a) Short-duration power-frequency and DC withstand voltage tests and polarity reversal tests:
The gas-insulated HVDC system shall be considered to have passed the test if no disruptive discharge
occurs.
b) Impulse tests and superimposed voltage tests:
The following test procedure B of IEC 60060-1, adapted for switchgear that have self-restoring and
non-self-restoring insulation, is the preferred test procedure [10].
The gas-insulated HVDC system has passed the impulse tests if the following conditions are fulfilled:
 Each series consists of at least 15 impulses;
 The number of disruptive discharges shall not exceed two for each complete series;
 No disruptive discharge on non-self-restoring insulation or on insulator surfaces shall occur. This
is confirmed by 5 consecutive impulse withstands following the last disruptive discharge and a
visual inspection of all insulator surfaces in case of disruptive discharges. Flashover tracks are
not allowed. Therefore this procedure leads to a maximum possible number of 25 impulses per
series.
c) DC insulation system tests:
The following test procedure A of IEC 60060-1 is the preferred test procedure [10]. The test procedure
is recommended for tests on degradable or non-self-restoring insulation normally, but in the case of a
DC insulation system test, if a flashover in the self-restoring insulation (gas) occurs, the electric field
distribution could be changed. Therefore, the procedure A was chosen as preferred procedure.
The gas-insulated HVDC system has passed the impulse tests if the following conditions are fulfilled:
 Each series consists of at least 3 impulses;
 Three impulses of the specified shape and polarity at the specified withstand voltage level are
applied to the test object. The requirements of the test are satisfied if no indication of failure is
obtained.
 A visual inspection of all insulator surfaces is mandatory. Flashover tracks are not allowed.
Test overview
An overview of all type, routine, on-site, and special tests, with reference to the relevant technical
brochure, is given in Table 7.5-1. The order or sequence of tests is not specified and could be adopted
to prevailing needs.
139
Table 7.5-1: Type, routine and special tests
Test Clause
Type Routine On-site Special
Non-dielectric tests for insulators 7.6.3 - -
DC withstand voltage tests 7.6.4 - -
Power-frequency voltage tests - 7.7 7.8
Polarity reversal tests (7.4.5) - -
not mandatory
Superimposed voltage tests 7.6.5 - -
Switching impulse voltage tests (7.6.6) - -
not mandatory
Lightning impulse voltage tests (7.6.7) - -
not mandatory
Partial discharge tests 7.6.8 7.6.8 7.6.8
Voltage tests across open 7.6.9 - -
switching devices
Load conditions tests (7.6.10) - -
not mandatory
DC Insulation system tests 7.6.11 - -
Prototype installation test - - - 7.9
Type Tests
Each test object shall faithfully conform to its own particular construction drawings and be fully
representative of its type, and shall be subjected to one or more type tests. The type tests may be
grouped for convenience of testing.
7.6.1 Range of approval
In general, IEC 62271-1 [3] is valid: "The type tests are for the purpose of proving the ratings and
characteristics of switchgear and controlgear, their operating devices and their auxiliary equipment."
The type approval shall be accepted as valid for the gas-insulated system within the scope of this
recommendation if the following conditions are fulfilled:
a) The actual designs, materials, manufacturing processes, and service conditions for the
gas-insulated system are in all essential aspects equal.
b) All service voltages UrDC, Us and Up are less than or equal to those of the gas-insulated
system tested.
c) The limiting temperature of the various parts is not higher than that of the gas-insulated
system tested.
d) A gas-insulated HVDC system prequalified according to this recommendation is
prequalified for LCC and VSC.
7.6.2 Test objects
The gas-insulated system and accessories shall be assembled in the manner specified by the
manufacturer’s instructions with grade and quantity of materials supplied.
7.6.3 Non dielectric tests for insulators
All DC insulators have also to fulfil the non-dielectric requirements according IEC 62271-203 [1]:
 6.104 Pressure test on partitions
 6.106 Insulator tests (After the test sequence, all insulators shall be tested in accordance with
routine tests 7.5, 7.104 [1] and voltage test as condition check according sub clause 7.6.4 of
the present document)
140
7.6.4 DC withstand voltage tests

The test has to be carried out according to 7.4.3, at ambient temperature and under zero load condition.
The DC withstand voltage test can be combined with partial discharge tests at DC voltage stress
according to 7.4.2.
7.6.5 Superimposed impulse voltage tests
The test has to be carried out according to 7.4.4, at ambient temperature and under zero load condition.
Sub clause 6.2.4 of IEC 62271-1 is applicable [3].
7.6.6 Switching impulse voltage tests
This test is not mandatory because the test is covered by the superimposed voltage tests.
The test has to be carried out at ambient temperature and under zero load condition, with rated values
according to IEC 62271-1 [3]. Criteria to pass the test: subclause 7.2.5 of IEC 62271-1 is applicable [3].
7.6.7 Lightning impulse voltage tests
This test is not mandatory because the test is covered by the superimposed voltage tests.
The test is to be carried out at ambient temperature and under zero load condition, with rated values
according to IEC 62271-1 [3]. Criteria to pass the test: sub-clause 7.2.5 of IEC 62271-1 is applicable
[3].
7.6.8 Partial discharge tests
The partial discharge test at ambient temperature and under zero load condition has to be performed
on those test objects which have successfully passed DC withstand voltage tests, superimposed voltage
tests, and the switching and lightning impulse voltage tests.
It is preferred to carry out the test at AC voltage stress including an AC pre-stress according to 7.4. If
AC voltage tests are not possible due to laboratory limitations, the partial discharge test can be carried
out at DC voltage (according to 7.4.2).
The test is valid and the relevant requirements are fulfilled by performing and passing either one of the
alternative procedures.
7.6.9 Voltage tests across open switching device
The test is to be carried out at ambient temperature according 7.4.6. Criteria to pass the test: Subclause
7.2.5 of IEC 62271-1 is applicable [3].
7.6.10 Load condition tests
This test is not mandatory because the test is covered by superimposed voltage tests at zero load along
with the DC insulation system test.
Dielectric tests of the gas-insulated system under high load condition (7.3.5) shall be carried out at
ambient temperature and equivalent DC or AC current, but only in case of doubt.
 DC withstand voltage test according to 7.4.3. The DC voltage shall be applied for a period of
1 min after thermal stabilisation (duration d).
 Superimposed impulse voltage test according to 7.4.4. Criteria to pass the test: subclause 7.2.5
of IEC 62271-1 is applicable [3].
 If specified: polarity reversal test according to 7.4.5.
7.6.11 DC insulation system test
The test has to be carried out according to section 7.4.7.
The criteria for a successful outcome of the DC insulation system test are to pass all tests without
breakdown or flashover of the test object.
If a breakdown or flashover occurs in a test object, the test of the affected DC polarity shall be repeated
for this particular test object. If partial discharges higher than 5 pC are detected in the gas-insulated
system, the location of the partial discharge shall be evaluated.
The DC insulation system test qualifies the insulators for HVDC applications provided that the following
conditions are fulfilled:
a) The rated DC voltage UrDC is not higher than that of the tested system.
b) The maximum conductor temperature is less than or equal to that of the tested system.
141
c) The maximum temperature drop across the insulator is less than or equal to that of the
tested system.
For gas-insulated systems the DC insulation system test is applicable for LCC and VSC systems.
Routine Tests
Routine tests are made to demonstrate the integrity of the manufactured assembly units.
Experience using DC voltage for routine testing of gas-insulated systems is limited. Therefore, the
routine test should be carried out completely at AC voltage according IEC 62271-203 [1]. Alternatively,
tests at DC voltage are allowed.
 Ûpre-stress AC is the AC pre-stress voltage Ûpre-stress AC = 1.5 x UrDC before measurement of the PD
behaviour
 Ûpd-test AC is the AC test voltage Ûpd-test AC = 1.2 x UrDC for PD measurement for at least 1 min
On-site Tests
Experience using DC voltage for on-site testing of gas-insulated systems is limited. Therefore, the test
should be carried out with AC voltage according IEC 62271-203 (10.2.101.2) [1] and / or IEC 62271-
204 [2]. Alternatively, tests at DC voltage are allowed.
 Ûpre-stressAC is the AC pre-stress voltage Ûpre-stress AC = 1.5 x UrDC before measurement of the PD
behaviour
 Ûpd-testAC is the AC test voltage Ûpd-test AC = 1.2 x UrDC for PD measurement for at least 1 min

7.9.1 Range of approval
This test is not mandatory (section 6.4.1). Proposals are given as follows: the prototype installation test
is intended to indicate the long-term performance of the complete gas-insulated HVDC system and is
normally to be completed after the type tests have been carried out (section 6.4.2).
The prototype installation test additionally helps to qualify the manufacturer as a supplier of a gas-
insulated HVDC system provided that the following conditions are fulfilled:
a) The rated voltage UrDC of the HVDC system is not higher than that of the gas-insulated system
tested.
b) The rated current IrDC of the HVDC system is not higher than that of the gas-insulated system
tested.
c) The limiting temperature of the various parts in the HVDC system is not higher than that of the
gas-insulated system tested.
7.9.2 Test objects
The gas-insulated system and accessories shall be assembled in the manner specified by the
manufacturer’s instructions with the appropriate grade and quantity of materials supplied.
7.9.3 TEST SEQUENCE
The test sequence shall contain ZL and HL conditions (section 6.4.4.1). After each HL and ZL long-term
stress, superimposed voltage tests shall be performed. General recommendations for the test:
a) Conductor heating with rated current of the system (AC, representative AC or DC – section
6.4.3.2) (HL).
b) Enclosure/ambient temperature and PD should be monitored and recorded.
c) Indoor or outdoor testing is possible at ambient temperature.
Testing at ambient temperature means that the dielectric time constant could be higher compared to
the insulation system test if this test was carried out at maximum permissible ambient temperature
(subclause 7.6.11).
142
Often the gas-insulated system will be connected to a HVDC extruded cable. Basic considerations of
chapter 9 shall be taken into account for this case.
The following proposed test sequences shall be considered for testing of a prototype installation (Table
7.9-1).
Table 7.9-1: Test sequence for prototype installation test
HL 1 ZL HL 2
Cond. check
DC pol. + - + - + -
voltage UT UT UT UT UT UT UT UT UT UT UT UT
Pre-test
+SI/-SI
+SI/-SI
+SI/-SI
+SI/-SI
+SI/-SI
+SI/-SI
+LI/-LI
+LI/-LI
+LI/-LI
+LI/-LI
+LI/-LI
+LI/-LI
Days 30 30 30 30 30 30 30 30 30 30 30 30
Load HL HL HL HL ZL ZL ZL ZL HL HL HL HL
Note 1: It is allowed to combine the S/IMP voltage testing of LI and SI. This results in 60 days
DC testing and S/IMP LI + SI testing. A resulting test sequence is given in Table 7.9-2.
Note 2: It is allowed to change the sequence in Table 7.9-1. This means the sequence of HL
cycle 1, HL cycle 2 and ZL cycle can be changed. Table 7.9-1 starts the cycle with positive
polarity and ends with negative polarity. It is allowed to change this as well, even
between the cycles. Table 7.9-1 specifies S/IMP voltage tests with LI first and SI at the
next sequence, but it is allowed to interchange LI and SI. During S/IMP testing, the
laboratory may decide in which sequence unipolar or bipolar S/IMP tests will be
performed. Changes are possible as long as all states in Table 7.9-1 are reached and
each long-term stress is finished with a superimposed voltage test. A resulting test
sequence is given in Table 7.9-2.
UT is equal to 1.2 x Urdc
+LI/-LI 3 superimposed impulse tests with +1.0 x Urdc and -0.8 x UP
3 superimposed impulse tests with +1.0 x Urdc and +0.8 x UP
or
3 superimposed impulse tests with -1.0 x Urdc and +0.8 x UP
3 superimposed impulse tests with -1.0 x Urdc and -0.8 x UP
(refer to sections 6.4.3.3 and 6.4.3.4)
+SI/-SI 3 superimposed impulse tests with +1.0 x Urdc and -0.8 x US

3 superimposed impulse tests with +1.0 x Urdc and +0.8 x US
or
3 superimposed impulse tests with -1.0 x Urdc and -0.8 x US
3 superimposed impulse tests with -1.0 x Urdc and +0.8 x US
(refer to sections 6.4.3.3 and 6.4.3.4)
Pre-test: refer to section 7.9.3.1
Cond.
check refer to section 7.9.3.2
The transition time to a DC field distribution (DC steady state) for a gas-insulated system tDC should be
considered for definition of the test duration. For example, Table 7.9-2 considers 60 days testing time,
which may be more suitable for low conductive insulation material.
Table 7.9-2 shows an example of a modified test sequence for prototype installation tests, in the case
a total testing time of 60 days or a combined testing of LI and SI is preferred. Compared to Table 7.9-1,
the number of days was increased to 60 days. This is especially of interest if the insulation material has
a very low conductivity. In order to achieve suitable impulse voltage testing, the S/IMP SI and LI tests
have to be performed directly after the 60 days.
Furthermore, the sequence for HL 1 and ZL was changed in order to place the more critical tests at the
beginning of the prototype installation test.
143
Table 7.9-2: Test sequence for prototype installation test with combined SI and LI and changed
sequence.
ZL HL 1 ZL HL 1 HL 2
Cond. check
DC pol. - - + + - +
Pre-test
voltage UT UT UT UT UT UT
+SI/-SI
+SI/-SI
+SI/-SI
+SI/-SI
+SI/-SI
+SI/-SI
+LI/-LI
+LI/-LI
+LI/-LI
+LI/-LI
+LI/-LI
+LI/-LI
Days 60 60 60 60 60 60
Voltage ZL HL ZL HL HL HL
7.9.3.1 Pre-test
The pre-test shall ensure that the test object is in good condition before the main testing starts. This
defines the reference point for the long-term test and the condition check after the test. Site acceptance
test (SAT) procedures could be used as reference for pre-tests. Furthermore, the pre-test ensures that
the test object is able to withstand the AC field stress (refer section 6.4.4). The following test sequence
shall be performed during the pre-test (Table 7.9-3).
Table 7.9-3: Pre-test procedure for the prototype installation test
Test: Test criteria: Current: Voltage:

1 Thermal-mechanical Stationary, if maximum temperature IAC or IDC 0
pre-stress change of the test object is ±5 K
within 1 h
2 Cooling down 24 h cooling 0 0
3 PD test According to section 7.3.2 and 7.6.8, 0 Upre-stressAC, Upd-testAC
at AC or DC voltage or
Upre-stressDC, Upd-testDC
4 S/IMP LI + SI test According to section 7.9.3. No 0 +LI/-LI
flashovers are allowed. +SI/-SI
(refer table 7.9.1)
If switching components are included in the test object, the commissioning of the switching devices
shall be performed with mechanical operation tests according to IEC 62271-203.
7.9.3.2 Condition Check

Following the conclusion of the long-term test, a condition check of the overall system shall be carried
out to prove its integrity.
Table 7.9.4: Condition check for the prototype installation test.
Test: Test criteria: Current: Voltage:

1 PD test According to section 7.3.2 and 7.6.8, 0 Upre-stressAC, Upd-testAC
at AC or DC voltage or
Upre-stressDC, Upd-testDC
2 Visual inspection Opening of the test object and visual 0 0
inspection of parts
7.9.4 Success criteria, re-testing and interruptions

The criteria for a successful outcome of the prototype installation test is that all tests shall have been
performed without breakdown. If there is a breakdown in any part of the test object, the complete
prototype installation test shall be repeated for that particular part of the test object.
If a breakdown of a test object occurs causing an interruption to the ongoing testing of other connected
test objects, the test may be resumed after the failed test object is removed. The cycle (long-term
stress and superimposed voltage test) shall be repeated for the remaining test objects.
After any interruption, for example an interruption caused by external factors, the test may be resumed.
Follow the procedure of section 8.2.
144
IEC 62271-203, “High-voltage switchgear and controlgear, Part 203: Gas-insulated metal-
enclosed switchgear for rated voltage above 52 kV”
IEC 62271-204 Edition 1.0 2011-07, “High-voltage switchgear and controlgear – Part 204:
Rigid gas-insulated transmission lines for rated voltage above 52 kV”
IEC 62271-1: ed. 2.0(2017-07), “High-voltage switchgear and controlgear, Part 1: Common
specifications”
IEC 62271-102: Ed. 1.1, “High-voltage switchgear and controlgear – Part 102: Alternating
current disconnectors and earthing switches, February 2012”
CIGRE TB 496, “Recommendations for Testing DC Extruded Cable Systems for Power
Transmission at a Rated Voltage up to 500 kV”
IEC 60633, “Terminology for high-voltage direct current (HVDC) transmission”
CIGRE TB 289, “VSC Transmission”, CIGRE WG B4.37, April 2005
IEC 60071-5 Ed. 1, “Insulation co-ordination – Part 5: Procedures for high-voltage direct
current (HVDC) converter stations”, 2014
IEC/IEEE 65700-19-03 Ed. 1, “Bushings for DC application”; 2014
IEC 60060-1: ed3.0: “High voltage test techniques: Part 1: General specifications and test
requirements”, Publication date 2010-09-29
IEC 60270, Edition 3.1, “High-voltage test techniques – Partial discharge measurements”,
2015-11, Consolidated version
ELECTRA No. 189, “Recommendations for Tests of power Transmission DC Cables for a Rated
Voltage up to 800 kV”, April 2000
U. Straumann, U. Riechert, R. Gremaud, M. Schueller, C.M. Franck, “HVDC Insulator Charging
in SF6 Insulated Systems“, DPG Frühjahrstagung, Deutsche Physikalische Gesellschaft e.V.,
P 21: Plasma Technology II, P21-1, Berlin/Germany, March 17-21, 2014
U. Riechert, F. Blumenroth, P. Skarby, “Testing methods of gas-insulated HVDC components
and switching equipment” (in German), GIS – Anwender Forum, Fachtagung:
Hochspannungs-Schaltanlagen: Anwendung, Betrieb und Erfahrungen, 14. October 2014,
Welcome Hotel Darmstadt, Germany, 2014
M. Hering, J. Speck, S. Großmann, U. Riechert, St. Neuhold, “Detection of Particles on the
Insulator Surface in Gas-Insulated DC Systems”, HighVolt Kolloquium 2015, May 07-08, 2015,
Radebeul bei Dresden, Confrence paper 1.3, Proceedings, pp. 25-32
M. Hering, J. Speck, S. Grosmann, U. Riechert, "Field transition in gas-insulated HVDC
systems", IEEE Transactions on Dielectrics and Electrical Insulation, vol. 24, issue 3, p. 1608 –
1616
R. Gremaud, et al., “Measurement of DC conduction in alumina-filled epoxy”, 2016 IEEE
International Conference on Dielectrics (ICD), 2016, pp. 1097-1101
B. Lutz, J. Kindersberger, “Surface Charge Accumulation on Cylindrical Polymeric Model
Insulators in Air: Simulation and Measurement”, IEEE Trans. Dielectr. Electr. Insul, Vol. 18,
pp. 2040-2048, 2011
U. Riechert, U. Straumann, “Dielectric Testing of Gas/Solid Insulation Systems for HVDC
GIS/GIL”, CIGRÉ Contribution D1, PS1-Q1-02, 45th CIGRÉ Session, August 24-August 30,
2014, Palais des Congrès de Paris, Paris, France, 2014
U. Straumann, et al., "Theoretical investigation of HVDC disc spacer charging in SF6 gas
insulated systems," Dielectrics and Electrical Insulation, IEEE Transactions on, vol. 19, pp.
2196-2205, 2012
E. Sperling, U. Riechert, “HVDC GIS RC-dividers in new GIS substations with increased
dielectric requirements”, 2015 CIGRE SC A3 (High Voltage Equipment) & B3 (Substations)
145
Joint Colloquium : Challenges for Future Reliability of T&D Substations and Equipment, 28
September – 2 October 2015, Nagoya, Japan
Colloquium 2013 CIGRÉ Study Committee D1 (Materials and Emerging Test Techniques), Rio
IEC 60071-5 Ed. 1: Insulation co-ordination – Part 5: Procedures for high-voltage direct
current (HVDC) converter stations, 2014
IEC/IEEE 65700-19-03 Ed. 1: Bushings for DC application; 2014
IEC 60060-1: ed3.0: High voltage test techniques: Part 1: General specifications and test
requirements, Publication date 2010-09-29
Colloquium 2013 CIGRE Study Committee D1 (Materials and Emerging Test Techniques), Rio
146
8. Test equipment, test procedures

Superimposed voltage tests
The aim of this chapter is to describe the phenomena to be observed when testing with superimposed
voltages and to provide information with respect to systematic procedures.
8.1.1 General
Gas-insulated components of the electrical power system are stressed by operating voltages and
switching or lightning impulse overvoltages. Typically, overvoltages are superimposed on the operating
voltage. According to IEC 60060-1 [1], the test of the insulation strength of electrical equipment is first
performed by pure voltage stresses (AC, DC, SI, LI). To assure optimal dimensioning in preparation for
grid operation, the insulation system then has to be tested with a simultaneous stress consisting of the
operating DC voltage and the lightning or switching impulse voltage superimposed upon it. This
simultaneous stress using voltages with different time characteristics is called superimposed voltage
stress. Generally, IEC 60060-1 distinguishes between combined and composite voltages, depending on
the test object. Combined voltages are relevant on three terminal test objects and composite voltage
on two terminal test objects [1][2]. For gas-insulated HVDC test objects, composite voltages are
relevant.
Especially in the case of dielectric interfaces, the pre-stress with DC may lead to changes in behaviour
during subsequent impulse voltage application, due to the accumulation of surface and space charges.
Hence, the dielectric performance of so-called 'charged insulators' has to be ensured for all service
conditions by applying superimposed impulse voltage stress. To be in line with common specifications,
impulse voltage types are based on IEC 60060-1.
Figure 8.1-1: Principle test circuit for composite voltages according to IEC 60060-1 [1]
8.1.2 Generation of superimposed voltages

Superimposed or composite voltages are generated by the interconnection of two high voltage sources,
e.g. a DC source and an impulse voltage source. For this interconnection, so-called blocking and coupling
or protection elements are necessary (see section 8.1.3).
The general test circuit for generating composite voltages according to IEC 60060-1 is shown in Figure
8.1-1. HV source 1 might be the DC generator and HV source 2 the impulse voltage generator.
8.1.2.1 Options for superimposed voltages
When superimposing two voltages, one distinguishes between unipolar or same polarity, and bipolar or
opposite polarity superposition. The four quadrants of superposition can be seen in Figure 8.1-2 [3].
147
Figure 8.1-2: Four quadrants of superposition DC and impulse voltage (see Figure 7.3-1)
Analysis of the measuring results is done with the 4-quadrants diagram inFigure 8.1-3. The x-axis shows
the value of the applied DC voltage UDC. The y-axis describes the composite voltage ÛLI, ÛSI of DC
voltage UDC and impulse voltage UIG out. The diagonal of the quadrants I and III is equivalent to a pure
DC voltage [4][5].
Figure 8.1-3: Principle of the 4-quadrants diagram according to [4][5]
Figure 8.1-3 shows examples for unipolar and bipolar lightning impulse voltage. By the use of coupling
capacitors, the coupling capacitor and the test object form a capacitive voltage divider. Therefore, the
DC voltage UDC and the impulse voltage generator output UIG out can be added to obtain the approximate
magnitude of the superimposed voltage ÛLI or ÛSI respectively. The sum is dependent on the factor
𝑘CC−CL (refer UIG out* and section 8.1.5) of the voltage divider between coupling capacitor and test
object.
148
Spark gaps exhibit a different behaviour, since by ignition of the spark gap, the test object is directly
connected to the impulse voltage generator. Therefore, the magnitude of the composite voltage ÛLI or
ÛSI respectively is nearly equal to the generator output voltage UIG out (refer section 8.1.5).
8.1.2.2 DC voltage source
The DC voltage source comprises a transformer and a rectifier. It must generate test voltages with a
ripple factor lower than 3%, charge up the device under test (DUT) in the shortest possible time, and
supply the leakage currents in the test setup. The capacitances and leakage currents of gas-insulated
HVDC systems are very low, hence a DC source with relatively low output current and power is sufficient.
However, the diodes in the rectifier must provide high dielectric strength for impulse voltages and high
forward current capability in order to allow for fast charging of the DUT.
8.1.2.3 Impulse voltage source
The impulse voltage source must be able to generate standard lightning impulse voltage (LI) as well as
standard switching impulse voltage (SI) according to IEC 60060-1. The generator output voltage UIG out
is equal to the total charging voltage UC multiplied by the voltage efficiency η.
𝑈IG out = 𝜂 ∙ 𝑈C (8–1)
η is the voltage efficiency factor and may be calculated approximately as:
𝐶S
𝜂= 𝐶B ∙𝐶L (8–2)
𝐶S +
𝐶L +𝐶B
To achieve the standard wave shape for LI voltage (1.2/50 μs) or SI voltage (250/2500 μs), the impulse
capacitance CS of the impulse voltage source should be at least 20 times higher than the total load
capacitance (CL= CDUT + Cdivider+ Cstray) [6].
Where:
 CDUT capacitance of the device under test
 Cdivider capacitance of the impulse voltage divider
 CStray stray capacitance.
8.1.3 Coupling and blocking elements

Each voltage source has to be protected against voltages generated by the other source using an
element that couples its own voltage, but blocks the voltage of the other source.
8.1.3.1 Blocking element for impulse voltages
This blocking element not only has to damp lightning and switching impulses, it also has to limit the
current from the DC voltage source during charging of the device under test, and also in the case of
voltage breakdown. A pure inductance presents almost no resistance for DC voltages and damps impulse
voltages very well, but it cannot limit the DC current.
A very high resistance can be realized e. g. by a water, film, or wire resistor [6]. Water and film resistors
allow high resistances >4 MΩ, whereas wire resistors are usually restricted to a maximum of few MΩ.
The resistance can be easily varied by changing the conductivity of the water, if a water-conditioning
unit is available. The length of the water tube can be adjusted according to the clearance required to
safely isolate the test voltage. Because of the small diameter of the water hose, corona discharges can
occur. Also, the resistance of the water resistor decreases during long-term DC voltage application. If
the resistance decreases too much, the protective effect of the resistor might become too low, which
can lead to damages of the DC source. Hence, water resistors are not suitable for long-term DC
application beyond several days. Wire resistors wound on a fiber-reinforced plastic tube with suitable
diameter and length exhibit constant resistance. Their length can be determined according to the
required clearance and the resistance to be achieved. The same holds for film resistors inside a fiber
reinforced plastic tube; in addition these allow a higher resistance in case that is required [7].
149
In case of bipolar superposition, this blocking element will be stressed with very high mixed voltages,
higher than the stress applied to the device under test itself. If a flashover should occur across this
blocking element, the DC voltage source may be damaged.
8.1.3.2 Blocking elements for DC voltage
For blocking the DC voltage, there are mainly two options [4]: a spark gap or a capacitor. The choice
of which of these is used has an influence on the protection effect and the wave shape. Hence, all
options are described below with their most important pros and cons.
Blocking and coupling by spark gap
The spark gap (Figure 8.1-4) has an almost infinite impedance for all voltages, but once it ignites, it
becomes conducting for all voltages. To block DC voltages, the gap distance has to be adjusted so that
the ignition voltage is higher than the DC voltage.
Figure 8.1-4 : Examples for spark gap arrangements
Figure 8.1-5 shows the equivalent circuit for a test setup for superimposed voltages with a spark gap.
Figure 8.1-6 shows different examples for test set-ups using a spark gap. When the impulse voltage
rises and the blocking spark gap ignites, a superimposed voltage is applied to the device under test.
Figure 8.1-5: Example of a test circuit for superimposed voltages with a spark gap as blocking and
coupling element (according to [6])
150
Figure 8.1-6: Examples of test setups with spark gap protection [8][9]
The spark gap for superposition should be adjusted in advance. The gap distance should be set for an
ignition of the spark gap during the front time at a voltage level lower than 80% of the peak value of
the impulse. It should be ensured that the ignition of the spark gap does not disturb the peak form of
the impulse (Figure 8.1-7); otherwise it should be re-adjusted so it ignites at a lower voltage. Figure
8.1-7 shows an example of LI voltage test with spark gap protection measured with a damped capacitive
divider. In the left curve, the ignition voltage of the spark gap is higher than 80% of the LI peak; the
LI peak is subsequently strongly distorted. In the right curve, the spark gap ignition voltage is lower
than 80% of the LI peak; this assures that the LI peak and the relevant part of the front is not distorted.
Figure 8.1-7 : Examples of measured wave shape with damped capacitive divider for sphere gap
ignition during superposition DC and LI. Left: late instant (>80% of peak value) of sphere gap
ignition with subsequent distortion of impulse peak – not recommended. Right: early instant
(<80% of peak value) of sphere gap ignition with no distortion of impulse peak – recommended
[10]
Using a spark gap, the impulse voltage waveshape may be not in accordance with the standard LI or
SI waveshape, resulting in a potentially higher dielectric stress to the insulation of the DUT. Some
reasons for such deviations are:
151
1. Ignition of the spark gap at a certain voltage

level across the gap leads to a higher
voltage steepness in the impulse front
directly at the test object (Figure 8.1-8),
damped by the inductance of the spark gap
and the resistance of the spark only.
2. Depending on the difference between the
DC and impulse voltages and the instant of
the ignition of the spark gap, extinction and
re-ignition may occur during superposition,
especially with superimposed SI voltage
stress (Figure 8.1-9). Typically, the
extinction of the spark gap occurs in the
peak of the impulse voltage when the
current is at its minimum. The test object is
charged with the peak value and has a slow
voltage decay due to its own time constant.
In the tail of the impulse, re-ignition occurs.
During re-ignition the test object is
immediately energized with the residual
Figure 8.1-8: Distortion at the front due to
impulse voltage. This waveshape is not in ignition delay of superimposed SI voltage
alignment with IEC. But due to both effects, [11]
the test object has to withstand a higher
stress than during a superposition with no extinction and re-ignition:
 Extinction at impulse peak
 The test object remains charged at peak voltage with slight decay,
 the test object is exposed to a higher voltage for a longer time
 this leads to higher stress
 Re-ignition of the spark gap in the tail of the impulse,
 a very fast voltage drop to the residual impulse voltage occurs
 again, this leads to potentially higher stress
Figure 8.1-9 : Example of a measured superimposed voltage stress using the spark gap with ignition
in the front, extinction in the peak and re-ignition in the tail of a superimposed SI voltage [12]
If the damping resistance is too high, the arc current in the spark gap may extinguish and re-ignite
repeatedly in the tail, as shown in Figure 8.1-10.
152
Figure 8.1-10: Extinction and re-ignitions in the tail of a superimposed SI voltage [11]
Some further effects can be observed, when using spark gaps:

1. The spark gap extinguishes once the device under test is discharged via the front and tail
resistors of the impulse voltage source (Figure 8.1-11). The DC source has to recharge the test
object, and therefore has to be able to deliver the current for the recharging process.
Breakdown detection units may require adjustment so they do not wrongly detect this behaviour
as an external flashover and disconnect the DC source during this process. However, due to the
short discharge time without grounding, this has no effect on the space and surface charges in
the test object.
Figure 8.1-11: Voltage across the device under test (Red) goes back to zero and not to DC voltage
[11]
2. The ignition of the spark gap is a stochastic process and depends on atmospheric conditions,
affecting the reproducibility of the tests.
3. Considering the unipolar case of the superposition, the voltage difference at the spark gap
terminals has to be higher than the DC voltage, when no active triggering is applied. This means
153
that the impulse generator output before the spark gap flashover has to be at least twice the
DC voltage.
To improve spark gap performance and counter these disadvantages, the following measures can be
carried out:
1. The use of a measuring spark gap as described in IEC 60052 [13] can reduce the ignition delay
time and the high voltage steepness at the front. However, it is often not usable in lab practice
(Figure 8.1-4). Generally, homogeneity of the spark gap (sphere diameter as well as gap
distance) is of influence on the spark development and are parameters for optimisation of the
test circuit. The region of high electric field strength is smaller in more inhomogeneous field
distributions than in homogenous ones. This causes higher formative time lags and higher
scattering of the discharge development due to the smaller number of randomly available
charge carriers. The influence of the gap distance on the voltage shape is exemplarily shown in
Figure 8.1-12.
Figure 8.1-12: Influence of spark gap distance dSG on ignition and extinction behaviour at
superimposed switching impulse voltage (-550 kV DC / +1175 kV SI) [14];
left: dSG=75 cm; right: dSG=40 cm
2. With optimized protection elements, a balance between protection of the voltage generators
and current in the sphere gap can be achieved. An example of the protection resistor size impact
on the voltage shape is given in Figure 8.1-13.
Figure 8.1-13: Influence of protection resistor (RP2) on ignition and extinction behaviour at
superimposed switching impulse voltage (+550 kV DC / -1175 kV SI) [14]
left: Rp2=5 M; right: Rp2=3,75 M
3. The use of a triggered spark gap improves the reproducibility of the tests and ensures the spark
gap ignition in the front. The spark gap flashover distance increases significantly [15][14]. To
154
reduce the high steepness at the front in Figure 8.1-8, the spark gap must be triggered as early
as possible (Figure 8.1-14). Furthermore, with a triggered spark gap, potentially all
superpositions are possible, even unipolar superposition with impulse voltages lower than twice
the DC voltage.
Figure 8.1-14: Example with triggered spark gap at superimposed switching impulse voltage
(+550 kV DC / +1200 kV SI) – no extinction of the spark gap [10]
4. In case of one sphere triggered only, the effectiveness of the trigger unit depends on the polarity
and shape of this sphere. Polarity dependent effects can be greatly reduced using a spark gap
which is triggerable on both sides (Figure 8.1-15) [15][14].
Figure 8.1-15: Both side triggered sphere gap [14][15]
5. Arranging the impulse generator’s load capacitor in parallel to the test object increases the
impulse current through the spark gap and therefore avoids extinguishing effects [15][14].
Hence, the application of the spark gap test circuit requires some optimisation, but it is an appropriate
testing solution for simulating in-service condition requirements.
Blocking and coupling by capacitor
A capacitor (Figure 8.1-16) represents an almost infinite impedance for DC voltages (Figure 8.1-17). Its
reactance depends on its capacitance and the frequency or voltage change respectively. The capacitor
begins conducting at the moment the impulse voltage source is triggered and prevents the discharging
of the device under test.
155
Figure 8.1-16: Examples of coupling capacitor solutions (Presentation to [16]), [17]
Figure 8.1-17: Example of a test circuit for superimposed voltages with a capacitor as blocking and
coupling element (according to [6])
The resulting superimposed voltage follows IEC 60060-1 and is a sum of the DC and the impulse voltage
(Figure 8.1-18). Parasitic inductances in the test setup or in the blocking capacitor itself must be avoided,
otherwise the wave shape of the superimposed voltage can be distorted due to overshoot and additional
oscillations, especially if DC voltage is superimposed with lightning impulse voltage.
The voltage divider, consisting of the load capacitance CL and the blocking capacitance CB, reduces the
impulse voltages (LI and SI) at the DUT and thus the efficiency of the impulse voltage source. Especially
in the case of bipolar superposition, the impulse voltage source must compensate the DC voltage UDC,
the efficiency of the impulse generator, and the voltage drop due to the voltage divider created by CL
and CB. The charging voltage of the impulse voltage generator must be at least equal to:
1
𝑈C = ∙ 𝑈IG out (8–3)
𝜂
𝐶S
𝜂= (8–4)
𝐶B ∙𝐶L
𝐶S +
𝐶L +𝐶B
1
𝑈IG out = ∙ (𝑈DUT − 𝑈DC ) (8–5)
𝑘CC−CL
𝐶B
𝑘CC−CL = (8–6)
𝐶L + 𝐶B
156
1 1
𝑈C = ∙ ∙ (𝑈DUT − 𝑈DC ) (8–7)
𝜂 𝑘CC−CL
The use of a blocking capacitor requires an impulse generator with a higher voltage rating than is the
case when using a spark gap for blocking. However, the efficiency of the impulse source can be
increased by increasing the ratio 𝑘CC−CL , which means that the capacitance of the blocking capacitor CB
must be much higher than the capacitance of the load CL. If, for example 𝐶B = 10 ∙ 𝐶𝐿 , the divider ratio
is 𝑘CC−CL = 0.91. That means 91% of the impulse voltage from the source will be superimposed on the
DC voltage. The blocking capacitor will be stressed only by 9% of the impulse voltage in addition to the
DC voltage, resulting in a lower stress for this blocking element. However, the rated voltage of the
blocking capacitor must be higher than the sum of DC voltage and the generator’s output voltage,
multiplied by the (1-𝑘CC−CL ) factor, in order to avoid damage to the capacitor.
𝑈CB = (1 − 𝑘CC−CL ) ∙ 𝑈IG out − 𝑈DC (8–8)
1 − 𝑘CC−CL
𝑈CB = ∙ (𝑈DUT − 𝑈DC ) − 𝑈DC (8–9)
𝑘CC−CL
If the damping resistor flashes over, the high energy stored in the blocking capacitor may destroy the
rectifier diodes, due to overstressing with too-high reverse voltage or forward current. Furthermore, if
the coupling capacitor itself flashes over, the overall circuit will behave as if testing with a spark gap. It
should be considered that, especially during superimposed tests with opposite polarity, a flashover of
the coupling capacitor may result in high voltage overstresses at the DUT. If the test object flashes
over, the coupling capacitor is stressed with the full impulse generator output. The resulting voltage
and current at the coupling capacitor terminals is higher than the voltage and current during tests with
no flashover of the DUT. The coupling capacitor has to be dimensioned to withstand these stresses.
Figure 8.1-18: Example of wave shape by using a blocking capacitor (DC/LI left und DC/SI right)
[11]
8.1.4 Determination of the time parameters

The time parameters T1/T2 of the lightning impulse and Tp/T2 of the switching impulse should be
determined by performing a calibration impulse test with LI or SI with reduced or full voltage. During
these tests, the DC voltage source shall be disconnected or set to zero output voltage, and the blocking
and coupling spark gap or capacitor shall be short-circuited. According to IEC 60060-1, the
determination of the time parameters requires a zero-base level. T1/T2 and Tp/T2 shall be in accordance
with IEC 60060-1.
157
To adjust the charging voltage to reach the correct magnitude of the LI or SI before the test and to
avoid voltage overstresses at the DUT, further calibration impulses should be performed. During these
calibration impulses, the required DC voltage should be switched on. If possible, the impulse voltage
should be increased gradually to interpolate the charging voltage of the impulse generator for the
desired amplitude.
8.1.5 Measurement of the superimposed voltage
For measuring composite voltages, IEC 60060-1 generally considers three different measurement
options: the two source voltages UDC and UIG out and the composite voltage at the test object UDUT as
indicated in Figure 8.1-17 and Figure 8.1-1. The recommended measurement method is a voltage
measurement at the test object. This requires the converting device 𝑈 ̂SI in Figure 8.1-1 to be a
̂LI , 𝑈
universal voltage divider according to IEC 60060-2 [18]. Its bandwidth has to be large enough and the
ratio shall be constant for all voltages to measure a DC voltage as well as transient voltages such as
lightning or switching impulse voltage [19]. However, if such a divider is not available, a measurement
of the source voltages might be suitable, depending on the test setup.
In the case of the blocking spark gap test setup, the superimposed voltage corresponds to the impulse
voltage measured at the impulse voltage divider (Figure 8.1-19) as long as the spark gap is ignited. If
arc extinction occurs, the measurement at the impulse voltage divider does not represent the voltage
at the test object any longer. During the ignition delay time described in section 8.1.3.2, the impulse
voltage rises across the impulse voltage divider. However, the connection of the impulse voltage divider
is not ideal, since it is connected between the source and the device under test, which is not
recommended by IEC 60060-2. In addition, the DC voltage measured at the source is not equivalent to
the DC voltage at the DUT, which requires a calibration of the DC measurement. Figure 8.1-5 yields:
𝑅L
𝑈DUT = 𝑈DC ∙ = 𝑈DC ∙ 𝑘RD−RL (8–10)
𝑅L + 𝑅D
𝑅L 1
with 𝑘RD−RL = and 𝑅L = 1 1 (8–11)
𝑅L + 𝑅D +
𝑅C 𝑅DUT
Depending on the values of RL and RD, 𝑘RD−RL can be on the order of 95% - 100%, which yields an
inaccuracy of the DC measurement at the source and shows the need for a calibration of the factor
𝑘RD−RL .
Figure 8.1-19 shows a comparison of measurements at the impulse voltage divider and directly at the
test setup, by application of a RC divider.
Figure 8.1-19: Separate measurement of DC and LI voltage and sign oriented addition (left) and
direct measurement at the test object using an RC divider (right) in case of S/IMP testing with
spark gap (according to presentation to [12])
158
A further alternative is the application of a capacitive sensor, directly integrated in the test object. The
measurement of the capacitive sensor shall be calibrated in terms of scale factor and linearity with
short-circuited spark gap and without DC voltage, as a capacitive divider is not capable of measuring a
DC test voltage, but only the voltage slope. [14] gives an example of measurement results at switching
impulse voltage, which is most critical concerning extinction of the spark gap.
Figure 8.1-20: Measurement of S/IMP SI voltage with impulse voltage divider and capacitive
coupler integrated in GIS (spark gap test circuit); left: calibration with short-circuited gap and
UDC = 0 kV; right: superimposed SI voltage with extinctions / re-ignitions of the spark gap [14]
Since the impulse voltage divider measures the actual test voltage as long as the spark gap is ignited,
this gives a decent accuracy even though the composite voltage measurement is still preferred. An
extinction of the spark gap should be avoided because then the measurement of the actual voltage at
the DUT is no longer valid. Nevertheless, this will be visible in the voltage shape of the measurement.
In the case of blocking capacitor test setup, the peak value of the superimposed voltage corresponds
to the sign-oriented addition of the DC and impulse voltage as shown in Figure 8.1-19. The
measurement, however, not only requires the DC calibration as shown before for a spark gap test setup,
but also a calibration of the capacitive voltage drop across the coupling capacitor. Figure 8.1-17 yields:
𝑈DUT = 𝑈IG out − 𝑈CB = 𝑈IG out − ((1 − 𝑘CC−CL ) ∙ 𝑈IG out − 𝑈DC ) (8–12)
𝑈DUT = 𝑘CC−CL ∙ 𝑈IGout + 𝑈DC (8–13)
As mentioned above, 𝑘CC−CL can easily be on the order of 90%, making an accurate calibration
necessary.
For a test setup using a coupling capacitor, the separate voltage measurement cannot be recommended
due to the calibration requirements of the DC and capacitive voltage drops. For this test setup, a
composite measuring system is mandatory. If a separate voltage measurement is necessary due to the
lack of an universal voltage divider, a spark gap setup should be used.
159

8.2.1 Basic test circuit
A typical example of a test circuit for a prototype installation test of gas-insulated systems can be seen
in Figure 8.2-1 (according to [23]). The test arrangement consists of an enclosure (2), the solid (6) and
gaseous insulation (7) and the inner conductor (3). To connect the gas-insulated system to the
generators, connection terminals (11) are required. Based on the test arrangement and the laboratory,
each generator may have separate connection terminals or connection terminals are combined to
connect several generators. Usually these terminals will be gas-to-air bushings (11). The inner conductor
forms a short circuit loop in order to inject high currents.
1. Current source 5. Power transmission path for 1 9. Gas-insulated, metal-enclosed

switches (optional)
2. Enclosure 6. Solid insulation 10. Gas-insulated, metal-enclosed
switch (optional)
3. Inner conductor 7. Gaseous insulation 11. Gas-to-air bushings
4. DC voltage source 8. Impulse voltage source 12. Coupling element
Figure 8.2-1: Basic test circuit for prototype installation test (according to [23])
The inner conductor of the test sample is supplied with continuous DC voltage UT, respectively Ur (4).
Simultaneously a current source (1) is feeding the short circuit loop of the test sample with a current
IAC or IDC. AC current sources usually will be encapsulated. DC current sources usually will operate in
atmospheric air. When using an AC current, the current source can work on ground potential and will
induce an AC current to the inner conductor of at least the equivalent DC current (see chapter 6.1.5).
When using a DC current, the current source (1) has to work on high voltage potential in order to inject
the current into the short circuit loop of the test object. The current source (1) needs to be supplied
with power to generate the high current. In order to solve this issue, a power transmission path to the
current source is needed (5). The power transmission path needs to isolate the DC voltage and
simultaneously feed the current source with power. If the current source is switched on during
superimposed voltage tests, the transmission path (5) also needs to isolate the impulse voltage levels.
An impulse voltage source (8) is connected to the test sample for generating superimposed voltage
tests. The impulse voltage is subjected to the test object by a coupling element (12) for impulse testing
(spark gap or a coupling capacitor - refer section 8.1).
If necessary, optional switches (9) can be used for isolating the impulse voltage USI or ULI during S/IMP
(superimposed impulse voltage) testing, in order to protect the current source (1) and the transmission
path (5) from damage. If the optional switches (9) in Figure 8.2-1 are used, they have to able to switch
160
off the current source while the DC voltage is still in service 2. Further optional switches can be placed
at the DC source connection (10) if the test object shall be floating during interruptions (refer section
6.4.5). No interruptions of the DC voltage should occur during the switching process.
8.2.2 Circuits to generate and inject high current on high voltage potential
Figure 8.2-2 shows basic test circuits to inject AC or DC currents at high voltage potential [24]. (1)
shows the conventional AC current heating with current transformers. The current transformer directly
induces the AC current in the inner conductor. Tests of gas-insulated systems will normally use gas-
insulated current transformers. During AC current heating, induced voltages will occur at the enclosure.
AC current heating of long test loops will require higher reactive power. Compensation at the source
side of the AC current transformer is possible to reduce the required reactive power from the grid. In
this case, the reactive power still needs to be transmitted through the AC current source to the test
object.
1. Inductive AC current injection 4. Inductive DC current injection [21]

2. Capacitive DC current injection [20] 5. Hydraulic power transmission with
3. DC current injection with isolating shaft and hydraulic engines
electrical engines 6. Current injection with isolating
transformers [22]
Figure 8.2-2: Basic current injection test circuit for prototype installation test [24]
2
Optional switches may also be of interest during AC current heating to protect the AC current source from internal flashover
during superimposed voltage testing. Furthermore, if the AC current source is switched on during superimposed voltage tests,
the impulse current through the testing loop has to be considered. Because of the transformer principle, the impulse current will
also affect the AC current heating transformer and the feeding regulating transformer feeding it. Damage of the equipment
because of overvoltage may occur; therefore protection elements for this case should be considered.
161
The AC current injection via current transformer is shown in (1) in Figure 8.2-2. Methods to inject a
high DC current at high voltage potential are shown in (2) to (6) in Figure 8.2-2. All methods for
injecting high DC currents use a rectifier operating at high voltage potential. Therefore, the test object
has to be equipped with a bushing for connection to the DC current source. The capacitive current
injection (2) uses capacitors in order to isolate the high DC voltage and simultaneously transmits power
by high frequency current [20][26]. DC current injection (3) uses a motor-generator-combination
equipped with an insulating shaft to transmit the power. The insulating shaft isolates the high DC
voltage. The inductive DC current injection (4) uses conventional AC current transformers to generate
high AC current in a smaller testing loop, which is than rectified at high voltage potential [21]. Hydraulic
power transmission (5) uses a hydraulic motor-generator-combination with hydraulic pipes made of
insulating material isolating the high voltage. Current injection with isolating transformers uses isolating
transformers connected in series to isolate the voltage and to transmit the power simultaneously [22].
Real prototype assemblies of the DC current injection generators can be found in the literature [20],
[26].
8.2.3 Long-term test sequence
8.2.3.1 Current and Temperature control
To get an overall heating curve of the test assembly and to monitor the thermal steady state,
temperature measurement at the test object is useful. Online temperature measurement of the
complete current loop, in particular of the HV conductor, needs a certain technological expenditure.
Possible options to establish a heating curve of the test assembly would be:
 Potential-free temperature measurement of the inner conductor, (e.g. by optical methods)
 Measurement of the electrical resistance of the inner conductor. The mean value of the
resistance will be proportional to the temperature mean value; note that the measurement has
to be performed at high voltage potential.
 Measurement of the surface temperature of the enclosure at different positions; in this case the
measurement can be performed at earth potential
Thus, it will be possible to establish a general heating curve of the test object. As the ohmic resistance
of the test circuit changes during the test sequence, it might be required to adjust the heating current
to keep it constant. After the heating period, especially before superimposed voltage tests, the testing
current shall be not lower than the required test current.
The ripple of the DC voltage and the applied superimposed voltage shall be in accordance with IEC
60060-1:2010. The ripple of a DC testing current shall be less than about ±3%.
8.2.3.2 Current and voltage measurements
Further subjects of interest for the prototype installation test are:
1. Voltage measurement during superimposed voltage testing (see section 8.1)
2. Determination of the time parameters during superimposed voltage testing (see section 8.1)
3. Current measurement
The current measurement can easily be performed with conventional AC or DC current transformers.
8.2.3.3 Test interruptions and pauses
During the load cycles, the following test interruptions can be assumed (refer section 6.4.5):
 Interruption of the current source
 Interruption of the DC voltage
If the DC voltage is interrupted, the following procedure shall be followed:
 If the interruption time toff <40 min

o If the interruption happens at the end of the cycle
 Recharge the test object with minimum 2 h DC voltage UT (especially before
superimposed voltage testing)
o If the interruption happens during the long-term cycle
162
 The total test time of the long-term cycle must not be extended
 If the interruption time 40 min < toff < 3 days
o If the interruption happens at the end of the cycle
 Recharge the test object with DC voltage, so that the remaining test time is
minimum 3∙toff
o If the interruption happens during the long-term cycle
 Extend the total test time of the long-term cycle by toff
 If the interruption time toff is longer than toff > 3 days
o Repeat the long-term cycle
 If the cumulated interruption time during the long-term cycle Σ toff is longer than 6 days
o Repeat the long-term cycle
Examples for the test interruption are given in Appendix A3.
Interruptions at the end of the cycle may occur in order to initiate the superimposed voltage testing.
The following are examples of scenarios which can occur:
 Change of impulse voltage generator parameters during the testing, especially changing from
SI to LI or vice versa
 Installation of coupling or blocking elements for the S/IMP testing
 Installation of external impulse voltage generator or e.g. bringing the impulse voltage generator
from a neighboring laboratory
Further scenarios are possible, especially when using a spark gap as coupling element:
 short voltage dip due to ignition of spark gap, when spark gap distance is adjusted
 intentional reduction of DC voltage for pre-shots during set-up of the impulse generator, mainly
for unipolar superimposed LI / SI
Interruptions due to the above-mentioned procedure during the S/IMP testing with SI or LI are not
considered critical, as long as the DC voltage is switched on again directly after an interruption; no need
for recharging has to be considered in such cases.
Before superimposed voltage testing, the current source can be switched off to protect the current
source from damage (refer section 8.2.1). In this case the superimposed voltage test shall be performed
within 2 h at maximum. No earthing of the test object or switching off the DC voltage source is allowed.
If the current source is interrupted longer than 2 h, follow the same procedure as for interruptions of
the DC voltage source as mentioned above. Instead of recharging with UT, reheat the assembly with
the testing current IAC, respectively IDC.
After the load cycle and the superimposed voltage test, the DC voltage source is switched off and the
next load cycle is built up. There is no time restriction during this period.
8.2.4 Superimposed voltage tests

Before starting the superimposed voltage test, the DC voltage has to be reduced from UT to Ur. The
superimposed voltage test shall start after the reduction of the DC voltage.
8.2.4.1 Superposition of 80% rated impulse voltage magnitudes
Superimposed voltage tests during the prototype installation test are performed with 80% of the rated
lightning and switching impulse withstand voltage (refer section 6.4).
As this reduces the difference between DC and impulse voltage magnitude, this may require special
attention in terms of triggering the spark gap circuit, in particular in case of unipolar tests. More
information to optimized spark gaps is given in section 8.1.
Oscillating impulse voltages can be superimposed with 80% rated magnitude with coupling capacitors
and regular spark gaps as well. Further information for OLI and OSI testing with spark gaps are given
in Appendix A4 and the literature [25].
163
8.2.4.2 Superposition of OLI and OSI

The test circuit for superimposed voltage testing with OLI and OSI is shown in Figure 8.2-3. The major
difference to the test circuit in section 8.1 for conventional LI and SI is the inductance L and the removal
of the load capacitance CL. For OLI and OSI applications, the test object usually has a higher capacitance
and is therefore used as load capacitor for the impulse voltage. Both coupling elements can be used to
achieve a superposition of the DC and the impulse voltage.
Figure 8.2-3: Test circuit for superimposed voltage testing with OLI and OSI [25]
8.2.4.3 Effects during testing with superimposed OLI/OSI

S/IMP testing with coupling capacitors and OLI/OSI mainly behaves similarly to S/IMP testing with LI/SI,
refer to section 8.1. S/IMP testing with spark gap and OLI/OSI behaves differently as shown in section
8.1 for conventional LI/SI. It could be observed that the ignition of the spark gap is very reliable for OLI
and OSI. Low impulse voltage magnitudes can be superimposed for a wide distance range of the spark
gap, without any optimisations of the spark gap. No extinguishing in case of zero crossings or during
the crest value of the impulse voltage could be observed at the spark gap. Explanations are given in
Appendix A4. The voltage level will go to 0 kV, if OLI/OSI is superimposed with spark gaps. This is
similar to the observation of section 8.1 [25].
The use of oscillating impulse voltage results in certain effects on the test voltage which have to be
considered during testing; especially a change of the impulse voltage magnitude during superimposed
testing may occur. This effect does not occur when using coupling capacitors as the blocking element,
but this effect does occur when using spark gaps.
Figure 8.2.4 shows the effect for spark gap coupling elements. Figure 8.2-4 shows the resulting voltage
with constant charging voltage of the generator while the DC voltage was changed. It can be clearly
seen that, for superimposed impulse voltage testing with the same polarity, the voltage magnitude is
reduced, and for the opposite polarity, increased. This means that the magnitude on the test sample
cannot be adjusted correctly without DC voltage. Laboratories performing these tests should consider
the DC voltage to avoid overvoltages at the test object. Using coupling capacitors as coupling elements,
this effect does not occur, as long as the addition of the impulse voltage to the DC voltage is considered.
Further effects and explanations are given in the literature [25].
164
Figure 8.2-4: Change of the OLI/OSI amplitude during superimposed impulse voltage testing with
spark gaps [25]
165
[1] IEC 60060-1, “High-voltage test techniques – Part 1: General definitions and test
requirements”, IEC, 2010.
[2] W. Hauschild, E. Lemke, “High-Voltage Test and Measuring Techniques”, Dresden: Springer,
2014.
[3] CIGRE WG B1.32 “Recommendations for Testing DC Extruded Cable Systems for Power
Transmission at a Rated Voltage up to 500 kV”, TB 496, April 2012.
[4] J. Lämmel, “Dimensioning of high-voltage test systems for the superposition of DC voltage with
impulse voltage (in German), PhD Thesis. TU Dresden, 1973.
[5] M. Hering, “Flashover behavior of gas-solid insulating systems under DC voltage stress (in
German)”, PhD Thesis. TU Dresden, 2016.
[6] M. Felk, R. Pietsch, M. Kubat, T. Steiner, “Protection and measuring elements in the
superimposed test setup“, International Symposium on High Voltage Engineering, Buenos Aires,
2017.
[7] A. Voß, “Design of a protection resistor for superimposed voltage tests for ultra-high-voltages“,
International Symposium on High Voltage Engineering, Budapest, 2019
[8] U. Riechert, P. Skarby, “Development of gas-insulated systems for HVDC transmission“ (in
German), GIS Anwenderforum, Fachtagung Hochspannungs-Schaltanlagen: Anwendungen,
Betrieb und Erfahrungen, 1. Oktober 2013, Darmstadt, Germany
[9] M. Hering, H. Koch, K. Juhre, “Direct Current ±550 kV High-Voltage Gas-Insulated Switchgear
(DC GIS)”, CIGRE-IEC Conference on EHV and UHV (AC & DC), Hakodate, 2019
[10] CIGRE JWG D1/B3.57, IWD 155, Reuter, Juhre (Siemens Berlin), “Superposition Test DC+SI”,
2018
[11] CIGRE JWG D1/B3.57, IWD 117, Riechert (ABB Zürich), Götz (TU Dresden), “Generation and
Measurement of Superimposed Voltages (DC+LI/SI)”, 2017
[12] M. Hering, K. Juhre, M. Häusler, “Gas-insulated systems for DC application – Experience with
thermoelectric tests during development and application potential for grid expansion” (in
German), VDE Hochspannungstechnik, 12-14.11.2018, Berlin, Germany ; 2018
[13] IEC 60052, “Voltage measurement by means of standard air gaps”, 2002.
[14] K. Juhre, M. Reuter, “Composite Voltage Testing of Gas-Insulated-HVDC Systems – Basic Test
Circuits and Testing Experience”, International Symposium on High Voltage Engineering,
Budapest, 2019
[15] M. Hallas, C. Dorsch, V. Hinrichsen, “Discharge optimization of spark gaps during superimposed
voltage testing” (in German), VDE Hochspannungstechnik, 12-14.11.2018, Berlin, Germany ;
2018
[16] M. Hering, T. Gabler, J. Speck1, S. Großmann, U. Riechert, “Influence of DC voltage stress on
the flashover behaviour of insulators with a particle in gas-insulated systems during
superposition of lightning impulse voltage” (in German), VDE Hochspannungs-technik, 14-
16.11.2016, Berlin, Germany ; 2016
[17] S. J. Frobin, C. Freye, L. Vogelsang, D. Wienold, A. Cimino, F. Jenau, J. Huppertz, M. Gamlin,
“Large Scale Synthetic Laboratory Imitation of Transient Voltage Stresses of MMC-HVDC Links:
Design Aspects on “Very Slow Front Overvoltages”, VDE Hochspannungs-technik, 09.-
11.11.2020, Berlin, Germany ; 2020
[18] IEC 60060-2, “High-voltage test techniques- Part 2: Measuring systems”, 2011.
166
[19] E. Sperling, U. Riechert, “HVDC GIS RC-dividers in new GIS substations with increased dielectric
requirements“, CIGRE Nagoya, 2015.
[20] M. Hallas, T. Wietoska, V. Hinrichsen, “Generator for Current Injection on High DC Potential to
Test HVDC Equipment“, International Symposium on High Voltage Engineering (ISH 2017),
August 28 – September 01, 2017, Buenos Aires, Argentina. In: The 20th International
Symposium on High Voltage Engineering, Buenos Aires, Argentina, August 27 – September 01,
2017
[21] W. Schufft, S. Schiering “Developments in Power Engineering and their Demands on High-
Voltage Test Equipment“, ELECO 1999.
[22] B. Yang, “Device for Testing Load of superconducting High-Voltage DC Cable“, patent
WO2014046467 A1; 2014
[23] C. Neumann, M. Hallas, M. Tenzer, M. Felk, U. Riechert, “Some thoughts regarding prototype
installation tests of gas-insulated HVDC systems”, CIGRE A3, B4 & D1 International Colloquium,
Winnipeg, MB Canada, September 30 – October 6, 2017, “HVDC & HVAC Network Technologies
for the Future”
[24] M. Hallas, V. Hinrichsen, “General overview of AC and DC current injection on high voltage
potential for HVDC long-term tests”, CIGRE-IEC 2019 Conference on EHV and UHV (AC & DC),
23-26 April 2019, Hakodate, Japan; 2019
[25] M. Hallas, C. Dorsch, V. Hinrichsen, “Superimposed Voltage Testing of HVDC Equipment with
Application (ICHVE 2018), 10. - 13. September 2018, Athens, Greece; 2018
[26] M. Hallas, T. Wietoska, V. Hinrichsen, “Construction of a DC Current Injection Generator for
HVDC Long-term Tests up to 5000 A DC at 660 kV DC Potential”, International Symposium on
High Voltage Engineering (ISH), 26-30 August 2019, Budapest, Hungary, 2019
167
9. Testing of interfaces between DC cables and gas-

insulated DC systems
Future gas-insulated DC systems will often be directly connected to DC cables to utilize the space saving
features of such arrangements. Typical applications of interest are e.g. converter stations on offshore
platforms or when connecting different sections of DC land cables. Adequate testing is an important
issue to ensure the reliability of those components and the overall system. However, for DC cables and
gas-insulated DC systems, different test recommendations are suggested, following different test
philosophies [1] [2] [3].
Differences in testing philosophies of dielectric testing of DC

cables & DC gas-insulated systems; different test objectives
The difference in testing philosophy of DC cables and gas-insulated systems is related to type testing
as well as to long-term testing. Although both pieces of equipment are applied in the same voltage
range, the voltages to which the test voltages are referred to are different and are denoted differently.
With DC cables, reference is made to the nominal voltage U0 (in this brochure UnDC), whereas with gas-
insulated DC systems, we refer to the rated continuous DC voltage UrDC. With respect to the simulations
described in chapter 9.2, that means U0 = 320 kV and UrDC=1.1∙320 kV=350 kV. The type testing of
polymeric DC cables, which are the only type considered here, is focused on ageing of the relevant
cable system [4]. After the test sequence with different load cycles, a DC test voltage of 1.85 U0 is
applied. Only after completion of load cycle tests, the test objects are subjected to specific electric
withstand tests with switching and lightning impulse wave shapes, targeting a (pure) dielectric
withstand. A rest time is permitted between the end of the load cycle test and the impulse tests.
Therefore, prior to the impulse tests, the test objects are subjected to maximally loaded temperature
conditions for at least 10 hours, and to applied nominal DC voltage, U0, (of the relevant polarity) for at
least 10 hours.
Moreover, for qualifying polymeric HV cables (both DC and AC), the concept of pre-qualification testing
has been introduced. This is a test intended to demonstrate long-term performance of the complete
cable system with special regard to ageing; it has a minimum duration of 360 days. The applied DC
voltage is of magnitude 1.45 U0, in blocks of > 30 d for a specific polarity, and in various load conditions,
such as load cycles, high load, and zero load conditions. High load blocks reflect maximal temperature
conditions, and have a duration of 40 days; zero load conditions are without any heating (room
temperature) and have a duration of 120 days. After the load cycle tests are completed, the test objects
are subjected to superimposed impulse voltages. The aim of the superimposed impulse test after the
long duration test is only to check the integrity of the insulation system.
The dielectric test requirements for gas-insulated DC systems focus on the electric field condition in GIS
under DC, which are different from AC. Additionally, due to lack of operational experience with HVDC
GIS, long-term test methods are proposed to prove the dielectric performance of a prototype installation
under in-service conditions [2][4]. Within the type test a new test – DC insulation system test - has
been proposed, with special emphasis on solid insulators. The test must be performed to demonstrate
satisfactory electrical performance of HVDC-insulators (partition and support insulators, drive-rods or -
tubes for switching devices, etc.) under the influence of space and surface charges. As described in
chapter 6.1 and 7.6.11, it is comprised of a long duration test with 1.0 UrDC (1.1 U0) till 90% of the DC
field steady-state is reached, followed by a superimposed impulse voltage test.
The DC insulation system test procedure is similar to the pre-qualification test procedure for polymeric
insulated DC cables. However, the DC insulation system test is intended to verify the insulating capacity
of the gas-insulated system, consisting of gas and solid insulating materials, with special emphasis on
surface properties and the transition from capacitive to resistive field distribution required to reach the
DC steady state conditions under high load conditions (HL). The DC insulation system test is not
intended to assess the long-term performance of the complete gas-insulated system, because the
electrical lifetime of solid insulating material used for GIS/GIL at DC voltage stress is equal or even
better compared to AC voltage stress [1]. Experience with AC GIS shows that the various parts of the
insulation system that have been considered and which have been manufactured according to the
corresponding quality requirements do not reveal any ageing mechanisms which cause critical ageing.
168
Table 9.1-1: Overview of test schemes considered for the electrical qualification of a cable system,
according to (CIGRE TB496, IEC 62895) and a proposed scheme for an HVDC GIS system, CIGRE
JWG D1/B3.57 (according to [4])
DC extruded cable systems DC GIS proposed by JWG D1/B3.57

(CIGRE TB496, IEC 62895)
DC electrical ageing tests in combination with Type tests
«mechanical» stress variations  DC withstand voltage test
Pre-qualification test  Lightning and switching impulse voltage
 as proof of technology test (not mandatory)
 1.45 U0, 360 d total, Load cycle blocks,  Superimposed lightning impulse voltage
40 d; High load block, 40 d; zero load tests (bipolar and unipolar superposition)
block, 120 d (VSC, LCC is different, LCC  Superimposed switching impulse voltage
includes polarity reversals) tests (bipolar and unipolar superposition)
Type test  Polarity reversal tests (not mandatory)
 as project specific design test DC Insulation system test
 1.85 U0, 40 d total, Load cycle blocks,  1.0 UrDC (rated continuous DC voltage as
12+12+6 d maximum continuous direct voltage
Dielectric withstand assigned to the gas-insulated system by
 >10 h, DC pre-stress, with load, i.e. warm the manufacturer for specified operating
T ≥ Td,cond,max; ΔT ≥ ΔTd,max conditions) UrDC = 1.1 ∙ UnDC
 BIL test superimposed to DC, level project Prototype installation test (not mandatory)
specific  as proof of technology
Switching surges  1.2 UrDC, 360 d total
 >10 h, DC pre-stress, with load, i.e.  periodically superimposed LI and SI
T ≥ Td,cond,max; ΔT ≥ ΔTd,max voltage tests
 Switching surge superimposed to DC,
level project specific
Table 9.1-1 contains an overview of test schemes considered for the electrical qualification of a cable
system and a proposed scheme for an HVDC GIS system (according to [4]). One of the major concerns
in comparing DC qualification test schemes of gas-insulated and solid-insulated devices is the time scale
required for the electric field to develop from a capacitive (switch-on or impulse) field distribution to a
resistive (DC) field distribution. While for solid-insulated systems this time scale is in the range of days,
for gas-insulated systems it can reach months or years, depending on the insulation material. Also, the
influence of temperature is different. Ageing effects in terms of irreversible changes of the material
properties under applied temperature and DC electric fields are not expected from gas-insulated
systems. Therefore, the question arises when combining gas and solid insulated devices, such as in
HVDC GIS cable termination, how both testing philosophies can be covered by a common testing
sequence in a test arrangement containing both technologies. The subsequent simulations are used to
address this question.
Stress comparison by means of simulation

The following simulation results are taken from [4], which are related to a typical GIS cable interface
(Figure 9.2-1). The GIS side consists essentially of metallic parts, the conductor and the housing and
1a 1b
Figure 9.2-1: Example of a HVDC GIS-cable interface (according [4]). Numbers denote different
functional layers 1 – insulating gas, e.g. SF6; 2 – conical insulator, e.g. epoxy; 3 – cable end
stress grading (SG) system, e.g. rubber with geometric and/or linear or non-linear resistive, or
refractive material properties; 4 – cable insulation, e.g. XLPE
169
is not discussed further here. Similarly, the metallic connection of the cable termination to the GIS
conductor is not discussed here, and therefore has no design resolution in the drawing, other than
being shown as connected to the GIS conductor.
The essential parts of the insulation system shown in Figure 9.2-1 consist of: 1(a) – the insulating gas
contained in the HVDC GIS; 2 – a separating insulator, used also for mechanical support, which is
depicted in a conical shape, well known from AC applications; 1(b) the fluid (gas or liquid) insulation,
filling the gap between the conical separating insulator and the cable/cable end stress grading (SG)
system, 3 – the cable end stress grading (SG) system; and 4 – the cable insulation system [4].
The insulating materials and values
chosen for the simulation are given Table 9.2-1: Materials and values of the GIS/cable
interface chosen for the simulation
in Table 9.2-1. However, the actual
DC relevant material properties are Relative Conductivity 
Insulating material
of less interest than the relaxation permittivity r in S/m
time scales, which were assumed as Insulating gas (1) 1 10-17
a starting point for the investiga- Separating cone insulator 3.6 10 –10-15
-16
(2)
tions to be Cable ~ SG < Cone < Gas, SG (EPDM or Si rubber) 2.5-8 10-15–10-11
in which the relation of Cable and SG (3)
depend on the stress grading (SG) Cable (XLPE) (4) 2.3 10-14–10-12
strategy.
9.2.1 STRESS COMPARISON AT DC STRESS

With respect to the DC stress caused by the two test philosophies, the separating cone insulator is
assumed to be the most important component. In terms of its relaxation time profile, it is estimated to
be somewhere between the faster relaxation time of the cable system and the slower relaxation time
of the gas-insulated system. Therefore, it is expected to be affected most by the differences between
the two system-focused test schemes.
In Figure 9.2-2, the electric DC stress
distribution along the outer surface of the
conical insulator is shown for the different
testing philosophies; the high load stress
(70 °C at the conductor) of DC cable pre-
qualification test (applied voltage: 1.45·U0=
462 kV) after 10 days (totally 40 days in the
test) is compared with the DC insulation
system test for HVDC GIS (applied voltage
350 kV). For the simulation of the DC insu-
lation system test, a loaded cable ( i.e. 70 °C
at the conductor) and an unloaded cable have
been considered at ambient temperature Tamb
= 40 °C. As a normalizing reference, the maxi-
mum electric field of the GIS DC insulation
system test has been selected. The electric
field is compared in locations at the surface
(outer and inner) as well as inside the
supporting insulator. As the outer surface of
the cone is of major interest with respect to
the gas-insulated system, Figure 9.2-2 Figure 9.2-2: Comparison of normalized electric
compares only the field distribution of this part field along the outer surface of the cone insulator
of the cone. The other parts of the cone (inner at high load test scheme of a cable systems
surface and inside the cone) can be taken from prequalification test with the DC state of the gas
[4]. The simulation results refer to the first and insulation test scheme [4]
second load cycle.
It can be seen that the stresses generated from the DC cable test are overall higher than those from
the DC insulation system test for HVDC GIS. Moreover, comparing the shape of the high load electric
field distribution after 24 hours and 10 days with the HVDC GIS loaded and unloaded cable cases, hints
that, in the current example, the high load case is already very close to the final DC state after 24 hours.
170
Furthermore, it has to be noted that the small difference between the loaded and unloaded case for the
DC insulation system test for HVDC GIS is due to the different current ratings of the two systems. The
gas-insulated system is normally rated for 4000 A, whereas the cable system is rated for 1000…1500 A.
This means that, for the case under consideration, the DC insulation system test for the HVDC GIS does
not require loaded conductors. Therefore, for the example presented here, it can be concluded that, for
the DC electric field distribution (and relaxation towards this state), the stresses occurring in the DC
cable system standards cover all of the stresses observed in the DC insulation test for the DC GIS
insulators in a reasonable manner. However, it has to be verified if that is also true for other types of
GIS terminations
9.2.2 Stress comparison at superimposed impulses

In both cases, for the DC insulation system test for HVDC GIS as well as for the HVDC cable system
standards, dielectric withstand is tested utilizing a lightning impulse (LI) test superimposed on a DC pre-
stress. The major difference between the two tests is the time scale of the relaxation towards the DC
steady state and the nominal DC pre-stress
voltage level. The simulation presented in
Figure 9.2-3 considers the DC insulation
system test for DC GIS with an unloaded
cable, T = 40 °C, and an applied DC voltage
of 350 kV in the DC state for the DC pre-
stress. The cable system test is considered
with loaded cable (Tcond > 70 °C), Tamb =
20 °C, and an applied DC voltage of U0 =
320 kV over 10 hours, for the DC pre-stress.
In the example of Figure 9.2-3, a peak
voltage of 740 kV for the resulting super-
imposed impulse wave shape has been
calculated. This peak value is in accordance
with the factor 2.1 given in [1], but related
to 1.1∙U0 instead of U0 in the case under
consideration (2.1∙1.1∙U0= 2.1∙1.1∙320 kV
=740 kV). Though there is a slight difference
in the DC pre-stress due to the pre-stress
voltage level, the shape is rather similar.
That is true for the electric field along the Figure 9.2-3: Comparison of normalized electric
outer surface of the support cone insulator, field along the outer surface of the cone insulator
at lightning impulse test schemes (opposite
which is shown in Figure 9.2-3, but according
polarity) of a HVDC cable system type test and the
to the results given in [4], also for the inner HVDC GIS test scheme [4]
surface of the support cone insulator and
inside the cone.
For this example simulation of the lightning impulse part of the dielectric withstand test, it can be
concluded that the stresses occurring in the DC cable system standards and the stresses observed in
the DC insulation system test for the DC GIS insulators are quite similar, if the test procedures for
application of superimposed impulse voltage given in chapters [3] and 8.1 are satisfied.
Proposal for dielectric testing of interfaces between gas-insulated

Dc systems and DC Cables
The simulation results demonstrate that, at least for the example of termination under consideration,
the approach for dielectric testing of DC cables according to [1], [2] also covers the recommendation
given in chapter 6, 7 and 8 of this brochure. As [1], [2] refer to outdoor terminations, the corresponding
tests have to be extended to GIS terminations. It is self-evident that the cable ratings have to be applied
for dielectric testing of the interface and not the ratings of the gas-insulated DC system, which are often
higher.
171
Further procedure on this subject

Needless to say, the simulations presented in this chapter need to be proven by further investigations
on other GIS terminations of different design. In any case, these simulations provide an initial indication
and are representative for the general character of the problem in terms of relaxation time scales, which
increase from the inner cable and cable stress grading insulation system towards the outer gas insulated
parts. For the purpose of relative comparison, this characteristic is more important than the specific
design. Final conclusions need to be discussed by the expert community. For this purpose, JWG
B1/B3/D1.79 has been established, focusing on “Recommendations for dielectric testing of HVDC gas
insulated system cable sealing ends”.
References of chapter 9
[1] CIGRE TB 496, “Recommendations for Testing DC Extruded Cable Systems for Power
Transmission at a Rated Voltage up to 500 kV’’, 2012
[2] IEC 62895, “High Voltage Direct Current (HVDC) power transmission cables with extruded
insulation and their accessories for rated voltages up to 320 kV for land applications - Test
methods and requirements”, 2017.
[3] C. Neumann, K. Juhre, U. Riechert, U. Schichler, “Basic phenomena in gas-insulated HVDC
systems and adequate dielectric testing”, CIGRE-IEC 2019 Conference on EHV and UHV (AC &
DC), 23-26 April 2019, Hakodate, Japan, 2019, paper 10-5.
[4] M. Saltzer, U. Riechert, U. Straumann, P. Bergelin, “Comparison of Electrical Testing
Philosophies at the Interface of Gas-solid insulated HVDC Systems”, CIGRE Colloquium
SC A2/SC B2/SC D1, Nov. 2019, New Delhi, India
172
10. Conclusion
The potential of gas-insulated DC technology was already recognized in the 1980s, but up to now, only
a few installations are in service. Due to the increasing amount of power generation far away from the
load centers, there is a demand for adequate long-distance transmission systems. As HVDC transmission
is the most preferred option, gas-insulated HVDC systems are of growing interest due to their special
features and advantages. Meanwhile, some new installations have been realized or will be realized in
the near future. As currently no standard for dielectric testing is in place, which provides the basis for
assuring satisfactory reliability, CIGRE took care of this subject and established a Working Group. The
achievements of the corresponding Joint Working Group D1/B3.57 are presented in this Technical
Brochure.
The approach presents a testing procedure for proving the capability to withstand the phenomena in
gas-insulated DC systems. As a basis, the stresses in gas-insulated HVDC systems at normal operating
voltage and overvoltages are presented, and basic phenomena are described, among others: conduction
through solid insulation and along insulator surfaces, surface charge accumulation from charge
generation, and transport in the gaseous insulation as well as field transition and effects at gas-insulator
interfaces. Subsequently, the insulating properties of typical gas-solid insulation systems and the
corresponding influencing factors are given. Finally, tools for computational simulation and verification
by adequate tests are presented. This chapter can be seen as an update of the information given in
CIGRE TB 506.
The knowledge gathered here provides the background for adequate dielectric testing of gas-insulated
HVDC systems, presented in the form of detailed recommendations; as such, they provide the
fundamental basis for a future IEC standard. They cover the type test, routine test, on-site test, and
the prototype installation test. They define the test voltages, test currents, test levels, and the test
procedure, in particular, the DC insulation system test as an important part of the type tests, and the
acceptance criteria.
The considerations dealing with test equipment and test procedures provide advice for users when
conducting dielectric testing, in particular for superimposed voltage testing and for a prototype
installation test. It contains some general explanations of the principle test circuit for composite
voltages, the options for generation of superimposed voltages, and the coupling and blocking elements
along with the phenomena which can occur using the different options. Measures are described to avoid
negative impact on the test object. With regard to the prototype installation test, the basic test circuit,
the circuits to generate and inject high current on high voltage potential, the long-term test sequence,
and the superimposed voltage tests are discussed.
In future, gas-insulated HVDC systems will often be connected directly to HVDC cables to utilize the
space-saving features of such arrangements. Taking into account the different testing philosophies for
cables and gas-insulated systems and the different test objectives, a proposal for dielectric testing of
these interfaces is made covering both test objectives. Finally, recommendations for further work in this
subject area are made.
173
Appendix A: Prototype installation test

A.1. Statistical considerations for superimposed voltage testing
Dependency on the number of insulators:
Number of insulators during type test: 5; number of insulators during prototype installation test: 200
Assuming that the rated test voltage
corresponds to the 10% breakdown
probability, the following values can Number of
insualtors
breakdown probability
be taken from diagram C1 in [1] in parallel
(Figure A-1).
𝑈10(5) = 𝑈50 − 2.1 𝑍
𝑈10(200) = 𝑈50 − 3.2 𝑍
With Z = 0.03 U50 for lightning impulse
voltage and Z = 0.06 U50 for switching
impulse voltage, it follows
LI
𝑈10(5) = 𝑈50 ∙ 0.937
𝐿𝐼
𝑈10(200) = 𝑈50 ∙ 0.904
LI LI
𝑈10(200) / 𝑈10(5) = 0.96
SI
𝑈10(5) = 𝑈50 ∙ 0.874
SI
𝑈10(5) = 𝑈50 ∙ 0.808 voltage
SI SI
𝑈10(200) / 𝑈10(5) = 0.92 Figure A-1: Dependency of the breakdown voltage on
the number of insulators in parallel [1]
 Due to the number of insulators, i.e. 200 insulators in parallel, LI voltage should be reduced by
about 4% and the SI voltage by about 8%, respectively, related to the rated impulse voltages.
Dependency on the number of impulses:
Figure A-2: Dependency on the number of impulses for LI and SI voltages [2]
The test object is subjected to up to 15 impulses, depending on the number of sequences;

 the difference of breakdown voltage on the number of impulses applied at type test and prototype
installation test respectively is less than 2% (Figure A-2).
174
A.2. Impact of time parameters on breakdown voltage at superimposed

voltage testing
In section 6.4.3.4 it was concluded that the impact of different time parameters at superimposed LI and
OLI voltage tests was low. As voltage-time curves of superimposed impulse voltage tests on gas
insulated DC systems are not published so far, the following considerations are based on known test
results for impulse voltage testing on gas insulated AC systems (Figure A-3).
The voltage-time characteristic follows the equal area criterion (Kind’s voltage-time law) [3]. Basically,
it can be concluded that voltage impulses with steeper front-times result in higher breakdown voltages
compared to less steep impulses with equal voltage-time area.
Figure A-3: Measurement of the voltage-time characteristics [3]
Following the procedure of Figure A-3, measurements performed on gas-insulated AC systems can be
found in the literature [4], [8]. Figure A-4 shows measurements of the voltage-time characteristic (V-t
curve) on a gas-insulated coaxial arrangement. The measurement was performed with 3 different
impulse voltage shapes; these three different shapes are combined in Figure A-4.
Figure A-4: Voltage-time characteristic for a gas-insulated coaxial arrangement [4], [8]
According to the procedure in Figure A3, the data given in Table A-1 can be determined from Figure
A4. The static breakdown voltage U0 is as assumed to be 400 kV (refer Figure A-3). Furthermore, the
voltage-time area for an 1.2/50 standard lightning impulse voltage can be calculated for the data
obtained.
175
Table A-1: Data obtained from Figure A-4 and calculated voltage-time area
Time in µs Breakdown voltage in kV Voltage-time area in kV∙µs

2 580 210
3 510 223
4 480 228
5 460 212
9 445 220
The average voltage-time area of all calculated values in Table A-1 is 219 kV∙µs. For all subsequent
calculations in this section, the value 219 kV∙µs is assumed to fulfil the voltage-time law according to
Kind. This voltage-time area can be considered for calculation of the breakdown voltages for different
time parameters. Based on this, LI and OLI time parameters are given according to Table A-2
Table A-2: Tolerances for standard lightning impulse and oscillating lightning impulse voltage [5],
[6]
LI OLI
Front-time 𝑻𝟏 0.84 … 1.56 μs 0.8 … 20 μs
Time to half value 𝑻𝟐 40 … 60 μs 40 … 100 μs
For tests on long test set-ups, the impulse voltage front-time has to be increased (refer section 6.4.3.4).
Figure A-5 shows the comparison of an 1.2/50 standard lightning impulse and a 10/50 lightning impulse
voltage. Assuming a static breakdown voltage of U0 = 400 kV, a breakdown can occur, if the voltage
time area A1.2/50 = A10/50 =219 kV∙µs is fulfilled. The corresponding calculated peak values are 444.6 kV
for the 1.2/50 and 427.6 kV for the 10/50 impulse. The breakdown voltage of the 10/50 impulse voltage
is thereby theoretically decreased by approximately 4%.
Figure A-5: Voltage time area of impulses with T1 = 10 µs and T1 = 1.2 µs. The peak value of the
10/50 impulse voltage is adjusted, so that A1.2/50 = A10/50 =219 kV∙µs.
The same calculation can be performed for an increased time-to-half-value. Figure A-6 shows the
comparison between an 1.2/50 impulse voltage and an 1.2/100 impulse voltage. Assuming again a static
breakdown voltage of U0 = 400 kV, the calculated peak values are 444.6 kV for the 1.2/50-impulse
voltage and 431.8 kV for the 1.2/100-impulse voltage. The breakdown voltage of the 1.2/100 impulse
is thereby theoretically decreased by approximately 3%.
176
Figure A-6: Voltage time area of impulse voltages with T2 = 50 µs and T2 = 100 µs. The peak value
of the respective 1.2/100 impulse voltage is adjusted, so that A1.2/50 = A1.2/100 =219 kV∙µs.
The same procedure as for Figure A-5 and Figure A-6 can be applied for OLI impulses. Figure A-7 shows
the comparison for standard lightning and a 10/50 OLI-impulse voltage, which is often used for practical
arrangements. The calculated peak value is 444.6 kV for the 1.2/50-LI voltage and 450.7 kV for the
10/50 OLI voltage. This means, the OLI breakdown voltage is theoretically increased by approximately
1.5%.
Figure A-7: Voltage time area of impulse voltage impulses with T1 = 10 µs OLI and T1 = 1.2 µs LI.
The peak value of the respective OLI impulse is adjusted, so that AOLI = A1.2/50 LI =219 kV∙µs.
It can be concluded that impulse voltage tests on practical arrangements with OLI and LI will result in
nearly the same stresses on the insulation system.
Measurements of the voltage time characteristic have also been performed on the insulators of gas
insulated AC systems. Figure A-8 shows the experimental data.
177
Triple Point (TP)
TP
Figure A-8: Voltage-time characteristics of insulators in gas-insulated AC systems [4].
For insulators it can be concluded that there is no significant voltage-time dependency but rather it is
mainly the magnitude of the voltage that is of major importance. Therefore, a correction for the insulator
surfaces is not discussed further here.
A.3. Examples of calculations for interruptions occuring during

the prototype installation test
Based on the procedure for interruptions occurring during the prototype installation tests, Table A-3 in
section 8.2.3.3 gives examples of how the interruption will influence the test according to Table 7.9.1.
Table A3: Example calculation for interruptions possibly occurring during the prototype installation
test for 30 days cycles
No. Interruption of Remaining test Duration of Time to Test

voltage at time of cycle interruption add complete at
1 Day 15 15 days 3 Days 3 Days Day 33
3 Day 30 0 days 5 min 2h Day 30 + 2h
4 Day 10 20 days 8h 8h Day 30 + 8h
5 Day 15 15 days 20 min 0h Day 30
6 Day 25 5 Days 3 Days 4 Days Day 34
7 Day 20 10 days 5 Days Repeat cycle
8 Day 10 20 Days 3 days Repeat cycle
Day 20 13 Days 3 days
Day 25 16 Days 1 day
No. 6 in Table A-3 shows an interruption at the end of a test cycle. Section 8.2.3.3 requires minimum
3∙toff before the S/IMP testing at the end of the cycle. Therefore 9 days DC stress are required before
the S/IMP test. Since 5 days are left from the cycle, only 4 more days have to be added to the total
cycle time. No. 8 shows a cycle with 3 interruptions. The cumulated time of interruptions is larger than
6 days. Therefore, the cycle needs to be repeated according to section 8.2.3.3.
Table A-4 gives examples, how the interruption will influence the test acc. Table 7.9-2.
178
Table A-4: Calculation examples of interruptions during the prototype installation test for 60 days
cycles
No. Interruption of Remaining test Duration of Time to Test

voltage at time of cycle interruption add complete at
3 Day 60 0 days 5 min 2h Day 60 + 2h
4 Day 10 50 days 8h 8h Day 60 + 8h
5 Day 15 45 days 20 min 0h Day 60
6 Day 55 5 Days 3 Days 4 Days Day 64
7 Day 20 40 days 5 Days Repeat cycle
8 Day 10 50 Days 3 days Repeat cycle
Day 20 43 Days 3 days
Day 25 35 Days 1 day
A.4. Superposition of 80 % Magnitudes with OLI and OSI

Because of overshoot-effects during superimposed voltage testing, the spark gap also operates for 80 %
test levels. Figure A-7 shows the generator circuit during superimposed voltage tests with oscillating
voltages and a spark gap.
Figure A-7: Generator circuit for oscillating impulse voltage [7]
Figure A-7 shows that in case of no flashover of the spark gap SG, the total energy of the impulse
capacitance Cs is loaded through the inductance of the generator L on a stray capacitance Cstray.
Assuming a test object capacitance CL in the range of 10-20 nF and a stray capacitance to earth Cstray
of only 0.5 nF 3, an overshoot of the voltage can be measured, if no discharge of the spark gap occurs.
Figure A-8 shows a high overshoot, which results in a reliable triggering of the spark gap. Therefore,
the triggering of spark gap during oscillating impulse voltage tests is working naturally without external
control [7].
3
Figure A-8 is based on measurements with a voltage divider of 0.25 nF capacitance. Additionally 0.25 nF were estimated as
stray capacitance, resulting in 0.5 nF in total.
179
Figure A-8: Voltage oscillograms with and w/o spark gap discharge (filtered) (according to [7])
References Apppendix A
IEC 60071-2, “Insulation co-ordination, Part 2: Application Guide”, December 1996.
A. Küchler, “High Voltage Engineering – Fundamentals – Technology – Applications” VDI-
Buch, page 183, 186, 2017
CIGRE Working Group D1.03, “Very Fast Transient Overvoltages (VFTO) in Gas-Insulated UHV
Substations”, Technical Brochure 519, 2012
IEC 60060-1, “High-voltage test techniques - Part 1: General definitions and test
requirements”, 2010
IEC 60060-3, “High-voltage test techniques – Part 3 : Definitions and requirements for on-site
testing”,
M. Hallas, C. Dorsch, V. Hinrichsen, “Superimposed Voltage Testing of HVDC Equipment with
Application (ICHVE 2018), 10. - 13. September 2018, Athens, Greece; 2018
K. Nakanishi, A. Yoshioka, Y. Shibuy, “Experimental Study of the Breakdown Characteristics of
a Gas-Insulated Bus”, IEEE Transactions on Electrical Insulation Vol. EI-15 No.2, page 111-
117 April 1980
M. Hallas, T. Wietoska, V. Hinrichsen, “Generator for Current Injection on High DC Potential to
Test HVDC Equipment“. ISH 2017 - Buenos Aires
180
Appendix B: Pulse sequence analysis (PSA)

B.1 NoDi* Pattern
In Section 6.2 identification of the most common PD defects in gas-insulated systems – mobile
particles – by means of PSA is described. One approach is the PSA analysis by means of NoDi* patterns.
Which applies three typical patterns for defect identification: NoDi*Q pattern → Qi+1 = f(Qi), NoDi*T
pattern → ti+1 = f(ti) and NoDi*QT pattern → Qi = f(ti).
In the following NoDi* patterns of further PD defects in gas-insulated systems are given which were
obtained by measurements on test cells [1].
Negative polarity
Needle – plate
-25 kV; s=50 mm
pSF6=0,1 MPa
Floating electrode
-29 kV
pSF6=0,1 MPa
Wire shaped
particle in
bouncing mode _+
-40 kV
pSF6=0,5 MPa
Wire shaped
particle in firefly
mode -
-35 kV
pSF6=0,1 MPa
Spiral shaped
particle in firefly
mode
-35 kV
-
pSF6=0,1 MPa
Figure B-1: NoDi* pattern of different PD defects at DC voltage, negative polarity
181
Positive polarity
Needle – plate
+27 kV; s=50 mm
pSF6=0,1 MPa
Floating electrode
+29 kV
pSF6=0,1 MPa
Bouncing ball
+35 kV +
pSF6=0,5 MPa
Wire shaped
particle in
bouncing mode +
+41 kV
pSF6=0,5 MPa
Spiral shaped
particle in
bouncing mode +
+25 kV
pSF6=0,5 MPa
Figure B-2: NoDi* pattern of different PD defects at DC voltage, positive polarity
Needle –
plate
at AC
Noise
Figure B-3: NoDi* pattern of a PD defects at AC voltage, negative polarity and at noise
182
B.2. PSA using PSA@DC-Tool

The following PSA patterns are acquired at a test set-up consisting of a real size DC GIL compartment
with an uncoated encapsulation containing observation windows for high-speed camera recording, a
particle-injector and a PD coupler for UHF measurements (Figure B-4). The compartment was filled
with an N2 /SF6 gas-mixture (60%/40%). The pressure was varied between 0.2…0.7 MPa [2].
Figure B-4: Test arrangement for acquisition of PSA patterns of typical PD defects [2]
Left: Test set-up Right: test compartment
The approach uses the following PD quantities:
Ai Ai+1
ti ti+1
ti ti+1
𝐴𝑖+1 = 𝑓(𝐴𝑖 ) (a) ∆𝑡𝑖+1 = 𝑓(∆𝑡𝑖 ) (b)
∆𝐴𝑖 = 𝑓(∆𝑡𝑖 ) (c) ∆𝐴𝑖 = 𝑓(𝐴𝑖 ) (d)
∆𝐴𝑖+1 = 𝑓(∆𝐴𝑖 ) (e) ∆𝑡𝑖 = 𝑓(∆𝐴𝑖 ) (f)
Because the time distances can vary in a large range, a logarithmic clustering of the time axes (ti and
ti+1) is applied. The amplitude axes (A i, A i+1 and A i and A i+1) are not rescaled, since in case of UHF
PD measurements, these PD magnitudes are already given with a logarithmic dB(m) scaling.
183
Negative polarity positive polarity

Figure B-5: PSA patterns of a protrusion at 550 kV DC, p = 0.7 MPa, t rec=120 s [2]
-550 kV, l = 6 mm, d = 0.5 mm, trec = 120 s 550 kV, l = 2 mm, d = 1 mm, trec = 30 s
-550 kV, l = 4 mm, d = 0.5 mm, trec = 30 s 315 kV, l = 6 mm, d = 0.5 mm, trec = 30 s
Figure B-6: PSA patterns of a cylindrical particle at 550 kV, negative polarity or 315 kV,
positive polarity, p = 0.7 MPa [2]
-205 kV +180 kV
Figure B-7: PSA pattern of a cylindrical particle at 205kV, negative polarity or 180 kV,
positive polarity, respectively, p = 0.7 MPa, trec = 300 s [2]
184
-550 kV +550 kV
Figure B-8: PSA pattern of particle on insulator at 550 kV negative and positive polarity,
p = 0.2 MPa, trec = 120 s [2]
References Apppendix B
A. Pirker: Measurement and representation of partial discharges at DC voltage for identification of
defects of gas-insulated systems (in German). PhD Thesis, Technical University of Graz, 2019.
M. Geske, C. Neumann, T. Berg, R. Plath, “Assessment of typical defects in gas-insulated DC
systems by means of Pulse Sequence Analysis based on UHF partial discharge measurements”,
VDE Conference High Voltage Technique 2020, Berlin, November 2020
185
Appendix C: mandatory type tets for GIS and GIL

The various type tests for GIS and GIL and the purpose for which they are carried out are listed below
in Table C-1 [1][2].
Table C-1: Mandatory Type tests
Sub clause according to IEC 62271-203 [1]

Purpose of test
or reference to the present document
Tests to verify the insulation level of the This document
equipment
Dielectric tests on auxiliary circuits [1] subclause 6.2
Tests to verify the radio interference voltage [1] subclause 6.3
(RIV) level (if applicable)
Tests to verify the temperature rise of any part [1] subclause 6.4 and 6.5
of the equipment along with resistance
measurement of the main circuit
Tests to verify the rated peak and the rated [1] subclause 6.6
short-time withstand current Tests using DC currents are not possible due to
laboratory limitations. If required, simulations
must be provided according to the specification.
Tests to verify the making and breaking capacity not applicable
of the included switching devices
Tests to verify the satisfactory operation of [1] subclause 6.102.1 (and this document in
switching devices, if any are included reference to voltage test as condition check)
Tests to verify the strength of enclosures [1] subclause 6.103
Proof of the degree of protection of the [1] subclause 6.7
enclosure
Gas tightness tests [1] subclause 6.8
Electromagnetic compatibility tests (EMC) [1] subclause 6.9
Additional tests on auxiliary and control circuits [1] subclause 6.10
Tests on partitions [1] subclause 6.104 (and this document in
reference to voltage test as condition check)
Tests to verify the satisfactory operation at limit [1] subclause 6.102.2
temperatures
Tests to verify performance under thermal [1] subclause 6.106 (and this document in
cycling and gas tightness tests on insulators reference to voltage test as condition check)
Corrosion test on earthing connections (if [1] subclause 6.107
applicable)
X-radiation test procedure for vacuum [1] subclause 6.11
interrupters (if applicable)
Tests to assess the effects of arcing due to an [1] subclause 6.105
internal fault Tests using DC currents are not possible due to
laboratory limitations. If required, simulations
must be provided according to the specification.
Corrosion test on enclosures (if applicable) [1] subclause 6.108
References Apppendix C
IEC 62271-203, “High-voltage switchgear and controlgear, Part 203: Gas-insulated metal-enclosed
switchgear for rated voltage above 52 kV”
IEC 62271-204 Edition 1.0 2011-07, “High-voltage switchgear and controlgear – Part 204: Rigid
gas-insulated transmission lines for rated voltage above 52 kV”
186
Appendix D: Processes in the subcritical regime and

the partial critical regime
As given in chapter 4.1, the main processes that cause conduction currents through the insulation,
which is the main source of surface charge accumulation, can be categorized into two groups:
- Processes that are dominant in low electric fields that are far below those that initiate the onset
of charge injection and charge multiplication at interfaces, hereafter called the subcritical regime
(SCR)
- Processes that are dominant in high electric fields that are sufficient to activate micro-discharges
at local field enhancements, hereafter called the partial critical regime (PCR).
A detailed understanding of the low-field charge generation and transport in gaseous insulation forms
the basis for modelling numerous problems in high-voltage engineering.
D.1 Processes in the subcritical regime (SCR)

In low electric fields, the conduction current through the gaseous insulation is currently assumed to be
caused by ion pair (IP) generation from both terrestrial and cosmic natural ionisation [22]. According to
the literature, muons, as a part of the secondary cosmic radiation, are the main contributor [18],
resulting in an overall IP generation of 8 to 25 IP cm-3 s-1 bar-1 [1], [18], [20], [23]. These rates were
calculated from continuous ion current measurements using coaxial electrode arrangements with
dimensions typical of gas-insulated equipment or surface charging experiments. For electric fields below
100 V/m a linear increase of the ion current as a function of the applied voltage was observed. An
increase in the field increases the ion drift velocity and thus decreases both the space charge density
and ion-ion recombination until the latter becomes negligible and the current becomes saturated. The
saturated current can then be used directly to determine the ion pair generation rates. In accordance
with the established nomenclature for saturated ion currents, assuming an ohmic conduction (σ v)
behaviour of Al2O3-filled epoxy material, the charging current at the insulator surface (A) can be
described as
Whereas the current through the solid insulation (Isolid) shows a dependency on the electric field (Esolid),
Igas scales linearly with the IP generation rate per unit volume (IP), pressure and time, gas pressure (p),
and gas volume (Vgas). However, significant charge densities in the insulation volumes or at interfaces
may change the electric field distribution and in turn, affects the active gas volume.
Contradicting the volume-independent ion pair (IP) generation rates that are often used to model gas-
insulated equipment [8], [9], [24], [25], a distance-dependent characteristic was found by some studies
[1][18], The IP rates increased as the electrode distance decreased. The volume dependency measured
in recent studies, using surface charging experiments [1], is comparable to the linear relation previously
derived from continuous ion current measurements [18]. This behaviour might be attributable to the
supply of additional gas ions owing to the stopping of high-energy electrons in the gas released by the
interaction of cosmic radiation with the surrounding solids [26]. Because of the primarily vertical
direction of cosmic radiation [22] and the linear scaling of the active gas volume with the electrode
distance, the surface area of the high-voltage electrode, connected via electric field lines with the
analysed sample surface, could be used to approximate the IP contribution at 0.85 IP cm-3 s-1 bar-1 per
square millimeter of the surface area. Nevertheless, this generation may also show a dependency on
the interface orientation because the muon flux decreases significantly for angles higher than 70° with
respect to the vertical axis [22]. Furthermore, the IP rate depends on the altitude [22], shielding, and
type of surrounding materials [26], hindering a location-independent comparison of absolute rates. In
general, the additional IP generation owing to the solid materials may be important in determining the
discharge time constants or calculating charge distributions that may alter the electric field.
While this volume dependency explained the charging phenomena arising from saturated ion currents
under electric fields above 5000 V/m, recent discharging experiments with locally limited surface-charge
187
distributions formed from micro-discharges indicated the presence of further low-field conduction
processes that could change with the magnitude of electric field strength [1]. The discharging of such
locally limited surface-charge patterns could not be explained quantitatively, using the charge
generation from natural ionisation and the common ion current models. A few authors who investigated
the surface-charge accumulation on model spacers downscaled from gas-insulated components also
observed similar discrepancies [5], [27], [28], [29]. Some authors attributed the increased low-field
charge transport to electrophoretic conduction caused by dust particles in the gas [5], [27], [28], [29].
A few others suggested that an enhanced level of humidity could considerably increase the charge
transport in the gas [7], [30]. Figure D-1 shows the apparent IP rates derived for surface charging
experiments conducted with gas pressures in the range of 0.4 MPa to 0.45 MPa [2].
Figure D-1: IP rates for different averaged electric fields at the gas side of the sample surface at gas
pressures in the range of 0.4 MPa to 0.45 MPa [2].
In contradiction to the established conventions, a peak-like enhancement was observed in the low-field
IP rates. In the range of 100 V/m to 5000 V/m, the calculated rates exceeded the values calculated
from the saturated current regime up to 30 times [2]. Moreover, the peak-like shape of the rates for
different electric fields could not be explained with the established understanding of low-field charge
generation from natural ionisation and vanished for fields higher 10 000 V/m or for a significant increase
in the electrode distance [2]. With a change in the electrode distance, while maintaining the gas
pressure constant, the observed current magnitudes were a function of the applied voltage, but
independent of the electric field [2]. This indicated a correlation between the low-field current
contribution and the electrostatic force and supported the hypothesis explaining these behaviours using
electrophoretic conduction. An increase in gas pressure led to an increase in the current magnitude and
shifted the current peak towards higher electric fields. This observation was in line with the expected
pressure-dependent increase in gas friction that interfered with the movement of charge carriers.
Moreover, the increase in the current magnitude with gas pressure supported the theory that this low-
field conduction current was caused by a species dissolved in the gas [2].
D.2 Processes in the partially critical regime (PCR)

According to the current understanding of charge generation and conduction, mainly the processes in
the insulation volumes are considered relevant to the dimensioning of gas-insulated devices [9], [23],
[24], [31]. From the macroscopic perspective, the operating field strength is far below the conditions
required to cause charge multiplication by impact ionisation or field emission at the interfaces. However,
the ion current measurements conducted in the technical fields using rough metal electrodes [7],[30],
[32] or model spacers downscaled from gas-insulated equipment [3], [28] indicated charge-generation
processes that cannot be explained by ion-pair generation from natural ionisation of gas. Because of
lack of spatially resolved information and the revealed field-dependent characteristic, the currents are
mainly attributed to the charge generation from the electrodes and modelled using homogeneous
current sources [33]. The directional electric field transports any charge that is not neutralized in its
trajectory to the internal and external boundaries of the insulation system. This process sets the focus
on any charge generation - which is, in a physically correct sense, a charge separation or injection—
electrically connected via field lines to the insulator surfaces. Therefore, besides inhomogeneous charge
188
generation at rough metallic components such as enclosures, field shieldings, or conductors, the
insulators themselves might cause a highly inhomogeneous and therefore potentially critical surface
charge pattern [3], [28].
Recent studies contradict the understanding of a homogeneous charge generation in the partially critical
regime (PCR). A scattered surface charge pattern was measured for both charging experiments
conducted using an application-oriented rough HV electrode and those using a mirror-polished one [3].
The observed peaks, which were separated by distances of few millimeters, shown in Figure D-2
indicated that even from a macroscopic perspective, charge generation at the interfaces could not be
explained by a homogeneous current distribution [3]. The charge generation from micro protrusions at
rough interfaces is found to be a highly inhomogeneous, even from a macroscopic point of view. The
local charge generation may exceed the mean value, which is expected to be derived from classic
continuous ion current measurements, by up to three orders of magnitude [3]. Therefore, modelling
the charge generation from rough interfaces with a spatially homogeneous current density is not
possible.
Figure D-2: Surface charge densities under different charging times when a positive (left) or a
negative (right) voltage that corresponds to a homogeneous background field of 5 kV/mm is
applied an application-oriented rough HV electrode [3].
The measurements of technically rough metal electrodes exposed to a homogeneous electric field of
6 kV/mm, presented in Figure D-3, suggest that micro discharges at the metallic cathodes lead to
significantly higher charging currents than those from the anodes [3]. Considering that the direct
starting electron supply due to natural ionisation is rather unlikely in the critical volume of a surface
protrusion, it has been concluded that the enhanced charge generation at the metallic cathodes is due
to field emission [3].
Moreover, charge generation from rough interfaces is found to be a highly discontinuous process.
Whereas in some 4-h time intervals the charge sources significantly contribute to the surface charge
accumulation at the insulator, in other time intervals ranging up to 20 h, no discharge activity is
observed at these positions [3].
189
Figure D-3: Surface charge densities due to micro discharges at the insulator surfaces when (left) a
positive voltage is first applied and (right) after a negative voltage is sequentially applied to a
polished electrode corresponding to a homogeneous background field of 6 kV/mm [3].
Under technical conditions, in addition to charge generation at the protrusions of rough metal surfaces,
micro discharges at the insulator surfaces are found to be potential sources of inhomogeneous surface
charge pattern, as shown in Figure D-3. Starting from an electric field of 3 kV/mm in 0.45-MPa SF6, the
surfaces of Al2O3-filled epoxy insulators contribute to the charge generation in gas-insulated devices
[3]. No significant polarity dependence is found in the charge-generation processes at the insulating
interfaces. This result indicates that for micro discharges at the insulators, which are measured using
electric fields below 6 kV/mm, the starting electron supply from field emission plays a much less
important role than for the charge generation at the metallic cathodes [3].
From these results, micro discharges in the partially critical regime are expected to be highly relevant
for dimensioning of gas-insulated devices.
References Appendix D
M. Tschentscher, C. M. Franck, “Conduction Processes in Gas-Insulated HVDC Equipment:
From Saturated Ion Currents to Micro-Discharges”, IEEE Trans. Dielectr. Electr. Insul., Issue
GI-TL, August 2018, accepted for publication. (https://doi.org/10.3929/ethz-b-000231179)
M. Tschentscher, C. M. Franck, “A Critical Reexamination on Conduction Processes in Gas-
Insulated HVDC Devices at Low Electric Fields”, IEEE Trans. Dielectr. Electr. Insul., Issue GI-
TL, August 2018, submitted for publication. (https://doi.org/10.3929/ethz-b-000231185)
M. Tschentscher, C. M. Franck, “Microscopic Interface Processes in Gas-Insulated
(HVDC/HVAC) Systems”, IEEE Trans. Dielectr. Electr. Insul., Issue GI-TL, August 2018,
submitted for publication. (https://doi.org/10.3929/ethz-b-000231188)
H. Fujinani, T. Takuma, M. Yashima, T. Kawamoto, “Mechanism and effect of DC charge
accumulation on SF6 gas insulated spacers”, IEEE Trans. Power Delivery vol. 4, pp. 1765-
1771, 1989.
A. Bargigia, G. Mazza, A. Pigini, G. Rizzi, “Strength of typical GIS configurations with special
reference to composite and combined stresses”, Gaseous Dielectrics V, pp. 621-627, 1987.
C. X. Wang, A. Wilson, M. W. Watts, “Surface flashover sustained by electrostatic surface
charge on epoxy resin insulator in SF6”, 6th Conf. Dielectric Materials, Measurements and
Applications, pp. 182-185, 1992.
L. Zavattoni, "Conduction phenomena through gas and insulating solids in HVDC Gas
Insulated Substations, and consequences on electric field distribution", Ph.D. thesis, Université
de Grenoble, 2015.
B. Lutz, “Einflussfaktoren auf die elektrische Feldverteilung in Isoliersystemen mit polymeren
Isolierstoffen bei Gleichspannungsbelastung”, Ph.D. thesis, TU Munich, 2011.
R. Gremaud, Z. Zhao, M. Baur, “Measurement of DC conduction in alumina-filled epoxy”,
International Conference on Dielectrics (ICD), 2016.
190
C. Guillermin, P. Rain, S.W. Rowe, “Transient and steady-state currents in epoxy resin”,
Journal of Physics D: Applied Physics, 39 (3), pp. 515-524, 2006.
H. Yahyaoui, P. Notingher, Y. Kieffel, A. Girodet, “Analysis of conduction mechanisms in
alumina-filled epoxy resin under dc field and temperature”, Conf. Electr. Insul. Dielectr.
Phenom., pp. 667-670, 2013.
R. W. Warfield, M. C. Petree, “Properties of Crosslinked Polymers as Evidenced by Electrical
Resistivity Measurements”, Makromol. Chem. 58, pp. 139-159, 1962.
H. Iwabuchi, T. Donen, S. Matsuoka, A. Kumada, K. Hidaka, Y. Hoshina, M. Takei, “Influence
of Surface-Conductivity Nonuniformity on Charge Accumulation of GIS Downsized Model
Spacer under DC Field Application”, Electr. Eng. Japan vol. 181, pp. 29-36, 2012.
K. Nakanishi, A. Yoshioka, Y. Arahata, Y. Shibuya, “Surface Charging on Epoxy Spacer at DC
Stress in Compressed SF6 Gas”, IEEE Trans. Power Delivery vol. 102, pp. 3919-3927, 1983.
M-C. Lessard, G. Larocque, S. Gendron, S. Laberge, Y. Lavoie, “A New Approach for Assessing
the Moisture Content in SF6-Insulated Equipment”, IEEE Electrical Insulation Conference, pp.
539-542, 2016.
C. Y. Li, J. Hu, C. J. Lin, J. L. He, “The control mechanism of surface traps on surface charge
behavior in alumina-filled epoxy composites”, Journal of Physics D: Applied Physics, vol.49,
pp. 445304, 2016.
F. Gutfleisch, L. Niemeyer; “Measurement and Simulation of PD in Epoxy Voids”, IEEE Trans.
Dielectr. Electr. Insul. Vol. 2, pp. 729-743, 1995.
J. Kindersberger, “The statistical time lag to discharge inception in SF6”, Ph.D. thesis, TU
München, 1986.
M. Koch, M. Bujotzek, C. M. Franck, “Inception Level of Partial Discharges in SF6 Induced with
Short X-Ray Pulses”, Conf. on Electrical Insulation and Dielectric Phenomena, pp. 11-14, 2014.
N. Wiegart, L. Niemeyer, F. Pinnekamp, W. Boeck, J. Kindersberger, R. Morrow, W. Zaengl, M.
Zwicky, I. Gallimberti and S.A. Boggs, “Inhomogeneous Field Breakdown in GIS: The
Prediction of Breakdown Probabilities and Voltages”, IEEE Trans. Power Del. Vol. 3, pp. 931-
938, 1988.
C. Beyer, H. Jenett, D. Klockow, “Influence of reactive SFx gases on electrode surfaces after
electrical discharges under SF6 atmosphere”, IEEE Trans. Dielectr. Electr. Insul. Vol. 7 No. 2,
pp. 234-240, 2000.
C. Patrignani et al. (Particle Data Group), “The Review of Particle Physics 2017”, Chin. Phys.
C. 40, 2017.
U. Straumann, M. Schüller, C. M. Franck, “Theoretical Investigation of HVDC Disc Spacer
Charging in SF6 Gas Insulated Systems”, IEEE Trans. Dielect. Electr. Insul. vol. 19 No. 6, pp.
2040-2048, 2011.
M. Tenzer, V. Hinrichsen, A. Winter, J. Kindersberger, D. Imanovic, “Compact Gas-Solid
Insulating Systems for High-Field-Stress in HVDC applications”, Cigré Study Committee B3. &
D1 Colloquium Brisbane, paper No. 227, 2013.
J. Kindersberger, C. Lederle, “Surface Charge Decay on Insulators in Air and Sulfurhexafluorid-
Part I: Simulation”, IEEE trans. vol. 15, München, 2008.
J. E. Morgan, W. M. Nielsen, “Cosmic-Ray Shower Production and Absorption in Various
Materials”, Physical Review, Volume 50, 1936.
R. E. Wootton, "Electric charge accumulation on HVDC insulators in compressed-SF6-insulated
transmission lines", IEEE International Symposium on Electrical Insulation, pp. 214-217, 1984.
B. Zhang, Z. Qi, G. Zhang, “Charge accumulation patterns on spacer surface in HVDC gas-
insulated system: Dominant uniform charging and random charge speckles”, IEEE Trans.
Dielectr. Electr. Insul., Vol. 24, No. 2, pp. 1229-1238, 2017.
191
N. Fujimoto, “Conduction Currents in Gas-lnsulated Switchgear for Low Level DC Stress”,

Gaseous Dielectrics V, pp. 513-519, 1987.
R. Hanna, O. Lesaint, L. Zavattoni, “Dark Current Measurements in Humid SF6 at High
Uniform Electric Field”, Conf. Electr. Insul. Dielectr. Phenom. (CEIDP), pp. 19-22, 2016.
E. Volpov, “Dielectric Strength Coordination and Generalized Spacer Design Rules for HVAC-
DC SF6 Gas Insulated Systems”, IEEE Trans. Dielectr. Electr. Insul. vol. 11, pp. 949–963,
2004.
V. Teppati, Ph. Simka, “Ion Current Measurements in SF6 and Vacuum under High Voltage DC
Application”, 4th Int. Conf. on Electric Power Equipment (ICEPE-ST), paper No. 752812, 2017.
L. Zavattoni, R. Hanna, O. Lesaint, O. Gallot-Lavallée, “Dark current measurements in humid
SF6: influence of electrode roughness, relative humidity and pressure”, Journal of Physics D:
Applied Physics 48, 2015.
192
Appendix E: Measurement techniques and

measurement results for space charges
As mentioned in section 4.2.3.5, in most typical cases of epoxy-based insulators, surface charge
accumulation is of higher relevance for the electric field distribution of insulators than space charge
accumulation.
However, it is also of interest to know about the specific space charge properties of the materials
applied, as well as the application conditions, potentially these need to be considered in the design and
testing of insulators. Section E.1 gives an overview about measurement techniques. Measurement
results of typical, epoxy-based insulating materials are summarized in section [1]
E.1 Measurement techniques for space charges

Several different non-destructive space charge measurement techniques were developed within the last
two decades, mostly in conjunction with the development of DC power cables based on polymeric
materials. The basic idea behind these methods is to apply an external stimulation and to analyse the
response in terms of voltage or current signals.
Most experience is reported for thermal and acoustic methods. The most common measurement
techniques are given in [1]:
 PEA (Pulsed Electro-Acoustic)
 PWP (Pressure Wave Propagation)
 LIPP (Laser Induced Pressure Pulse)
 TSM (Thermal Step Method)
 TPM (Thermal Pulse Method)
 LIMM (Laser Intensity Modulation Method) and
 FLIMM (Focused - LIMM).
Investigations with epoxy materials were mainly conducted with TSM (Thermal Step Method) and Pulsed
Electro-Acoustic (PEA) method.
(1) Thermal Step Method (TSM)

The Thermal Step Method is based on the effect that a locally applied thermal step leads to a thermal
wave through the material sample, resulting in a non-uniform contradiction or expansion of the sample,
causing a variation of the local permittivity of the insulating material ([2] insulating material are
displaced, resulting in a current which can be measured externally. Based on the current measurement
and the known electric field, the charge density inside the insulating material can be determined. Further
information, especially for the application with epoxy material, is given in [2].
Figure E-1: Principle of TSM in short-circuited conditions: a) sample at equilibrium, b) application of

a thermal step [2]
(2) Pulsed Electro-Acoustic method (PEA)

A further method to determine space charge distributions in epoxy samples is the Pulsed Electro-
Acoustic (PEA) method. With an electric circuit, DC voltage as well as superimposed voltage impulses
are applied to a material sample, as shown in [3]. The voltage impulses exert a force on the charge
carriers in the insulating material and lead to a slight displacement of the charge carriers, generating
193
an acoustic pressure wave. This pressure wave is detected by a piezoelectric transducer. Based on this
signal, the space charge distribution can be determined in terms of magnitude and location.
Figure E-2: Block diagram of the PEA method [1]
E.2 measurement results for epoxy insulating materials

Paper [3] presents the application of thermal step method to measure space charges in a coaxial rod,
representing a GIS spacer which also contains a metallic insert to support the HV conductor.
[3] presents a cross section and an overview of the test sample. The electrodes are made of aluminum
and a DGEBA (diglycidyl ether of bisphenol-A) epoxy resin is injected between the internal and external
electrode providing an insulating layer of 3 mm.
3 mm
Internal
electrode
Guard
electrodes
66 mm 40 mm External
electrode
Resin
Figure E-3: Sample with aluminum electrodes moulded in alumina-filled epoxy resin [3]
The space charge density distribution was measured for different temperature and electric field
conditioning states, respectively 25 - 60 - 105 °C and 1.8 - 3.9 - 10.1 kV/mm. Some results are shown
in [3]. At a temperature of 25 °C and an electric field stress lower than 2 kV/mm, the space charge
density remains close to zero. The development of hetero-charges near the electrodes is observable, as
the temperature and the electric field increase.
For a conditioning temperature of 105 °C, close to the glass transition temperature of the epoxy system,
a higher charge density was found, especially at high electric field strength. Considering that the
molecular mobility increases with the temperature and the electric field, the charge distribution is
attributed to the combination of polarisation gradient and displacement of intrinsic charge carriers to
the electrode of opposite polarity.
194
Anode Cathode Anode Cathode
Figure E-4: Space charge density distributions after 4 h DC conditioning at 25 °C and 105 °C [3]
On a second sample the measurement of space charge was performed at 105 °C for different electric
field strengths and durations of conditioning [3]. For low electric field strength (1.8 kV/mm) only hetero-
charges were detected even after 72 hours of conditioning. When the electric field strength increases,
space charge distribution shifts from hetero-charge type to homo-charge versus time. For electric field
strength of 10.1 kV/mm, only homo-charges were observed regardless the conditioning time. Indeed,
under high electric field (10.1 kV/mm) or under long conditioning time at moderate electric field
(3.9 kV/mm), charges injected and trapped near the electrodes become predominant and can explain
the presence of homo-charges.
Anode Cathode Anode Cathode
Figure E-5: Space charge density distributions after conditioning at 105 °C under 10.1 kV/mm [3]
One can note that the space charge distribution obtained for two samples under the same experimental
conditions (10.1 kV/mm and 105 °C) can be completely different (Figure E-4 and Figure E-5). Hence,
the quality of the electrode/insulating material interface has a great influence on the development of
space charges. This is particularly true for high electric field strength and for long duration of stress.
Literature [4] reports about space charge measurements in disc-shaped Al2O3-filled epoxy samples,
applying the PEA method. The electric field strength was in the range from approximately 2 kV/mm up
to 19 kV/mm, while the temperature was 25 °C and 40 °C.
Figure E-6: Space charge distribution in epoxy after different stress durations at 25 °C and after
short circuit (‘10 s volt off’ indicates that the measurement has been performed after the stress
duration of 15 h plus 10 seconds after voltage switch off, 9.3 kV/mm, d = 1.07 mm [4]
195
An example of space charge distribution in epoxy is given in [4]. Resulting from the measurements,
injected homo-charges were found in front of the grounded electrode, while hetero-charges
accumulated in front of both electrodes. The accumulation of hetero-charges was dependent on the
material type, the temperature and the surface condition of the samples, assumed to be influenced by
casting and oxidation of the surface layer. Homo-charges did not remain at the surface, but travelled
further into the material, as shown in [4].
Figure E-7: Charge density over time in epoxy (abraded sample) at 40 °C at 10 kV/mm over a stress
duration of 15 h; space charge distribution [4]
A charge transport model was developed to enable proper simulation of space charge accumulation
processes [4]; the model takes into consideration the injection of charge carriers into the material,
charge accumulation in deep traps, charge transport and polarisation. [4] shows a comparison between
measured and simulated accumulated charge, demonstrating that the charge transport model has been
validated by the measurements.
Figure E-8: Measured and simulated accumulated charge per unit area in epoxy when switching off
different field strengths after a stress duration of 1 h and a temperature of 25 °C [4]
In a further work [5], the space charge formation in a pure Bisphenol-A epoxy resin material was
measured, depending on time, the electric field strength and electrode material. The PEA method was
applied. The investigations reveal that the resulting charge density as well as the injection electric field
threshold were dependent on the polarity, due to different injection mechanisms for positive and
negative charges and the use of asymmetric electrode materials.
196
For negative charges, the threshold was found to be lower than 3.6 kV/mm, while for positive charge
the value can be as high as 30 kV/mm. The authors concluded that electrons are the dominant charge
carriers in epoxy, due to the fact that negative charges are transported faster than positive charges,
and more electrons are injected into the material than positive charges.
References Appendix E
[1] A. Imburgia, R. Miceli, E.R. Sanseverino, P. Romano, F. Viola, "Review of space charge
measurement systems: acoustic, thermal and optical methods", IEEE Transactions on
Dielectrics and Electrical Insulation, vol. 23, issue 5, p. 3126 - 314
[2] P.S. Mbolo Noah, L. Zavattoni, J.C. Laurentie, S. Agnel, P. Notingher, P. Vinson, A. Girodet,
“Development of a space charge measurement method applied to HVDC GIS spacers”, 2016
IEEE Conference on Electrical Insulation and Dielectric Phenomena (CEIDP), Journal paper, p.
295 – 298, ISBN 978-1-5090-4654-6, 2016
[3] P.S. Mbolo Noah, L. Zavattoni, J.C. Laurentie, S. Agnel, P. Notingher, P. Vinson, A. Girodet,
“Space charge measurements for HVDC GIS spacer using thermal step method”, 2018, CIGRE
Paris Conference, paper D1-104
[4] T. Wendel, J. Kindersberger, “Effect of the Surface Layer on the Space Charge Accumulation in
Epoxy Samples under DC Stress”, IEEE Trans. Dielectr. Electr. Insul., submitted for publication
2020
[5] Miao He, Dayuan Qiang, Ning Liu, G. Chen, P.L. Lewin, “Investigation of charge injection
threshold field in epoxy resin”, 2015 IEEE Electrical Insulation Conference (EIC), Journal paper,
p. 49 – 52, ISBN 978-1-4799-7354-5, 2015
197
ISBN : 978-2-85873-547-1
TECHNICAL BROCHURES
©2021 - CIGRE
Reference 842 - September 2021

Technical Brochure: Dielectric Testing of Gasinsulated HVDC Systems

Uploaded by

Copyright:

Available Formats

Technical Brochure: Dielectric Testing of Gasinsulated HVDC Systems

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Technical Brochure: Dielectric Testing of Gasinsulated HVDC Systems

Uploaded by

Copyright:

Available Formats

D1/B3

Dielectric testing of gasinsulated

Dielectric testing of gas-

C. NEUMANN, Convenor DE S. NEUHOLD CH

List of symbols .................................................................................................................. 12

Scope And Objectives ............................................................................................. 23

Voltage and overvoltage stresses of gas-insulated HVDC Systems .................... 26

Basic phenomena and insulation properties at DC voltage and overvoltage

Typical defects and their PD characteristic ........................................................... 73

5.2.4 Void ................................................................................................................................................... 81

Recommendation for dielectric testing of gas-insulated HVDC systems .......... 128

7.6.11 Insulation System Test ................................................................................................................ 141

Test equipment, test procedures .......................................................................... 147

Testing of interfaces between DC cables and gas-insulated DC systems......... 168

Conclusion ............................................................................................................. 173

Appendix A: Prototype Installation test ......................................................................... 174

Appendix B: Pulse sequence Analysis (PSA) ............................................................... 181

PSA Pulse sequence analysis

𝐸AC max Maximum electric field strength at applied AC voltage V/m

𝑟c Radius from conductor – Figure 6.1-1 m

𝑈10(5) Breakdown voltage with 10 % breakdown probability for 5 insulators V

𝑈50 Breakdown voltage with 50 % breakdown probability V

𝑉bd,VRT,warm Breakdown voltage in warm condition of an insulator arrangement V

Figure 1-1: HV DC GIS history

Figure 1-4: DC links in the North Sea offshore grid [10]

VSC Converter DC GIS Reactors

Reduction of platform dimensions by about 10%

Figure 1-5: HVDC GIS switchyard installed on an offshore platform [11]

2. Scope And Objectives

 Long-term tests to determine limits for life-time

The following items will be considered:

3. Voltage and overvoltage stresses of gas-

+ B3+ OHL DC GIL 4 OHL C3+

A1 B1- OHL (AC/DC hybrid) C1-

B2- DC GIL A7 C2-

Figure 3.1-1: DC links, configurations under consideration [1]

Continuous operating voltage

Slow front overvoltages

Fast front overvoltages

Figure 3.6-1: Arrester characteristic [2]

3.6.1 Slow front overvoltages due to earth faults

SFO at line to earth faults

Voltage at fault location, 200 km

two-level VSC technology 1.0 MMC technology

2.0 with A4 & A5

3.6.2 Fast front overvoltages due to lightning

4. Basic phenomena and insulation properties at

Basic phenomena at DC voltage stress and field transition

Figure 4.1-1: Physical mechanisms in DC gas-solid insulation systems [1].

Figure 4.1-2 gives a schematic overview of these ion current regimes.

Figure 4.1-2: Ion current regimes as a function of the applied voltage

4.1.1 Conduction through solid insulation and along insulator surfaces

4.1.2 Surface charge accumulation from charge generation and transport in

4.1.2.1 Processes in the ohmic conduction regime (subcritical regime)

4.1.3 Field transition and effects at gas-insulator interfaces

(a) (b) (c) (d)

Figure 4.1-4: Simulated time t90% along interface 1 of a conical insulator

Insulating properties of typical gas-solid insulation systems and

4.2.1 Insulation characteristics in the gas gap at DC stress