1.

Latches constructed with NOR and NAND gates tend to remain in the
latched condition due to which configuration feature?
a) Low input voltages
b) Synchronous operation
c) Gate impedance
d) Cross coupling

2. One example of the use of an S-R flip-flop is as ___________

a) Transition pulse generator
b) Racer
c) Switch debouncer
d) A stable oscillator

3. The truth table for an S-R flip-flop has how many VALID entries?
a) 1
b) 2
c) 3
d) 4

4. When both inputs of a J-K flip-flop cycle, the output will

___________
a) Be invalid
b) Change
c) Not change
d) Toggle

5. Which of the following is correct for a gated D-type flip-flop?

a) The Q output is either SET or RESET as soon as the D input

goes HIGH or LOW
b) The output complement follows the input when enabled
c) Only one of the inputs can be HIGH at a time
d) The output toggles if one of the inputs is held HIGH

6. A basic S-R flip-flop can be constructed by cross-coupling of which

basic logic gates?

a) AND or OR gates
b) XOR or XNOR gates
c) NOR or NAND gates
d) AND or NOR gates
7. The logic circuits whose outputs at any instant of time depends
only on the present input but also on the past outputs are called
________________
a) Combinational circuits
b) Sequential circuits
c) Latches
d) Flip-flops

8. Whose operations are faster among the following?

a) Combinational circuits
b) Sequential circuits
c) Latches
d) Flip-flops

9. How many types of sequential circuits are?

a) 2
b) 3
c) 4
d) 5

10. The sequential circuit is also called ___________

a) Flip-flop
b) Latch
c) Strobe
d) Adder

11. The basic latch consists of ___________

a) Two inverters
b) Two comparators
c) Two amplifiers
d) Two adders

12. In S-R flip-flop, if Q = 0 the output is said to be ___________

a) Set
b) Reset
c) Previous state
d) Current state

13. The output of latches will remain in set/reset until ___________

a) The trigger pulse is given to change the state
b) Any pulse given to go into previous state
c) They don’t get any pulse more
d) The pulse is edge-triggered
 14. What is a trigger pulse?
a) A pulse that starts a cycle of operation
b) A pulse that reverses the cycle of operation
c) A pulse that prevents a cycle of operation
d) A pulse that enhances a cycle of operation

15. The circuits of NOR based S-R latch classified as asynchronous

sequential circuits, why?
a) Because of inverted outputs
b) Because of triggering functionality
c) Because of cross-coupled connection
d) Because of inverted outputs & triggering functionality

16. In D flip-flop, D stands for _____________

a) Distant
b) Data
c) Desired
d) Delay

17. The D flip-flop has _______ input.

a) 1
b) 2
c) 3
d) 4

18. 3. The D flip-flop has ______ output/outputs.

a) 2
b) 3
c) 4
d) 1

19. A D flip-flop can be constructed from an ______ flip-flop.

a) S-R
b) J-K
c) T
d) S-K

20. In D flip-flop, if clock input is LOW, the D input ___________

a) Has no effect
b) Goes high
c) Goes low
d) Has effect
21. In D flip-flop, if clock input is HIGH & D=1, then output is
___________
a) 0
b) 1
c) Forbidden
d) Toggle

22. The characteristic equation of D-flip-flop implies that

___________
a) The next state is dependent on previous state
b) The next state is dependent on present state
c) The next state is independent of previous state
d) The next state is independent of present state

23. Why do the D flip-flops receive its designation or nomenclature as

‘Data Flip-flops’?
a) Due to its capability to receive data from flip-flop
b) Due to its capability to store data in flip-flop
c) Due to its capability to transfer the data into flip-flop
d) Due to erasing the data from the flip-flop

24. A positive edge-triggered D flip-flop will store a 1 when ________

a) The D input is HIGH and the clock transitions from HIGH to LOW
b) The D input is HIGH and the clock transitions from LOW to HIGH
c) The D input is HIGH and the clock is LOW
d) The D input is HIGH and the clock is HIGH

25. With regard to a D latch ________

a) The Q output follows the D input when EN is LOW
b) The Q output is opposite the D input when EN is LOW
c) The Q output follows the D input when EN is HIGH
d) The Q output is HIGH regardless of EN’s input state

26. A register is defined as ___________

a) The group of latches for storing one bit of information
b) The group of latches for storing n-bit of information
c) The group of flip-flops suitable for storing one bit of information
d) The group of flip-flops suitable for storing binary information

27. The register is a type of ___________

a) Sequential circuit
b) Combinational circuit
c) CPU
d) Latches
28. How many types of registers are?
a) 2
b) 3
c) 4
d) 5

29. The main difference between a register and a counter is

___________
a) A register has no specific sequence of states
b) A counter has no specific sequence of states
c) A register has capability to store one bit of information but
counter has n-bit
d) A register counts data

30. In D register, ‘D’ stands for ___________

a) Delay
b) Decrement
c) Data
d) Decay

31. Registers capable of shifting in one direction is ___________

a) Universal shift register
b) Unidirectional shift register
c) Unipolar shift register
d) Unique shift register

32. A register that is used to store binary information is called

___________
a) Data register
b) Binary register
c) Shift register
d) D – Register

33. A shift register is defined as ___________

a) The register capable of shifting information to another register
b) The register capable of shifting information either to the right or
to the left
c) The register capable of shifting information to the right only
d) The register capable of shifting information to the left only

34. How many methods of shifting of data are available?

a) 2
b) 3
c) 4
d) 5
35. In serial shifting method, data shifting occurs ____________
a) One bit at a time
b) simultaneously
c) Two bit at a time
d) Four bit at a time

36. Ripple counters are also called ____________

a) SSI counters
b) Asynchronous counters
c) Synchronous counters
d) VLSI counters

37.  Synchronous counter is a type of ____________

a) SSI counters
b) LSI counters
c) MSI counters
d) VLSI counters

38. Three-decade counter would have ____________

a) 2 BCD counters
b) 3 BCD counters
c) 4 BCD counters
d) 5 BCD counters

39.  BCD counter is also known as ____________

a) Parallel counter
b) Decade counter
c) Synchronous counter
d) VLSI counter

40. The parallel outputs of a counter circuit represent the

_____________
a) Parallel data word
b) Clock frequency
c) Counter modulus
d) Clock count

41. How many types of the counter are there?

a) 2
b) 3
c) 4
d) 5

42.  A decimal counter has ______ states.

a) 5
b) 10
c) 15
d) 20
1. Answer: d
Explanation: Latch is a type of bistable multivibrator having two stable
states. Both inputs of a latch are directly connected to the other’s
output. Such types of structure are called cross coupling and due to
which latches remain in the latched condition.

2. Answer: c
Explanation: The SR flip-flop is very effective in removing the effects of
switch bounce, which is the unwanted noise caused during the
switching of electronic devices.

3. Answer: c
Explanation: The SR flip-flop actually has three inputs, Set, Reset and
its current state. The Invalid or Undefined State occurs at both S and R
being at 1.

4. Answer: c
Explanation: After one cycle the value of each input comes to the
same value. Eg: Assume J=0 and K=1. After 1 cycle, it becomes as
J=0->1->0(1 cycle complete) and K=1->0->1(1 cycle complete). The J
& K flip-flop has 4 stable states: Latch, Reset, Set and Toggle.

5. Answer: a
Explanation: In D flip flop, when the clock is high then the output
depends on the input otherwise reminds previous output. In a state of
clock high, when D is high the output Q also high, if D is ‘0’ then output
is also zero. Like SR flip-flop, the D-flip-flop also have an invalid state
at both inputs being 1.

6. Answer: c
Explanation: The basic S-R flip-flop can be constructed by cross
coupling of NOR or NAND gates. Cross coupling means the output of
second gate is fed to the input of first gate and vice-versa.

7. Answer: b
Explanation: In sequential circuits, the output signals are fed back to
the input side. So, The circuits whose outputs at any instant of time
depends only on the present input but also on the past outputs are
called sequential circuits. Unlike sequential circuits, if output depends
only on the present state, then it’s known as combinational circuits.

8. Answer: a
Explanation: Combinational circuits are often faster than sequential
circuits. Since the combinational circuits do not require memory
elements whereas the sequential circuits need memory devices to
perform their operations in sequence. Latches and Flip-flops come
under sequential circuits.
 9. nswer: a
Explanation: There are two type of sequential circuits viz., (i)
synchronous or clocked and (ii) asynchronous or unclocked.
Synchronous Sequential Circuits are triggered in the presence of a
clock signal, whereas, Asynchronous Sequential Circuits function in
the absence of a clock signal.

10. Answer: b
Explanation: The sequential circuit is also called a latch because both
are a memory cell, which are capable of storing one bit of information.

11. Answer: a
Explanation: The basic latch consists of two inverters. It is in the sense
that if the output Q = 0 then the second output Q’ = 1 and vice versa.

12. Answer: b
Explanation: In S-R flip-flop, if Q = 0 the output is said to be reset and
set for Q = 1.

13. Answer: a
Explanation: The output of latches will remain in set/reset untill the
trigger pulse is given to change the state.

14. Answer: a
Explanation: Trigger pulse is defined as a pulse that starts a cycle of
operation.

15. Answer: c
Explanation: The cross-coupled connections from the output of one
gate to the input of the other gate constitute a feedback path. For this
reason, the circuits of NOR based S-R latch classified as
asynchronous sequential circuits. Moreover, they are referred to as
asynchronous because they function in the absence of a clock pulse.

26. Answer: d
Explanation: A register is defined as the group of flip-flops suitable for storing binary
information. Each flip-flop is a binary cell capable of storing one bit of information. The
data in a register can be transferred from one flip-flop to another.
27. Answer: a
Explanation: Register’s output depends on the past and present states of the inputs. The
device which follows these properties is termed as a sequential circuit. Whereas,
combinational circuits only depend on the present values of inputs.
28. Answer: c
Explanation: There are 4 types of shift registers, viz., Serial-In/Serial-Out,
Serial-In/Parallel-Out, Parallel-In/Serial-Out and Parallel-In/Parallel-Out.

29. Answer: a
Explanation: The main difference between a register and a counter is that a register has
no specific sequence of states except in certain specialised applications.

30. Answer: c
Explanation: D stands for “data” in case of flip-flops and not delay. Registers are made
of a group of flip-flops.

31. Answer: b
Explanation: The register capable of shifting in one direction is unidirectional shift
register. The register capable of shifting in both directions is known as a bidirectional
shift register.
32. Answer: b
Explanation: A register that is used to store binary information is called a binary register.
A register in which data can be shifted is called shift register.

33. Answer: b
Explanation: The register capable of shifting information either to the right or to the left is
termed as shift register. A register in which data can be shifted only in one direction is
called unidirectional shift register, while if data can shifted in both directions, it is known
as a bidirectional shift register.

34. Answer: a
Explanation: There are two types of shifting of data are available and these are serial
shifting & parallel shifting.

35. Answer: a
Explanation: As the name suggests serial shifting, it means that data shifting will take
place one bit at a time for each clock pulse in a serial fashion. While in parallel shifting,
shifting will take place with all bits simultaneously for each clock pulse in a parallel
fashion.
 36. Answer: b
Explanation: Ripple counters are also called asynchronous counter. In
Asynchronous counters, only the first flip-flop is connected to an external clock
while the rest of the flip-flops have their preceding flip-flop output as clock to
them.

37. Answer: c
Explanation: Synchronous Counter is a Medium Scale Integrated (MSI). In
Synchronous Counters, the clock pulse is supplied to all the flip-flops
simultaneously.

38. Answer: b
Explanation: Three-decade counter has 30 states and a BCD counter has 10
states. So, it would require 3 BCD counters. Thus, a three-decade counter will
count from 0 to 29.

39. Answer: b
Explanation: BCD counter is also known as decade counter because both have
the same number of stages and both count from 0 to 9.

40. Answer: d
Explanation: The parallel outputs of a counter circuit represent the clock count. A
counter counts the number of times an event takes place in accordance to the
clock pulse.

41.  b
Explanation: Counters are of 3 types, namely, (i)asynchronous/synchronous, (ii)single
and multi-mode & (iii)modulus counter. These further can be subdivided into Ring
Counter, Johnson Counter, Cascade Counter, Up/Down Counter and such like.

42. Answer: b
Explanation: Decimal counter is also known as 10 stage
counter. So, it has 10 states. It is also known as Decade
Counter counting from 0 to 9.