EELE 461/561 - Digital System Design - Interconnect Construction (Printed Circuit Boards) Printed Circuit Boards
EELE 461/561 - Digital System Design - Interconnect Construction (Printed Circuit Boards) Printed Circuit Boards
EELE 461/561 - Digital System Design - Interconnect Construction (Printed Circuit Boards) Printed Circuit Boards
(Printed Circuit Boards) - we have examined how parasitics along a Transmission Line can lead to
• Topics reflections and risetime degradation.
- now we look at one of the interconnect technologies that is used in modern digital systems.
1. Printed Circuit Board Construction
2. Printed Circuit Board Design - by understanding the manufacturing steps used to create an interconnect, we can understand:
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• Terminology • Construction
“PCB” = Printed Circuit Board (i.e., a “board”) - there are a variety of methods to create a PCB.
“PWB” = Printed Wiring Board (same as PCB) - the general approach is to start with a sheet of copper attached to an insulator and then
remove copper leaving only your desired interconnect pattern.
“PCA” = PCB Assembly, a PCB that is loaded with components
- this is called a subtractive method and is the most common technique.
“Fab” = the process of creating the PCB
- we’ll first go over all of the major process steps used in creating a PCB.
“Load” = the process of attaching the components to the PCB
1) The CORE
2) Patterning
3) Vias
4) Pattern Plating
5) Solder Mask
6) Surface Finish
7) Silk Screening
- then we’ll put them together in the appropriate sequence from start to finish.
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- this typically consists of two sheets of thin copper laminated (or glued) to an insulating material. - the most commonly used conducting material is Copper (Cu)
- COREs come in large sheets which are typically ~18” x 24” (but can be as large as 24” x 48”)
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PCB: Core PCB: Patterning
CORE Insulators - there are 2 common techniques to remove material from the core to leave only the
desired conduction paths.
- there are many different types of insulating material, each with varying degrees of:
1) Photoengraving / Photolithography
- Cost
- Dielectric Constants - a photomask is created by printing a design pattern onto a translucent material.
- Electrical Performance (i.e,. Disipation factor = loss tangent)
- Mechanical Robustness (rigidity, peel-strength, CTE) - this is very similar to printing an overhead transparency using a laser printer.
- COREs are typically reinforced with a weave of fiber - the CORE is then covered in a photosensitive material (photosensitive dry film, or photoresist).
- FR4 (Fire Retardant Epoxy #4) is the most common dielectric in use today. - when the photosensitive material is exposed to light, its properties change.
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• Patterning • Patterning
- the CORE is exposed to a light source through the photomask - an etching solution is then applied to the CORE which removes the “now soluble”
photosensitive material in addition to the copper foil beneath it.
- a solution is then applied that develops the photosensitive material making is soluble.
- this etching step removes any copper on the CORE that was exposed to light through
the photomask, thus transferring the pattern.
- once the remaining photosensitive material is stripped using a cleaning solution, the CORE
is left with a pattern of copper identical to the pattern on the photomask.
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2) PCB Milling - A via is a structure that electrically connects two different layers of copper in a PCB.
- another subtractive technique is to use a a milling bit (similar to a router or drill bit) to - the first step in creating a via is to drill a hole where the contact will be made.
mechanically remove copper from the CORE leaving only the desired pattern.
- this can be done using:
- we have one of these machines at MSU.
1) A mechanical process (i.e., a regular drill bit). This is currently the most common approach.
or
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PCB: Vias PCB: Vias
- The next step in creating a via is to deposit Copper into the holes in order to Plate the inner - The end result is a structure that connects different layers of a PCB.
diameter of the via with a conducting material.
- The “via” is also called a “Plated Through Hole”
- PCB Via plating is accomplished by an Electroless Plating Process in which a series of chemical
reactions are performed to transfer copper atoms from a Sacrificial Copper Source to the
barrels of the via holes.
NOTE:
“Electroless Plating” uses a chemical NOTE: The Aspect Ratio is the ratio of the Thickness of the Hole (or Depth) to be plated to the
reaction to release hydrogen from the
target in order to create a negative Diameter of the Hole. If the aspect ratio is too large (i.e., deep & skinny holes), then
charge and attract the plating metal to the copper plating will not reach the center of the hole and result in an open circuit.
its surface.
Depth
Via Aspect Ratio
Diamter
PCB fab shops will specify the maximum aspect ratio they can achieve (typically ~4-6)
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- the copper deposited from the Electroless Plating step applies a thin layer of copper on the entire - solder mask is a protective insulating layer that goes over the outer sides of the PCB.
surface of the CORE in addition to inside the drilled via holes.
NOTE: this is typically the green material you see on boards.
- the plating in the via barrels is typically not thick enough (i.e., <0.001") to be reliable. To address
this, a second Electrochemical plating is performed. - copper is very susceptible to oxidation so if the pattern is going to be exposed to ambient air,
they need to receive additional plating to protect against oxidation.
- pattern plating deposits a material over the copper circuitry that will protect it during a subsequent
etch stage. A material such as tin can be used to cover the copper traces to protect them. - oxidation is the reaction of oxygen with the copper. During this process, the copper is actually
consumed. So a thin layer of copper can actually be completely oxidized into an insulator.
- the copper is first thickened using an additional Electrochemical plating process.
- solder mask is a layer of polymer that can be applied using either silk screening or a spray.
- once applied, the tin is deposited on the pattern.
- the solder mask covers all conducting circuits on the board with the exception of any
- after the etch, the tin can be stripped off or left on depending on the manufacturer. pads that components will connect to.
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- also referred to as Solder Coat or Exposed Conductor Plating - silk screening is the process of adding documentation to the board.
- the pads of a board must receive a special surface finish to: - the term silk screen refers to the process of transferring a pattern using a special stencil.
1) resist oxidation from long periods of storage while waiting for loading - a stencil is a sheet of material that has physical openings in it that represent the pattern to be
2) prepare them for the application of solder transferred.
- to accomplish this, a layer of conducting material is applied to the pads after solder masking. - in a silk screen stencil, the openings are typically a set of small dots (i.e., a screen)
Ex) Tin-Lead Solder (industry is trying to move to “lead free” plating) - the stencil is laid on top of the board and then a documentation material is applied to the entire
Gold board using a roller & squeegee or spray.
Silver (Lead-Free compliant, ROHS)
- when the stencil is removed, the documentation material remains in the pattern of the openings
- this step is what gives the pads on the board the shiny look that you see on the stencil.
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PCB: Silkscreen 2 Layer PCB Example
- you typically cannot draw silk screen lines that are smaller than the copper due to the resolution - we create our design in a CAD tool (i.e., Mentor PADS)
of the screening process. which generates files to create a photomask
- when looking at how small of a line can be drawn using a silk screen, manufacturers typically
talk about LPI (lines per inch). In general, the smallest silk screen lines are ~0.008”
silk screen machine patterns remaining after silk screen NOTE: 2 Layer Example Images from PCBexpress.com
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- we now drill through holes where vias are going to be - we now transfer the pattern from our photomask to
located. the core by:
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- we now strip the photo resist layer off of the core exposing - the pads that are visible through the solder mask will
the unwanted copper. ultimately make contact to components using solder.
- an etch is performed which removes all of the unwanted - In order to prepare the pads for the components, a layer
copper. of material is applied to the pads that:
- the copper circuitry is protected by the tin and - is easily soldered to (i.e., Solder, Gold, or Silver)
remains after the etch. - that prevents any oxidation on the pads so that the
board can be stored while waiting for load.
• Step 8 – Solder mask
- an insulating layer of solder mask is applied to the core. • Step 10 – Silk Screen
- the solder mask covers all of the conductors with the exception - documentation is now added to the board using a
of any pads that are to be used to connect to components. silk screen material.
- this layer provides protection against inadvertent shorting - documentation is important for:
of the conductors.
- board identification
- component locators
- component orientations
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2 Layer PCB Example Multi Layer PCBs
- typically, multiple images of the same PCB are - the same set of steps can be used to create PCB’s with more than 2 layers.
put on one panel for processing.
- in this case, multiple cores are patterned and then laminated together using an insulator
- this allows the previously described process steps material called a pre-preg
to create multiple boards in the same amount of time.
- the pre-preg serves as an insulator but has an adhesive property to it that glues the cores
- the last step is to de-panelize, or route out the together.
individual boards.
- the pre-preg material can be the same insulating material as the core.
NOTE: Some automated loading processes can load the boards while still panelized.
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- the resultant stack of layers is called a “stackup” - creating multi-layer PCBs involves some changes to the fabrication process.
- outer layers can be added to the stack by applying a pre-preg to the core and then laminating 1) Drilling occurs after the final lamination takes place.
a copper foil on top of it.
2) The inner layer traces are patterned prior to drilling and lamination and
- the entire stack (core + pre-pregs) are put into a press. DO NOT need to undergo the pattern plating and surface finish step.
- the press applies pressure and temperature in order to bond the materials together into - notice that the through-hole vias will extend
one rigid assembly. through the entire thickness of the board
even if the desired connectivity is between
the top two layers.
4 Layer PCB
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- we need to create photo masks for each layer in - we now fully pattern the inner layers of the PCB.
the design.
- this step is slightly different from a 2 layer PCB because these traces will not be on the outside
- for a 4 layer board, we need to have photo masks of the board so they aren’t susceptible to oxidation (i.e., no need for pattern plating).
for each of the 4 metal layers in addition to
misc layers (silk, mask, etc.. more on this later) - in addition, since there will no components contacting these layers, there is no need for a
surface finish or solder mask.
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4 Layer PCB Example 4 Layer PCB Example
- now a pre-preg material is applied to both sides of the - the outer layers are now coated with photoresist and
CORE and foil is laminated on both sides. the pattern is transferred using the outer layer photo masks.
- the drill holes are then plated with copper using an - a layer of tin (or solder) is then added to the surface to
Electroless plating process. protect the copper from the ensuing etch.
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- we now strip the photo resist layer off of the core exposing - now a solder mask is applied over the outer layers leaving
the unwanted copper. openings for the pads to which components will be
soldered.
- an etch is performed which removes all of the unwanted
copper. - “SMOBC” stands for “Solder Mask Over Bare Copper”
and refers to a process in which the tin pattern plating
- the copper circuitry is protected by the tin (or solder) and was removed.
remains after the etch.
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- lastly, documentation is added to the outer layers of the - a PCB CAD tool allows us to enter our design and ultimately produce information that a PCB Fab
U1
boards. shop can use to create the PCB.
- the files that the tool produces are called “Computer Aided Manufacturing (CAM) files.
• Step 13 – De-panelization 1) Part Library Development - A library contains all of the parts in your design. Each
part contains a schematic, a physical layout, and
- if multiple images were fabricated on the same panel, information about the vendor that can be used to create
then the boards are now routed into individual boars. a “Build of Materials”
2) Schematic Entry - A schematic contains all of the part symbols and how they
are connected. “Parts” will drive forward the pad
configuration in the layout and “nets” will drive forward
the traces and plane shapes.
4) CAM - The final step is to create the Gerbers, Drill Files, and
Drawings to be sent to the fab shop.
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PCB CAD (GERBER) PCB CAD (GERBER)
• GERBERs • GERBERs
- in the PCB CAD tool, each design image is assigned a Layer - each layer in the design will produce its own GERBER file.
- every metal layer will be assigned its own layer. Ex) for a 4 layer board, we will have:
- layers are numbered in ascending order from top to bottom (ex. L1, L2, L3, L4) L1.pho
L2.pho
- layers are also used to describe the top and bottom side Solder Mask L3.pho
L4.pho
- layers are also used to describe the top and bottom side Silk Screen top_silk.pho
top_mask.pho
- the CAM files from the CAD tool are produced in an industry standard format called GERBER bottom_silk.pho
bottom_mask.pho
- extensions for GERBERS can be *.GBR, *.PHO, *.ART (Mentor Pads uses *.PHO)
aperture_report.rep
- a GERBER file describes the image patterns that are present on that layer.
- an “aperture” file is a way to describe to the photo plotting machines how to interpret the shapes
described in the GERBER.
NOTE: the term Gerber comes from a standard format for photo plotters published by
the Gerber Systems Corporation in 1980.
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• Example : GERBERS for a 4 layer PCB (Metal Layers) • Example : GERBERS for a 4 layer PCB (Top Silk & Top Mask)
L1.pho L1.pho
(shown again for reference)
L2.pho
(this layer is a ground plane) top_mask.pho
top_silk.pho
L4.pho
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• Example : GERBERS for a 4 layer PCB (Bottom Silk & Bottom Mask) • Drill Data
- information for drill sizes and locations are contained within a separate set of files.
L4.pho
(shown again for reference) - these files are called “Numerically Controlled Drill (NCD) Files” or “Excellon” files.
- the information in these files is a list of XY coordinates for where each drill hole will be made.
bottom_mask.pho drill.drl : the NCD drill file that is read by the drilling machine
drill.lst : a list of drill coordinates in a user-friendly format for manual checking
-note that this layer is negative, meaning drill.rep : a list of all drill sizes in a user-friendly format for manual checking
that the shapes represents where
mask will NOT be
bottom_silk.pho
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PCB CAD (Drill Data Example) PCB CAD (Drill Data Example)
• Example : Drill files for a 4 layer PCB • Example : Drill plot for a 4 layer PCB
drill.drl drill.lst drill.rep - we can plot our drill data over the top of our GERBERS in order to see if the holes line up
to check that everything is accurate.
% Drill Listing Drill Sizes Report
T1C.008F0S0 ============= ==================
X02345Y0105 Drill: .008 Tool: 1 Feed: 0 Speed: 0 Tool Size Pltd Feed Speed Qty
X0231Y0105 X 234500 Y 105000 ==== ==== ==== ==== ===== ===
X0231Y0109 X 231000 Y 105000 1 8 x 0 0 443
X02345Y0109 X 231000 Y 109000 2 29 x 0 0 8
X02345Y0113 X 234500 Y 109000 3 33 - 0 0 2
X0231Y0113 X 234500 Y 113000 4 100 - 0 0 16
X02345Y0117 X 231000 Y 113000
X0231Y0117 X 234500 Y 117000
X02345Y0233 X 231000 Y 117000
X0231Y0233 X 234500 Y 233000
X0231Y0237 X 231000 Y 233000
X02345Y0237 X 231000 Y 237000
X02345Y0241 X 234500 Y 237000
X0231Y0241 X 234500 Y 241000
X02345Y0245 X 231000 Y 241000
: :
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• Fab & Drill Drawings • Combined Fab/Drill Drawings Special Notes about Board
- in addition to the CAM files that you send to a PCB manufacturer, you also need to generate
drawings so that the fab engineers can understand what you are trying to accomplish. Stackup, Material,
and Surface Finish
- this provides an additional layer of checking. Information
- there are two main types of drawing that accompany your CAM files:
Drill Table
Combined Drill/Fab Drawing
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- The Gerber, Drill, and Drawing files were sent to a fab shop and 1 week later the PCB arrived. - The physical sizes that we use in a PCB design are not arbitrary.
- The minimum sizes and spacing are dictated by the Fabrication Vendor.
- Prior to designing a PCB, you must look at the Design Rules for potential vendors and
select the Design Rules that meet your application.
- On a PCB, the smaller the features, the more circuitry that can fit on a board.
- However, the smaller the feature, the higher the cost of the board.
- In addition, when designing transmission lines, we select our material, widths, and spacing
in order to achieve a characteristic impedance. Not necessarily the minimum geometry.
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Design for Manufacturability Design for Manufacturability
• IPC • IPC
- “Institute for Interconnecting and Packaging Electronic Circuits” - IPC specs all aspects of electronic
interconnect (PCB, Assembly, Materials, etc.)
- The organization that defines PCB standards.
- The dimensions we are interested in
- PCB Fab vendors will typically adhere to a particular IPC standard. are found in the “Printed Board / Acceptance”
section:
- This allows you to design your board using widths/spacing from an IPC standard that
is independent of a PCB Fab vendor.
- This way, your design can be sent to any Fab shop that supports that particular IPC standard.
- IPC will work with a group of experts in the field and define the dimensions that can be
achieved for a given standard. This way a standard is achievable by the majority of Fab Shops
that are regularly improving their processes.
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- in high volumes, PCBs are loaded using automatic assembly machines. - Through-Hole Technology refers to components that have leads that extend all the way through
the PCB.
- this is typically called “Pick and Place” which refers to the robotic arms picking up a
component from a bin of parts and placing it on the PCB. - When designing a PCB, a plated through-hole is created that is large enough to accept the
leads of the part.
- The leads of the part are then inserted into the holes.
- The entire board is then ran through a Wave Soldering process which applies solder to the
backside of the board.
- The leads are then trimmed from the backside of the board.
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SMT Component Loading SMT Component Loading
- SMT refers to components that only contact the surface of the board. - the first step in using automated SMT assembly is to apply solder paste.
- this allows components to be loaded without having to drill holes in the board. - solder paste is a mixture of solder and flux.
- this allows much smaller components to be used. - flux is an acid solution that eats through oxidation.
- SMT technology can be used on both the top and bottom of the PCB (i.e., doubled sided PCAs) - by mixing solder and flux together, a thick, viscous material is create
(about the same viscosity as toothpaste).
- this material is called solder paste and has some attractive properties:
- The entire board is then heated up in a reflow oven. This burns the flux out of the paste leaving
only molten solder. When the board is cooled, a solid solder joint is formed.
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- if a board is to be loaded using automated SMT pick and place technology, the CAD tool
must produce data for the paste stencil.
top_paste.pho
bottom_paste.pho
ex)
L1.pho
top_paste.pho
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- We’ve seen that a transmission line is described in terms of Impedance and Prop Delay - A microstrip transmission line consists of a signal trace residing over an infinite ground plane.
- We’ve also seen that the Characteristic Impedance and Prop Delay are only functions - On a PCB, these transmission lines exist when you use the outer layers for signal traces
of the inductance and capacitance of the line: and then put a plane beneath (typically directly beneath, L2)
- We use the term Controlled Impedance to describe T-line structures where we define a geometry
in which we know exactly where the signal and return current propogate.
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PCB Transmission Lines PCB Transmission Lines
- This is simply a microstrip that is buried within the dielectric. - A stripline transmission line consists of a signal trace sandwiched between two return planes
- This type of structure attempts to contain all of the field lines within the same dielectric material. - On a PCB, these transmission lines exist on inner layers if you are able to put planes above and
beneath the signal layer (typically requires at least 6 layers)
2) The field lines are strongly coupled to the two ground planes so coupling to
adjacent neighbors is minimized.
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- A coplanar transmission line uses the same metal layer of the PCB for both the signal and return. - sources of impedance discontinuities on PCB’s
- this is commonly used on PCB’s with very few layers. 1) Vias (typically larger than the traces we use)
2) Pads (typically larger than the traces we use)
3) Cross-talk (coupling to other traces causes Z0 to change)
4) Return Path (switch routing layers also requires a change in the return path)
5) Dk variance (Dk can change from one region of the board to another)
6) Etching Tolerance (Trace widths will have tolerances, +/-x%, that changes Z0)
7) Etching Variance (Trace widths can change due to etching variance across the board)
8) Plating Variance (The thickness of a trace can chance across the board due to plating)
9) Thickness Variance (The lamination may result in different board thicknesses vs. location)
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