764 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 51, NO.

3, JUNE 2004

Study of Low Noise Multichannel Readout

Electronics for High Sensitivity PET Systems
Based on Avalanche Photodiode Arrays
Frezghi Habte, Member, IEEE and Craig S. Levin, Member, IEEE

Abstract—A compact, low noise, and low cost readout system tion light collection efficiency in order to preserve high detector
based on commercially available application-specific integrated signal-to-noise ratio (S/N). Based on this design, ultra-high
circuits (ASICs) is under investigation. These front-end circuits resolution, high sensitivity PET systems are being developed
have been used to readout a prototype detector module comprising
Lutetium Oxyorthosilicate (LSO) scintillation crystals coupled for breast and small animal imaging.
to avalanche photodiode (APD) arrays. A major goal for this This paper describes the study of readout electronics for the
work is to build a dedicated high performance breast imaging proposed PET system based on compact APD detector modules.
PET system. Characteristics of signal response, noise, pedestals One design for the prototype APD arrays requires individual
and gain of the chip have been evaluated. The channels have a channel readout to provide best spatial and energy resolution.
linear response to within 2% across a 50 fC dynamic range.
The circuits allow hardware adjustment of bias levels to allow In order to practically manage a relatively large number of such
gain uniformity of less than 5% for all channels within a chip readout channels, low noise and low power integrated front-end
and the gain performance is very stable over all channels. Initial readout electronics optimized to a particular design configura-
tests of the chip when connected to a prototype APD array also tion are required. Recently, low noise and low power applica-
showed good performance. 13% energy resolution was obtained tion specific integrated circuits (ASICs) have been designed for
with direct 5.9 keV X-ray interactions in an individual APD pixel.
Initial performance evaluation indicates that the ASIC may serve certain types of APD arrays [13], [14]. However, these designs
as a foundation for front-end readout electronics for the proposed are not currently commercially accessible for our application.
PET system. On the other hand, there are ASIC chips available commercially
Index Terms—Application specific integrated circuit, avalanche [15], [16] that have been designed initially for other applications
photodiode, multichannel readout, PET system. but which have many interesting features that can be used with
the state-of-the-art APDs. This work focuses in evaluating such
chips for the development of a compact, low noise and low cost
I. INTRODUCTION front-end readout.

T HERE is a considerable demand in recent biomedical re-

search to improve the spatial resolution of positron emis-
sion tomography (PET) systems [1]–[5]. The spatial resolution II. PROPOSED PET SYSTEM AND READOUT REQUIREMENTS
of PET imaging depends on several limiting factors such as Fig. 1 depicts the proposed design of small, high sensitivity
detector size, annihilation photon noncollinearity, and positron PET systems, which are being developed for breast and small
range [6]. Recent work [7] suggests that high spatial resolution animal imaging. The PET systems will be built using several
can be achieved using compact and highly pixellated avalanche 1-D detector modules, each consisting of a very thin
photodiode (APD) arrays coupled to fine LSO scintillation crys- APD array coupled to a very thin rectangular LSO crystal sheet.
tals. APDs are currently popular in many applications [8]–[11] These detector layers are stacked together and placed “edge on”
and are particularly appealing for high resolution PET system with respect to incoming photons.
design due to their compactness, high quantum efficiency, good The prototype detector module uses an APD array that
spatial uniformity, insensitivity to magnetic fields, flexible geo- comprises 41 rectangular elements, each with dimension of
metric configuration, and potentially low cost. 0.7 7 on a 1 mm pitch. The final APD array module
A novel detector configuration has been proposed which will be thick and more compact with more channels.
exploits the high compactness of APDs [12]. In this design In this prototype design, individual APD channel readout
concept, APD readout arrays are coupled to the side face is selected in order to provide optimal spatial and energy
of fine LSO crystals rather than to the end faces. This new resolutions. To efficiently manage a large number of channels
coupling scheme provides nearly complete scintilla- involved in the design and significantly reduce heat generation
in the system, integration of many of the APD channels into
Manuscript received October 27, 2003; revised January 15, 2004. This
work was supported in part by the Susan G. Komen Foundation under Grant a low power and low noise ASIC front-end chip optimized
IMG-0346 and by the Whitaker Foundation under Grant RG-01-0492. for the system is necessary. In this work, the possibility of
The authors are with the Department of Radiology, Molecular Imaging utilizing commercially available multichannel front-end chips
Program, Stanford University, Stanford, CA 94305-5344 USA (e-mail:
fhabte@Stanford.edu). is investigated in order to significantly reduce the development
Digital Object Identifier 10.1109/TNS.2004.829599 time and cost.
0018-9499/04$20.00 © 2004 IEEE

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HABTE AND LEVIN: LOW NOISE MULTICHANNEL READOUT ELECTRONICS FOR HIGH SENSITIVITY PET SYSTEMS 765

Fig. 1. Depiction of small PET designs for: (a) small animal and (b) breast imaging systems and (c) prototype 1-D array detector module comprises an LSO
crystal sheet coupled to an APD array.

Fig. 2. Prototype readout system setup.

III. PROTOTYPE READOUT SYSTEM SETUP

Fig. 3. Front-end ASIC architecture.
A prototype multichannel readout system has been setup as
indicated in Fig. 2. A prototype APD detector array is con-
nected to a multichannel readout board (IDEAS ASA), hosting 32 channels of a parallel analog readout circuit followed by
two ASIC chips. Each ASIC chip consists of 32 input readout a corresponding analog trigger circuit. A summary of typical
channels that can operate independently. The output from each specifications for the selected chip is shown in Table I.
channel is multiplexed and readout serially by a data acquisition A single channel includes a low power charge-sensitive
unit, which is interfaced to a PC for processing. preamplifier, slow shaper, sample/hold, and fast trigger circuits
All channels can also be tested through a multiplexed input (Fig. 3). The trigger chip includes a fast CR-RC shaper followed
that allows injecting a test charge into a specific channel. by externally adjustable level-sensitive discriminator. A signal
External bias adjustment is provided for calibration purposes. above the threshold level generates a trigger signal, which is
ORed to provide a single trigger output.
The board allows control and measurement of fundamental
parameters of the chip, which includes pedestal, noise, and The timing and signal acquisition sequence is depicted in
gain. The internal architecture of the chip is illustrated in Fig. 3. Fig. 4. The output signal from the preamplifier circuit is fed
simultaneously to slow and fast shaper circuits. The fast shaper
output passes through the discriminator and generates a trigger
IV. THE FRONT-END ASIC CHIP
signal if the input signal is above pre-set threshold value. This
The front-end readout ASIC chip is based on the VA/TA chip trigger signal is fed back to analog circuit and enables the
series from IDEAS, Norway. A single VA/TA chip includes sample/hold signal to sample the data simultaneously. The data

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766 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 51, NO. 3, JUNE 2004

TABLE I
VA/TA SUMMARY OF SPECIFICATIONS

Fig. 5. Preamp/Shaper signal response for one channel.

Fig. 6. Pedestal and noise variation between ASIC channels without APD
array connected.
Fig. 4. Signal acquisition sequence.

Fig. 6 shows the noise and pedestal measurements for all

is then acquired sequentially through the multiplexed output to channels. The values are obtained by a multiplexed readout se-
the acquisition unit, which is interfaced to a PC for processing. quence, where a hold is applied and a consecutive sampling of
Once the data is read, the sample/hold circuit is disabled to the shaped signals has been performed and averaged. The in-
allow acceptance of the next event. trinsic noise of the chip is uniform over all channels to within
. The pedestal represents the minimum detected pulse
height for a given channel. Pedestal spread is relatively large
V. ASIC PERFORMANCE TEST MEASUREMENTS
( of the average pulse height) but may be corrected in soft-
Evaluation measurements have been performed to test the in- ware.
trinsic performance of the ASIC using a digital test pulse. A External bias adjustment keeps the gain variation between
digital voltage step was applied via external 1.8 pF capacitor to channels in a single chip to less than 5% (Fig. 7). There is a
a calibration input of the chip. This provided a test charge input variation in gain between the two 32-channel circuits that
that was accessible to all channels via the input multiplexer that may be corrected in post-processing.
operates in parallel with the output multiplexer. This process is The linearity as function of input test charge that mimics a
controlled via 32-bit shift register included in the chip. The test 511 keV photon LSO-APD signal for one channel of the ASIC
signal was also applied to one selected channel at a time to ob- was measured using an external pulser. In this case the test mode
serve individual channel response of the chip. operation was disabled to enable the input channels to accept
Fig. 5 shows a semi-Gaussian shaped signal response from external signals. The charge amplitude was obtained from the
a typical channel in the preamp/shaping circuit. The typical peak location in the pulse height spectrum. The response was
peaking time for this particular chip is 2 , with the possibility linear to within 2% for a dynamic range (Fig. 8).
of external bias adjustment to extend the range from 1.5 to Again new generation of this chip is expected to have better
3 . This value is clearly not optimal for a detector based upon linearity and better dynamic range. For a 511 keV photon in-
LSO crystal, which has a scintillation decay time of 40 ns. teracting in LSO, coupled to an APD array (gain ),
The relatively large peaking time will introduce unnecessary the estimated dynamic range required is in order to
dead time, limiting the count rate performance, and may add fully utilize the charge signals from each event. This is how-
unnecessary noise into the system due to its relatively long ever above the dynamic range of the ASIC chip being evaluated
integration period. The new generation chips of this series and . We thus, had to implement a terminating resistor
similar compatible families are expected to have more appro- (10–20 ) to drain enough of the signal charge to be within
priate peaking time for LSO with good noise performance. the linear region of the input dynamic range of the chip.

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HABTE AND LEVIN: LOW NOISE MULTICHANNEL READOUT ELECTRONICS FOR HIGH SENSITIVITY PET SYSTEMS 767

of the ASIC. A second prototype APD array was obtained from

Advanced Photonix, Inc. (API) [18]. This APD array comprised
16 line elements, each with 0.3 8 area on a 0.5 mm pitch.
The array was operated at bias voltage of around 1700 V, with all
terminated channels connected via ac-coupling to the front-end
ASIC. This array has relatively lower dark current (4 nA) and
capacitance of 6 pf per channel. A terminating resistor of 10
was used for this APD array to drain the leakage current.

A. Energy Measurements
Fig. 9 shows the energy spectrum obtained for both APDs
with direct X-ray interactions. Energy resolution of 14.6% and
Fig. 7. Gain variation between channels. 13% of FWHM at 5.9 keV was achieved respectively using
RMD Inc and Advanced Photonix APD. Due to higher leakage
current per channel the energy resolution obtained using the
RMD Inc APD is slightly worse than that of Advanced Pho-
tonix. However, both results are comparable to that obtained
with a standard discrete charge sensitive preamp/shaper circuit
[7].

B. Gain Uniformity
The response of eight channels superimposed for the RMD
array is shown in Fig. 10. The plot shows that uniformity be-
tween channels is maintained to within 5% gain variation, even
when the APD array is connected to the ASIC.
Fig. 8. Linearity and dynamic range performance test.
C. Positioning Measurements
VI. INITIAL TESTS AND RESULTS WITH APD ARRAYS Fig. 11 shows a Fe-55 X-ray flood field position histogram
CONNECTED using the 16 channels Advanced Photonix APD array, which
So far we have discussed intrinsic performance of the has all 16 channels easily accessible to connect to the proto-
readout ASIC without connecting the APD array. These type readout board. Each direct X-ray interaction in the silicon
intrinsic measurements do not include the leakage current, APD pixels was positioned with a weighted mean position cal-
detector capacitance and overall APD detector dark noise that culation involving all digitized signals from each event. Using
significantly affect the overall performance of the system. To a weighted mean over all channels for positioning X-ray direct
study the basic performance of the chip connected to APD interactions is unnecessary but was done in this case to access
arrays, two newly developed prototype 1-D APD arrays were both the degree of APD array pixel noise and sensitivity varia-
used. The APDs had different configurations and characteris- tion in one plot.
tics. All measurements were performed using a 5.9 keV Fe-55 Good response uniformity is evident from this plot. The sharp
X-ray source. These measurements were used to study the peaks at the pixel locations in this weighted mean positioning
overall capabilities and limitations of this particular existing histogram indicate that the level of uncorrelated pixel noise is
ASIC for reading out the particular APD arrays we have in very low. This low pixel noise will be important for positioning
mind. We expect that in the final system, we will need to events with a scintillation crystal sheet since multiple elements
customize a similar chip to optimize performance for our are involved in positioning an event. Preliminary performance
particular application. measurements using a LSO scintillation crystal sheet coupled to
The first measurement was performed using a prototype APD the RMD array have been reported in another paper [7].
array obtained from RMD, Inc [17]. This array consists of 41
APD elements, each with 0.7 7 on a 1 mm pitch. At VII. FUTURE READOUT SYSTEM DESIGN AND STRATEGY
bias voltage around , it has a stable gain with
dark current of about 50 nA and capacitance of 0.7 . In The future readout electronics design will be a tradeoff be-
this particular APD array eight elements (channels) were used tween an optimized ASIC solution with respect to performance
that had easily accessible pins to connect to the prototype ASIC parameters such as noise, gain, power consumption, linearity
board. Each channel was connected to the front-end ASIC using and uniformity and its development cost. For a full readout
ac-coupling due to the relatively high leakage current of the system the primary design goal is to utilize as much as possible
APD. The detector input was also terminated with a 10–20 commercially available front-end electronics. A programmable
resistor to drain the leakage current and attenuate the signal so dedicated readout system (Fig. 12) will be developed based
that the resulting signal falls within the linear dynamic range on FPGA and DSP components in order to have a flexible

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768 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 51, NO. 3, JUNE 2004

Fig. 9. X-ray spectra for single ASIC channel. Left, using RMD, Inc. APD and Right, using advanced photonix APD.

Fig. 12. Depiction of future readout system design.

Fig. 10. Measured X-ray spectra in eight APD channels.

VIII. DISCUSSION AND CONCLUSION
Preliminary performance measurements indicate that the
front-end ASIC tested has excellent performance with stable
noise and gain uniformity. Initial results with APD arrays
connected to the ASIC also showed good signal uniformity
and relatively low noise. The fact that the ASIC works well
with the two different prototype APD arrays shows that these
commercially available ASIC circuits are versatile and may be
useful in the proposed design. More detailed evaluation of the
ASIC, and its capabilities to readout APD arrays, in particular
with regard to spatial, energy, and temporal resolutions using
a scintillation crystal are being performed. The design of a
complete readout system based on such front-end ASICs and
Fig. 11. Weighted mean X-ray position response over 16 channels from additional separate acquisition and processing units are under
advanced photonix APD array. investigation.

hardware system that can support future development of the ACKNOWLEDGMENT

front-end electronics.
The authors would like to thank R. Farrell at RMD, Inc.,
The design strategy will be based on a modular design to
Dr. M. Szawlowski at Advanced Photonics for useful discus-
simplify the design complexity and easily upgrade the system
sions and providing APD array samples, and Dr. B. Sundal at
based on the modifications are required. The front-end readout
IDE AS for useful discussions and support with regards to the
module will host several APD array readout ASICs, each con-
front-end ASIC.
nected to a fast digitizers. The digitized data will be forwarded to
an FPGA/DSP unit for efficient digital processing and storage of
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