OPERATIONAL AMPLIFIERS AND APPLICATIONS

Text Books:

1. Op-Amps & Linear ICs – Ramakant A. Gayakwad.

 Differential Amplifiers

• Basic building unit of an operational amplifier

• Emitter biased circuit
 Four Configurations of Differential Amplifiers

• Dual Input Balanced Output

• Dual Input Unbalanced Output
• Single Input Balanced Output
• Single Input Unbalanced Output
 Four Configurations of Differential Amplifiers

• Dual Input Balanced Output

• Dual Input Unbalanced Output
• Single Input Balanced Output
• Single Input Unbalanced Output
Dual Input Balanced Output Diff. Amp.
DC Analysis

Vc=Vcc-IcRc
Vce= Vc-Ve; Ve=-VBE
Vce=Vcc-IcRc+ VBE
Dual Input Balanced Output Diff. Amp.
Dual Input Balanced Output Diff. Amp.
Dual Input Balanced Output Diff. Amp.
AC Analysis

Features of r parameters
Dual Input Balanced Output Diff. Amp.
Dual Input Balanced Output Diff. Amp.
Vd=v1-v2
Ad=Vo/Vd=Rc/re’
Differential Input Resistance

Differential Input Resistance can be

enhanced using Darlington Pair or FET
instead of BJT
Output Resistance
Dual Input Balanced Output Diff. Amp.
 Dual Input Balanced Output Diff. Amp.
Ans: Ad=87; Ri1=5.06 Kohm; Ro1=2.2Kohm

Problem No.2-
Dual Input Balanced Output Diff. Amp.
 Inverting and Non-Inverting Inputs

Inverting & Non -inverting Inputs:

In differential amplifier the output voltage vO is given by
VO = Ad (v1 -v2)
When v2 = 0, VO = Ad v1
& when v1 = 0, VO = - Ad v2
Therefore the input voltage v1 is called the non inventing input
because a positive voltage v1 acting alone produces a positive
output voltage VO. Similarly, the positive voltage v2 acting alone
produces a negative output voltage hence v2 is called inverting
input. Consequently base B1 is called non-inverting input
terminal and base B2 is called inverting input terminal.
 Common Mode Rejection Ratio(CMRR)
The ability of a differential amplifier to reject a common
mode signal is expressed by its common mode rejection ratio
(CMRR). It is the ratio of differential gain Ad to the common
mode gain AC.

It discriminates against common mode input signals. In other words, it refuses to

amplify the common mode signals. It is a type of NOISE REJECTION.
The practical effectiveness of rejecting the common signal depends on the degree of
matching between the two CE stages forming the differential amplifier.
Differential Amplifier with Swamping Resistance
By using external resistors R'E in series with each emitter, the dependence of voltage
gain on variations of r'e can be reduced. It also increases the linearity range of the
differential amplifier.
Improving Performance of Differential Amplifier
1. Constant Current Bias
2. Current Mirror

CONSTANT CURRENT BIAS

For Stable operating point, IE shall be stable.

IE depends on Supply voltage, RE and β( depends on

temperature)

IE will be stabilized if RE is made large but at the same time

it will reduce IE or power supply voltage has to be made
large.

The solution is Constant Current Bias circuit.

Constant Current Bias

To improve THERMAL STABILITY

 Modified Constant Current Bias
I2 VB3=2VD-VEE
VE3 =VB3-VBE3 =2VD-VEE -VBE3
IE3= (VE3 –(-VEE))/RE
IE3 =(2VD-VBE3)/ RE
IE3 =VD/ RE
I2 =(0-VB3)/ R2
I2 = (VEE-2VD)/ R2
Current Mirror

VBE4 =VB4 - VE4

= -R2I2 –(-VEE)
I2 = (VEE-VBE3)/ R2
Modified Constant Current Bias
Modified Constant Current Bias
Modified Constant Current Bias
 Level Translator Circuit
Because of the direct coupling
1. The dc level at the emitter rises from stage to stage.
2. There is presence of dc voltage at the collector output.
This increase in dc level tends to shift the operating point of the succeeding stages and
therefore limits the output voltage swing and may even distort the output signal.
To shift the output dc level to zero, level translator circuits are used.
An emitter follower with voltage divider is the simplest form of level translator

Collector of
Previous
stage
Block diagram of op amp
Circuit diagram of Op-amp
Def: The “Integrated Circuit “ or IC is a miniature,
low cost electronic circuit consisting of active and
passive components that are irreparably joined
together on a single crystal chip of silicon.

In 1958 Jack Kilby of Texas Instruments invented first IC

 Classification

 Digital ICs
 Linear ICs
Integrated circuits

Monolithic circuits Thick Hybrid circuits

&Thin film

Bipolar Uni polar

Pn junction Dielectric JFET

MOSFET
isolation isolation

Classification of ICs
 Chip size and Complexity
 Invention of Transistor (Ge) - 1947

 Development of Silicon - 1955-1959

 Silicon Planar Technology - 1959

 First ICs, SSI (3- 30gates/chip) - 1960

 MSI ( 30-300 gates/chip) - 1965-1970

 LSI ( 300-3000 gates/chip) -1970-1975

 VLSI (More than 3k gates/chip) - 1975

 ULSI (more than one million active devices are integrated on single
chip)
 SSI MSI LSI VLSI ULSI

< 100 active 100-1000 1000- >100000 Over 1

devices active 100000 active million
devices active devices active
devices devices
Integrated BJT’s and MOSFETS 8bit, 16bit Pentium
resistors, Enhanced Microproces Microproces
diodes & MOSFETS sors sors
BJT’s
IC Package types
 Metal can Package
 Dual-in-line
 Flat Pack
Metal can Packages
 The metal sealing plane is at the bottom
over which the chip is bounded
 It is also called transistor pack
Dual-in-line Package
 The chip is mounted inside a plastic or
ceramic case
 The 8 pin Dip is called MiniDIP and also
available with 12, 14, 16, 20pins
Flat pack
 The chip is enclosed in a rectangular
ceramic case
 Selection of IC Package

Type Criteria

Metal can 1. Heat dissipation is important

package 2. For high power applications like
power amplifiers, voltage regulators
etc.
DIP 1. For experimental or bread boarding
purposes as easy to mount
2. If bending or soldering of the leads is
not required
3. Suitable for printed circuit boards as
lead spacing is more
Flat pack 1. More reliability is required
2. Light in weight
3. Suited for airborne applications
 Temperature Ranges

1. Military temperature range : -55o C to +125o C (-55o C to +85o C)

2. Industrial temperature range : -20o C to +85o C (-40o C to +85o C )

3. Commercial temperature range: 0o C to +70o C (0o C to +75o C )

Manufacturer’s Designation for Linear ICs

 Fairchild - µA, µAF

 National Semiconductor - LM,LH,LF,TBA

 Motorola - MC,MFC

 RCA - CA,CD

 Texas Instruments - SN

 Signetics - N/S,NE/SE

 Burr- Brown - BB
 Operational Amplifier

An “Operational amplifier” is a direct coupled high-gain

amplifier usually consisting of one or more differential
amplifiers and usually followed by a level translator and
output stage.

The operational amplifier is a versatile device that can be

used to amplify dc as well as ac input signals and was
originally designed for computing such mathematical
functions as addition, subtraction, multiplication and
integration. Thus got name OPERATIONAL.
Op Amp
Positive power supply
(Positive rail)

Non-inverting
Input terminal
Output terminal

Inverting input
terminal

Negative power supply

(Negative rail)
The Op-Amp Chip

741 Op Amp or LM351 Op Amp

 Op-amp have 5 basic terminals(ie 2 i/p’s
1 o/p and 2 power supply terminals

 The output goes positive when the non-
inverting input (+) goes more positive than
the inverting (-) input, and vice versa.
Single-Ended Input
+
V o
• + terminal : Source
• – terminal : Ground
~ Vi • 0o phase change


+
V
o • + terminal : Ground
• – terminal : Source
 • 180o phase change

~
V i
 Basic Information of an Op-amp
contd…

Power supply connection:

The power supply voltage may range from about + 5V to

+ 22V.

The common terminal of the V+ and V- sources is

connected to a reference point or ground.
 Differential Amplifier

V0 =Ad (V1 – V2 )

Ad =20 log10 (Ad ) in dB

Vc = (V1  V2 )
2
CMRR= ρ = | Ad |
Ac
Characteristics and performance parameters of
Op-amp

 Input offset Voltage

 Input offset current

 Input bias current

 Differential input resistance

 Input capacitance

 Open loop voltage gain

 CMRR

 Output voltage swing

 Characteristics and performance parameters of Op-
amp

 Output resistance

 Offset adjustment range

 Input Voltage range

 Power supply rejection ratio

 Power consumption

 Slew rate

 Gain – Bandwidth product

 Output offset voltage

 Supply current
 1. Input Offset Voltage

The differential voltage that must be applied between the

two input terminals of an op-amp, to make the output
voltage zero.

It is denoted as Vio

For op-amp 741C the input offset voltage is 6mV

1. Input Offset Voltage
 2. Input offset current

The algebraic difference between the currents flowing into

the two input terminals of the op-amp

It is denoted as Iio = | Ib1 – Ib2|

For op-amp 741C the input offset current is 200nA

 3. Input bias current
The average value of the two currents flowing into the op-
amp input terminals

I b1  I b 2
It is expressed mathematically as Ib 
2

For 741C the maximum value of Ib is 500nA

 4. Differential Input Resistance

It is the equivalent resistance measured at either the

inverting or non-inverting input terminal with the other
input terminal grounded

It is denoted as Ri

For 741C it is of the order of 2MΩ

 5. Input capacitance

It is the equivalent capacitance measured at either the

inverting or non- inverting input terminal with the other
input terminal grounded.

It is denoted as Ci

For 741C it is of the 1-4 pF

 6. Open loop Voltage gain

It is the ratio of output voltage to the differential input

voltage, when op-amp is in open loop configuration,
without any feedback. It is also called as large signal

voltage gain.

It is denoted as AOL
AOL=Vo / Vd

For 741C it is typically 200,000

 7. CMRR

It is the ratio of differential voltage gain Ad to common

mode voltage gain Ac

CMRR = Ad / Ac
Ad is open loop voltage gain AOL and Ac = VOCM / Vcm

For op-amp 741C CMRR is 90 dB

 8. Output Voltage swing

The op-amp output voltage gets saturated at +Vcc and –VEE

and it cannot produce output voltage more than +Vcc and –VEE.
Practically voltages +Vsat and –Vsat are slightly less than +Vcc
and –VEE .
For op-amp 741C the saturation voltages
are + 13V for supply voltages + 15V +Vsat
AOL = ∞

-Vd +Vd
0
+Vsat ≈ +Vcc
-Vsat
 9. Output Resistance

It is the equivalent resistance measured between the output

terminal of the op-amp and ground

It is denoted as Ro

For op-amp 741 it is 75Ω

 10. Offset voltage adjustment range

The range for which input offset voltage can be adjusted

using the potentiometer so as to reduce output to zero

For op-amp 741C it is + 15mV

 11. Input Voltage range

It is the range of common mode voltages which can be

applied for which op-amp functions properly and given
offset specifications apply for the op-amp

For + 15V supply voltages, the input voltage range is + 13V

 12. Power Supply Rejection Ratio

PSRR is defined as the ratio of the change in input offset

voltage due to the change in supply voltage producing it,
keeping the other power supply voltage constant. It is
also called as power supply sensitivity (PSV), Supply
Voltage Rejection Ratio(SVRR)
PSRR= (Δvio / ΔVcc)|constant VEE PSRR= (Δvio / ΔVEE)|constant Vcc
SVRR (dB)=20log(ΔV/ Δvio)
The typical value of PSRR for op-amp 741 is 30µV/V
 13. Power Consumption

It is the amount of quiescent power to be consumed by op-

amp with zero input voltage, for its proper functioning

It is denoted as Pc

For 741C it is 85mW

 14. Slew rate

It is defined as the maximum rate of change of output

voltage with time. The slew rate is specified in V/µsec

Slew rate = S = dVo / dt |max

It is specified by the op-amp in unity gain condition.

The slew rate is caused due to limited charging rate of the

compensation capacitor and current limiting and saturation of the
internal stages of op-amp, when a high frequency large amplitude
signal is applied.
 Slew rate

It is given by dVc /dt = I/C

For large charging rate, the capacitor should be small or

the current should be large.

S = Imax / C

For 741 IC the charging current is 15 µA and

the internal capacitor is 30 pF. S= 0.5V/ µsec
LARGE SIGNAL Slew rate
PHENOMENON
 Slew rate equation
Vs = Vm sinωt How fast output changes with change
in the input
Vo = Vm sinωt 0.5 v/us Vs 1 V/uS
LF 351 13V/us, LM318 70V/us
dVo = Vm ω cosωt For distortion free output, the maximum
dt allowable input frequency fm can be
dVo obtained as
S =slew rate =
dt max
S
S = Vm ω = 2 π f Vm ; Vm is speak amp. of o/p
fm 
2 V m

S = (2 π f Vm )/106 V / µsec

This is also called full power bandwidth of the op-amp

 15. Gain – Bandwidth product

It is the bandwidth of op-amp when voltage gain is unity (1).

It is denoted as GB.

The GB is also called unity gain bandwidth (UGB) or

closed loop bandwidth

It is about 1MHz for op-amp 741C

SMALL SIGNAL PHENOMENA

UGB is always a constant
 18. Output offset voltage ( Voo )

The output offset voltage is the dc voltage present at the

output terminals when both the input terminals are
grounded.

It is denoted as Voo
 19. Supply current

It is drawn by the op-amp from the power supply

For op-amp 741C it is 2.8mA

 Ideal Op-amp
1. An ideal op-amp draws no current at both the input terminals I.e. I1 = I2 =
0. Thus its input impedance is infinite. Any source can drive it and there
is no loading on the driver stage

2. The gain of an ideal op-amp is infinite, hence the differential input Vd =

V1 – V2 is essentially zero for the finite output voltage Vo

3. The output voltage Vo is independent of the current drawn from the

output terminals. Thus its output impedance is zero and hence output
can drive an infinite number of other circuits

4. CMRR infinite

5. Slew rate infinite

6. Zero output voltage when Vid=0

 The Ideal Operational Amplifier

 Open loop voltage gain AOL =∞

 Input Impedance Ri =∞

 Output Impedance Ro =0

 Bandwidth BW =∞

 Zero offset (Vo = 0 when V1 = V2 = 0) Vios =0

 CMRR ρ =∞

 Slew rate S =∞

 No effect of temperature

 Power supply rejection ratio PSRR = 0

 Op-amp Characteristics
 DC Characteristics
Input bias current

Input offset current

Input offset voltage

Thermal drift

 AC Characteristics
Slew rate

Frequency response
 Factors affecting parameters of Op-amp

Supply Frequency Temperature

Voltage
1. Voltage gain 1. Input offset current
1. Voltage gain
2. Input resistance 2. Input offset voltage
2. Output Voltage
swing 3. Output resistance 3. Input bias current

3. Input voltage range 4. CMRR 4. Power consumption

4. Power consumption 5. Gain-Bandwidth

product
5. Input offset current
6. Slew rate
7. Input resistance
 Parameter consideration for various
applications
For A.C. applications For D.C. applications
Input resistance Input resistance
Output resistance Output resistance
Open loop voltage gain Open loop voltage gain
Slew rate Input offset voltage
Output voltage swing Input offset current
Gain- bandwidth product
 General purpose op-amp 741

The IC 741 is high performance monolithic op-amp IC. It is

available in 8pin configuration. It can operate over a
temperature of -550 C to 1250 C.

Features:
i) No frequency compensation required
ii) Short circuit protection provided
iii) Offset Voltage null capability
iv) Large common mode and differential voltage range
v) No latch up
Internal schematic of 741 op-amp
The 8pin DIP package of IC 741