Texas Instruments BQ27441DRZR G1A - C473397
Texas Instruments BQ27441DRZR G1A - C473397
Texas Instruments BQ27441DRZR G1A - C473397
bq27441-G1
SLUSBH1C – NOVEMBER 2013 – REVISED DECEMBER 2014
4 Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq27441-G1
SLUSBH1C – NOVEMBER 2013 – REVISED DECEMBER 2014 www.ti.com
Table of Contents
1 Features .................................................................. 1 8.12 SHUTDOWN and WAKE-UP Timing ...................... 9
2 Applications ........................................................... 1 8.13 Typical Characteristics ............................................ 9
3 Description ............................................................. 1 9 Detailed Description ............................................ 10
4 Simplified Schematic............................................. 1 9.1 Overview ................................................................. 10
9.2 Functional Block Diagram ....................................... 10
5 Revision History..................................................... 2
9.3 Feature Description................................................. 10
6 Device Comparison Table..................................... 3
9.4 Device Functional Modes........................................ 11
7 Pin Configuration and Functions ......................... 4
9.5 Programming........................................................... 11
8 Specifications......................................................... 5
10 Application and Implementation........................ 15
8.1 Absolute Maximum Ratings ...................................... 5
10.1 Application Information.......................................... 15
8.2 ESD Ratings.............................................................. 5
10.2 Typical Applications .............................................. 15
8.3 Recommended Operating Conditions...................... 5
11 Power Supply Recommendation ....................... 18
8.4 Thermal Information .................................................. 5
11.1 Power Supply Decoupling ..................................... 18
8.5 Supply Current ......................................................... 6
8.6 Digital Input and Output DC Characteristics ............ 6 12 Layout................................................................... 18
12.1 Layout Guidelines ................................................. 18
8.7 LDO Regulator, Wake-up, and Auto-Shutdown DC
Characteristics ........................................................... 7 12.2 Layout Example .................................................... 19
8.8 LDO Regulator, Wake-up, and Auto-shutdown AC 13 Device and Documentation Support ................. 20
Characteristics ........................................................... 7 13.1 Documentation Support ........................................ 20
8.9 ADC (Temperature and Cell Measurement) 13.2 Trademarks ........................................................... 20
Characteristics ........................................................... 7 13.3 Electrostatic Discharge Caution ............................ 20
8.10 Integrating ADC (Coulomb Counter) Characteristics 13.4 Glossary ................................................................ 20
................................................................................... 7
8.11 I2C-Compatible Interface Communication Timing
14 Mechanical, Packaging, and Orderable
Characteristics ........................................................... 8 Information ........................................................... 20
5 Revision History
Changes from Revision B (August 2014) to Revision C Page
• Added Handling Ratings table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section ............................................................... 1
• Changed LiMnO4 to LiCoO2.................................................................................................................................................... 4
• Updated BAT pin description ................................................................................................................................................. 4
• Updated BIN pin description .................................................................................................................................................. 4
• Updated GPOUT pin description ........................................................................................................................................... 4
• Updated SRN and SRP pin descriptions................................................................................................................................ 4
• Changed the Ilkg parameters .................................................................................................................................................. 6
• Changed the device status from Product Preview to Production Data .................................................................................. 1
(1) See the CHEM_ID subcommand to confirm the battery chemistry type.
(2) See the DM_CODE subcommand to confirm the Data Memory code.
(3) See the FW_VERSION subcommand to confirm the firmware version.
GPOUT
BIN
Pin Functions
PIN
TYPE (1) DESCRIPTION
NAME NUMBER
LDO regulator input and battery voltage measurement input. Kelvin sense connect to positive
BAT 6 PI, AI battery terminal (PACKP). Connect a capacitor (1 µF) between BAT and VSS. Place the capacitor
close to the gauge.
Battery insertion detection input. If OpConfig [BI_PU_EN] = 1 (default), a logic low on the pin is
detected as battery insertion. For a removable pack, the BIN pin can be connected to VSS
through a pulldown resistor on the pack, typically the 10-kΩ thermistor; the system board should
use a 1.8-MΩ pullup resistor to VDD to ensure the BIN pin is high when a battery is removed. If
the battery is embedded in the system, it is recommended to leave [BI_PU_EN] = 1 and use a
BIN 10 DI
10-kΩ pulldown resistor from BIN to VSS. If [BI_PU_EN] = 0, then the host must inform the gauge
of battery insertion and removal with the BAT_INSERT and BAT_REMOVE subcommands. A 10-
kΩ pulldown resistor should be placed between BIN and VSS, even if this pin is unused.
NOTE: The BIN pin must not be shorted directly to VCC or VSS and any pullup resistor on the BIN
pin must be connected only to VDD and not an external voltage rail.
This open-drain output can be configured to indicate BAT_LOW when the OpConfig
[BATLOWEN] bit is set. By default [BATLOWEN] is cleared and this pin performs an interrupt
function (SOC_INT) by pulsing for specific events, such as a change in state-of-charge. Signal
GPOUT 12 DO polarity for these functions is controlled by the [GPIOPOL] configuration bit. This pin should not
be left floating, even if unused; therefore, a 10-kΩ pullup resistor is recommended. If the device
is in shutdown mode, then toggling GPOUT will make the gauge exit shutdown. Therefore, it is
recommended to connect GPOUT to a GPIO of the host MCU.
NC 4, 9, 11 — No internal connection. May be left floating or tied to VSS.
SCL 2 DIO Slave I2C serial bus for communication with system (Master). Open-drain pins. Use with external
10-kΩ pullup resistors (typical) for each pin. If the external pullup resistors will be disconnected
SDA 1 DIO from these pins during normal operation, recommend using external 1-MΩ pulldown resistors to
VSS at each pin to avoid floating inputs.
SRN 7 AI Coulomb counter differential inputs expecting an external 10 mΩ, 1% sense resistor in the high-
side current path. Kelvin sense connect SRP to the positive battery terminal (PACKP) side of the
external sense resistor. Kelvin sense connect SRN to the other side of the external sense
SRP 8 AI resistor, the positive connection to the system (VSYS). See the Simplified Schematic. No
calibration is required. The fuel gauge is pre-calibrated for a standard 10 mΩ, 1% sense resistor.
1.8-V regulator output. Decouple with 0.47-μF ceramic capacitor to VSS. This pin is not intended
VDD 5 PO
to provide power for other devices in the system.
VSS 3 PI Ground pin
8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VBAT BAT pin input voltage range –0.3 6 V
SRP and SRN pins input voltage range –0.3 VBAT + 0.3 V
VSR
Differential voltage across SRP and SRN. ABS(SRP – SRN) 2 V
VDD VDD pin supply voltage range (LDO output) –0.3 2 V
VIOD Open-drain IO pins (SDA, SCL) –0.3 6 V
VIOPP Push-pull IO pins (BIN) –0.3 VDD + 0.3 V
TA Operating free-air temperature range –40 85 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
SCL
SDA
td(STA) tf tsu(STOP)
tr
th(DAT) tsu(DAT)
VDD
*
GPOUT
0.14 10
0.12
5
0.1
Temperature Accuracy Error(%)
Voltage Accuracy Error (%)
0.08
-5
0.06
-10
0.04
0.02 -15
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
Temperature (°C) Temperature (°C)
-0.1
-0.2
Current Accuracy Error (%)
-0.3
-0.4
-0.5
-0.6
-40 -20 0 20 40 60 80 100
Temperature (°C)
9 Detailed Description
9.1 Overview
The fuel gauge accurately predicts the battery capacity and other operational characteristics of a single Li-based
rechargeable cell. It can be interrogated by a system processor to provide cell information, such as state-of-
charge (SoC).
NOTE
The following formatting conventions are used in this document:
Commands: italics with parentheses() and no breaking spaces, for example, Control().
Data Flash: italics, bold, and breaking spaces, for example, Design Capacity.
Register bits and flags: italics with brackets [ ], for example, [TDA]
Data flash bits: italics, bold, and brackets [ ], for example, [LED1]
Modes and states: ALL CAPITALS, for example, UNSEALED mode.
9.5 Programming
9.5.1 Standard Data Commands
The fuel gauge uses a series of 2-byte standard commands to enable system reading and writing of battery
information. Each standard command has an associated command-code pair, as indicated in Table 1. Because
each command consists of two bytes of data, two consecutive I2C transmissions must be executed both to
initiate the command function, and to read or write the corresponding two bytes of data. Additional details are
found in the bq27441-G1 Technical Reference Manual (SLUUAC9).
(1) SEALED and UNSEALED states are entered via commands to Control() 0x00 and 0x01.
(2) In SEALED mode, data cannot be accessed through commands 0x3E and 0x3F.
9.5.4 Communications
The quick read returns data at the address indicated by the address pointer. The address pointer, a register
internal to the I2C communication engine, increments whenever data is acknowledged by the fuel gauge or the
I2C master. “Quick writes” function in the same manner and are a convenient means of sending multiple bytes to
consecutive command locations (such as two-byte commands that require two bytes of data).
The following command sequences are not supported:
Attempt to write a read-only address (NACK after data sent by master):
S ADDR [6:0] 0 A CMD [7:0] A Sr ADDR [6:0] 1 A DATA [7:0] A DATA [7:0] N P 66ms
Waiting time inserted between two 1-byte write packets for a subcommand and reading results
(required for 100 kHz < fSCL £ 400 kHz)
S ADDR [6:0] 0 A CMD [7:0] A Sr ADDR [6:0] 1 A DATA [7:0] A DATA [7:0] N P 66ms
Waiting time inserted between incremental 2-byte write packet for a subcommand and reading results
(acceptable for fSCL £ 100 kHz)
S ADDR [6:0] 0 A CMD [7:0] A Sr ADDR [6:0] 1 A DATA [7:0] A DATA [7:0] A
DATA [7:0] A DATA [7:0] N P 66ms
NOTE
Information in the following application section is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
VPU VPU
R2 R3 R4 R5
U1
5.1 k 5.1 k 5.1 k 1.8 M
1 12
SDA SDA GPOUT GPOUT
2 11
SCL SCL NC
3 10
VSS BIN BIN
4 9
NC NC
PGND 5 8
VDD SRP
PWPD
C1 6 7
BAT SRN
0.47 µF
13
PGND PGND
R1 System Load/Charger
3
PACKP 3 VSYS
2 C2 0.010
BIN 2 BIN
1.0uF
1
Note: 1% Tol.
PACKN 1
J5
PGND
0.14 10
0.12
5
0.1
0.08
-5
0.06
-10
0.04
0.02 -15
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
Temperature (°C) Temperature (°C)
-0.1
-0.2
Current Accuracy Error (%)
-0.3
-0.4
-0.5
-0.6
-40 -20 0 20 40 60 80 100
Temperature (°C)
12 Layout
RBIN
RSCL RSDA
GPOUT
SDA If battery pack thermistor will not
SDA GPOUT
be connected to BIN pin, a 10-k
There is an internal pull down on pulldown resistor should be
GPOUT connected to the BIN pin.
SCL
SCL NC The BIN pin should not be shorted
directly to VDD or VSS.
VSS BIN
NC NC
VDD SRP
CVDD
VSYS
RSENSE Battery Pack
PACK+
Li-Ion
Use copper pours for TS Cell
battery power path to +
minimize IR losses Kelvin connect SRP and RTHERM
SRN connections right at Protection
Rsense terminals IC
PACK-
NFET NFET
13.2 Trademarks
Impedance Track is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.3 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
www.ti.com 19-Dec-2014
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
BQ27441DRZR-G1A ACTIVE SON DRZ 12 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BQ27
& no Sb/Br) 441A
BQ27441DRZR-G1B ACTIVE SON DRZ 12 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BQ27
& no Sb/Br) 441B
BQ27441DRZT-G1A ACTIVE SON DRZ 12 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BQ27
& no Sb/Br) 441A
BQ27441DRZT-G1B ACTIVE SON DRZ 12 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 BQ27
& no Sb/Br) 441B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 19-Dec-2014
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Feb-2015
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Feb-2015
Pack Materials-Page 2
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