Microprocessor (22415)

1. A empt any FIVE of the following:

a) State the func ons of the following pins of 8086 Microprocessor :

1. ALE (Address Latch Enable):

 Pin: 25
 Func on: This pin sends a signal that helps the microprocessor latch (store temporarily) the
address. A pulse on this pin means a valid address is present on the address/data lines.

2. M/IO (Memory/Input-Output):
 Pin: 28
 Func on: This pin indicates whether the microprocessor is performing a memory opera on
or an I/O opera on. When the signal is high, it's an I/O opera on; when low, it's a memory
opera on.

3. BHE (Bus High Enable):

 Pin: 34
 Func on: This pin indicates if data is being transferred on the higher half (D8-D15) of the
data bus. It's ac ve low during the first clock cycle of a data transfer.

4. MN/MX (Minimum/Maximum):
 Func on: This pin determines the mode of the microprocessor:
 High (1): The 8086 operates in minimum mode, suitable for small, single-processor systems.
 Low (0): The 8086 operates in maximum mode, suitable for larger, mul processor systems.

5. Test:
 Func on: This pin is used with the wait instruc on. The microprocessor stops and waits if
this pin is high. If it's low, the processor con nues execu on.

6. Ready:
 Func on: This pin signals if a slower I/O device or memory is ready to communicate. When
this signal is high, the device is ready for data transfer.

7. INTR (Interrupt Request):

 Func on: This pin allows external devices to interrupt the microprocessor. It's checked at the
end of each instruc on. If an interrupt is requested, the processor will handle it.

b) Define procedure and write its syntax.

A procedure is group of instruc ons that usually performs one task. It is a reusable sec on of a
so ware program which is stored in memory once but can be used as o en as necessary.

Syntax:
 Procedure can be defined as
Procedure_name PROC
----
------
Procedure_name
ENDP

c) State the func on of editor and assembler.

Editor: The editor is a program which allows the user to enter and modify as well as store a
group of instruc ons or text under a file name.

Assembler: The assembler is used to convert assembly language wri en by a user or a program
into a machine recognizable format.

(OR)

List Assembly Language Programming tools.

1. Editors
2. Assembler
3. Linker
4. Debugger

d) Use of DAA, AAA, AAS, AAM instruc ons.

1. DAA: Used a er adding two BCD numbers to correct the result.

2. AAM: Used a er mul plying two single-digit BCD numbers.

3. AAA: Used a er adding two unpacked BCD numbers to correct the result.

4. AAS: Usage: Used a er subtrac ng one unpacked BCD number from another to correct the
result.

e) Draw flowchart for mul plica on of two 16 bit numbers.

write an ALP for 8 bit addi on

sec on .data

num1 db 5

num2 db 3

result db 0

sec on .text

global _start

_start:

mov al, [num1]

add al, [num2]

mov [result], al

mov eax, 1

int 0x80

sec on .bss

write an ALP for 16 bit addi on

sec on .data

num1 dw 1234h

num2 dw 5678h

result dw 0

sec on .text

global _start

_start:

mov ax, [num1]

add ax, [num2]

mov [result], ax

mov eax, 1

int 0x80

sec on .bss

write an ALP for 8 bit mul plica on

sec on .data

num1 db 5

num2 db 3

result dw 0

sec on .text

global _start

_start:

mov al, [num1]

mov bl, [num2]

mul bl
 mov [result], ax

mov eax, 1

int 0x80

sec on .bss

write an ALP for 16 bit mul plica on

sec on .data

num1 dw 1234h

num2 dw 5678h

result dw 0

sec on .text

global _start

_start:

mov ax, [num1]

mov bx, [num2]

mul bx

mov [result], ax

mov [result+2], dx

mov eax, 1

int 0x80

sec on .bss

write an ALP for 16 bit Subtrac on

sec on .data

num1 dw 5000h
 num2 dw 2000h

result dw 0

sec on .text

global _start

_start:

mov ax, [num1]

sub ax, [num2]

mov [result], ax

mov eax, 1

int 0x80

sec on .bss

write an ALP for 8 bit Subtrac on

sec on .data

num1 db 50

num2 db 20

result db 0

sec on .text

global _start

_start:

mov al, [num1]

sub al, [num2]

mov [result], al

mov eax, 1
 int 0x80

sec on .bss

f) State any two difference between TEST and AND instruc ons.

TEST AND
This instruc on logically ANDs the source This instruc on logically ANDs the source
with the des na on but the result is not with the des na on and stores the result in
stored anywhere. des na on.
EX: TEST BL, CL EX: AND BL , CL
The result is not saved anywhere. The result is saved in BL register

g) Bit manipula on instruc ons CSTC, CMC, CLC, CLD, STP, CLI, STI

1. CSTC (Clear Single Bit in the Carry Flag): This instruc on clears a specific bit in the Carry Flag
register.
2. CMC (Complement Carry Flag): It toggles the value of the Carry Flag, changing it from 0 to 1
or from 1 to 0.
3. CLC (Clear Carry Flag): This instruc on clears the Carry Flag, se ng it to 0.
4. CLD (Clear Direc on Flag): It clears the Direc on Flag, which determines the direc on in
which string opera ons move through memory.
5. STP (Set Priority Flag): This instruc on sets the Priority Flag, which affects how interrupts are
handled in the processor.
6. CLI (Clear Interrupt Flag): It clears the Interrupt Flag, disabling maskable interrupts.
7. STI (Set Interrupt Flag): This instruc on sets the Interrupt Flag, enabling maskable interrupts.

h) Define MACRO with its syntax.

A MACRO is group of small instruc ons that usually performs one task. It is a reusable sec on of
a so ware program. A macro can be defined anywhere in a program using direc ve MACRO
&ENDM.

Syntax:
MACRO_name MACRO [ARGUMENT 1,……….ARGUMENT N]
-----
ENDM

2. A empt any THREE of the following:

a) Draw flag register of 8086 and explain any four flags.

Flag Register of 8086

 Condi onal /Status Flags

C-Carry Flag: It is set when carry/borrow is generated out of MSB of result. (i.e D 7 bit for 8-bit
opera on, D15 bit for a 16 bit opera on).

P-Parity Flag: This flag is set to 1 if the lower byte of the result contains even number of 1's
otherwise it is reset.

AC-Auxiliary Carry Flag: This is set if a carry is generated out of the lower nibble, (i.e. From D3 to
D4 bit)to the higher nibble

Z-Zero Flag: This flag is set if the result is zero a er performing ALU opera ons. Otherwise it is
reset.

S-Sign Flag: This flag is set if the MSB of the result is equal to 1 a er performing ALU opera on,
otherwise it is reset.

O-Overflow Flag: This flag is set if an overflow occurs, i.e. if the result of a signed opera on is
large enough to be accommodated in des na on register.

Control Flags

T-Trap Flag: If this flag is set the processor enters the single step execu on mode.

I-Interrupt Flag: it is used to mask(disable) or unmask(enable)the INTR interrupt. When this flag
is set, 8086 recognizes interrupt INTR. When it is reset INTR is masked.

D-Direc on Flag: It selects either increment or decrement mode for DI &/or SI register during
string instruc ons.

b) Explain logical instruc ons of 8086.(Any Four)

Logical instruc ons.

1) AND- Logical AND

Syntax : AND des na on, source
Opera on
Des na on  des na on AND source
Flags Affected: CF=0,OF=0,PF,SF,ZF

This instruc on AND's each bit in a source byte or word with the same number bit in a
des na on byte or word. The result is put in des na on.

Example: AND AX, BX

 AND AL,BL
 AL 1111 1100
 BL 0000 0011
---------------------------
 AL  0000 0000 (AND AL,BL)

2) OR - Logical OR
Syntax: OR des na on, source
Opera on
Des na on  OR source
Flags Affected: CF=0,OF=0,PF,SF,ZF

This instruc on OR's each bit in a source byte or word with the corresponding bit in a des na on
byte or word. The result is put in a specified des na on.

Example:
 OR AL,BL
 AL 1111 1100
 BL 0000 0011
-----------------------
 AL 1111 1111

3) NOT-Logical Invert
Syntax: NOT des na on
Opera on: Des na on  NOT des na on
Flags Affected: None

The NOT instruc on inverts each bit of the byte or words at the specified des na on.

Example
NOT BL
BL = 0000 0011
NOT BL gives 1111 1100

4) XOR-Logical Exclusive OR
Syntax: XOR des na on, source
Opera on: Des na on  Des na on XOR source
Flags Affected :CF=0,OF=0,PF,SF,ZF
 This instruc on exclusive, OR's each bit in a source byte or word with the same number bit in a
des na on byte or word.

Example(op onal)
XOR AL,BL
 AL 1111 1100
 BL 0000 0011
-----------------
 AL←1111 1111 (XOR AL,BL)

c) Describe following assembler direc ves: (i) DB (i) EQU (ii) Offset (iv) Assume

1) DB: Define Byte

The DB direc ve is used to declare a BYTE -2-BYTE variable – A BYTE is made up of 8 bits.
Declara on examples
Byte1 DB 10h.

2) EQU: Equate to
The EQU direc ve is used to declare the micro symbols to which some constant value is
assigned.
Micro assembler will replace every occurrence of the symbol in a program by its value.
Syntax: Symbol name EQU expression
Example: CORRECTION_FACTOR EQU 100

3) ASSUME: Assume direc ve is used to tell Assembler the name of the logical segment it
should use for the specified segment.
Example: Assume CS: MAP_CODE, DS: MAP_DATA

4) OFFSET
OFFSET is an operator, which tells the assembler to determine the offset or displacement of a
named data item (variable), a procedure from the start of the segment, which contains it.
Example
MOV BX;
OFFSET PRICES;
It will determine the offset of the variable PRICES from the start of the segment in which
PRICES is defined and will load this value into BX.

d) Describe re-entrant and recursive procedure with suitable diagram.

1)Recursive procedure:
A recursive procedure is procedure which calls itself. This results in the procedure call to be
generated from within the procedures again and again.
The recursive procedures keep on execu ng un l the termina on condi on is reached.
 The recursive procedures are very effec ve to use and to implement but they take a large
amount of stack space and the linking of the procedure within the procedure takes more me as
well as puts extra load on the processor.

2) Re-entrant procedures:
In some situa on it may happen that Procedure 1 is called from main program Procrdure2 is
called from procedure1And procedure1 is again called from procdure2. In this situa on program
execu on flow re enters in the procedure1. These types of procedures are called re-entrant
procedures.
A procedure is said to be re-entrant, if it can be interrupted, used and re-entered without losing
or wri ng over anything.

e) Compare Procedure and Macros. (4 points).

Procedure Macro
Procedures are used for large group of Procedures are used for small group of
instruc ons to be repeated instruc ons to be repeated.
Object code is generated only once in Object code is generated every me the
memory. macro is called.
CALL & RET instruc ons are used to call Macro can be called just by wri ng its name.
procedure and return from procedure.
Length of the object file is less Object file becomes lengthy.
3. A empt any THREE of the following:

a) Describe memory segmenta on in 8086 and list its advantages.

Segmenta on is the process in which the main memory of the computer is logically divided into
different segments and each segment has its own base address. It is basically used to enhance
the speed of execu on of the computer system, so that the processor is able to fetch and
execute the data from the memory easily and fast.

Need for Segmenta on –

The Bus Interface Unit (BIU) contains four 16 bit special purpose registers (men oned below)
called as Segment Registers.
• Code segment register (CS): is used for addressing memory loca on in the code segment of the
memory, where the executable program is stored.
• Data segment register (DS): points to the data segment of the memory where the data is
stored.
• Extra Segment Register (ES): also refers to a segment in the memory which is another data
segment in the memory.
• Stack Segment Register (SS): is used for addressing stack segment of the memory. The stack
segment is that segment of memory which is used to store stack data.

The number of address lines in 8086 is 20, 8086 BIU will send 20bit address, so as to access one
of the 1MB memory loca ons. The four segment registers actually contain the upper 16 bits of
the star ng addresses of the four memory segments of 64 KB each with which the 8086 is
working at that instant of me. A segment is a logical unit of memory that may be up to 64
kilobytes long. Each segment is made up of con guous memory loca ons. It is an independent,
separately addressable unit. Star ng address will always be changing. It will not be fixed.
 Advantages of the Segmenta on
• It provides a powerful memory management mechanism.
• Code related opera on can be done in separate code segments.

b) Write an ALP to find largest number from array of 10 number’s.

sec on .data
numbers db 10, 25, 35, 45, 55, 65, 75, 85, 95, 5
count db 10
largest db 0

sec on .text
global _start

_start:
mov cx, [count]
mov si, 0
mov al, [numbers + si]

find_largest:
inc si
cmp si, cx
je end_loop

mov bl, [numbers + si]

cmp al, bl
ja find_largest

mov al, bl
jmp find_largest

end_loop:
mov [largest], al

mov eax, 1
int 0x80

sec on .bss

c) Draw the func onal block diagram of 8086 with all labels.
d) Write an ALP to find length of string.

sec on .data
myString db 'Hello, World!', 0
length dw 0

sec on .text
global _start

_start:
mov si, myString
xor cx, cx

find_length:
cmp byte [si], 0
je done
inc si
inc cx
jmp find_length

done:
mov [length], cx

mov eax, 1
int 0x80
 sec on .bss

e) Write an ALP for sum of series of 05 number’s.

sec on .data
numbers db 10, 20, 30, 40, 50
count db 5
sum dw 0

sec on .text
global _start

_start:
mov cx, [count]
mov si, 0
xor ax, ax

find_sum:
add al, [numbers + si]
inc si
loop find_sum

mov [sum], ax

mov eax, 1
int 0x80

sec on .bss

4. A empt any THREE of the following:

a) Explain the concept of pipelining in 8086 microprocessor with diagram.

• In 8086, pipelining is the technique of overlapping instruc on fetch and execu on mechanism.

• To speed up program execu on, the BIU fetches as many as six instruc on bytes ahead of me
from memory. The size of instruc on prefetching queue in 8086 is 6 bytes.

• While execu ng one instruc on other instruc on can be fetched. Thus it avoids the wai ng
me for execu on unit to receive other instruc on.
 • BIU stores the fetched instruc ons in a 6 level deep FIFO. The BIU can be fetching instruc ons
bytes while the EU is decoding an instruc on or execu ng an instruc on which does not require
use of the buses

• When the EU is ready for its next instruc on, it simply reads the instruc on from the queue in
the BIU

• This is much faster than sending out an address to the system memory and wai ng for memory
to send back the next instruc on byte or bytes. • This improves overall speed of the processor.

b) Differen ate between minimum mode and maximum of 8086 microprocessor.

Minimum Mode Maximum Mode

MN/MX’ pin is connected to Vcc. i.e. MN/MX MN/MX’ pin is connected to ground. i.e.
=1 MN/MX = 0
Single processor in the minimum mode Mul processor configura on in maximum
system mode system
In this mode, no separate bus controller is Separate bus controller (8288) is required in
required maximum mode
This circuit is simpler This circuit is complex

c) Write a MACRO to perform 32 bit by 16 bit division of unsigned numbers.

.model small
Div1 macro no1,no2
mov ax,no1
div no2
endm
.data
num1 dw 12346666h
num2 dw 2222h
.code
mov ax,@data
mov ds,ax
div1 num1,num2
ends
end
d) Write an ALP to count no. of 0’s in 16 bit number.

DATA SEGMENT
N DB 1237H
Z DB 0
DATA ENDS
CODE SEGMENT
ASSUME DS: DATA, CS:CODE
START:
MOV DX,DATA
MOV DS,DX
MOV AX, N
MOV CL,08
NEXT: ROL AX,01
JC ONE
INC Z
ONE: LOOP NEXT
HLT
CODE ENDS
END START

e) Differen ate between NEAR and FAR CALLS.

5. A empt any TWO of the following:

a) Define logical and effec ve address, Describe physical address genera on process in 8086
microprocessor. Calculate physical address by taking suitable DS, CS and IP.

Logical Address: It is generated by CPU in perspec ve of program. A logical address may be

different from the physical address due to the opera on of an address translator or mapping
func on.
 Effec ve Address or Offset Address: The offset for a memory operand is called the operand's
effec ve address or EA. It is an unassigned 16 bit number that expresses the operand's distance
in bytes from the beginning of the segment in which it resides. In 8086 we have base registers
and index registers.
Genera on of 20 bit physical address in 8086:-
1. Segment registers carry 16 bit data, which is also known as base address.
2. BIU appends four 0 bits to LSB of the base address. This address becomes 20-bit address.
3. Any base/pointer or index register carries 16 bit offset.
4. Offset address is added into 20-bit base address which finally forms 20 bit physical address of
memory loca on

For example if CS = 1000H and IP = 1100H, the

microprocessor fetches its next instruc on from
Physical address=Segment base address*10+Offset (Effec ve) address
=CS*10+IP
=1000H*10+1100H
=11100H

b) Describe different addressing modes of 8086 with one suitable example each.

1. Immediate addressing mode:

An instruc on in which 8-bit or 16-bit operand (data) is specified in the instruc on, then the
addressing mode of such instruc on is known as Immediate addressing mode.
Example:
MOV AX, 3040H

2. Register addressing mode

An instruc on in which an operand (data) is specified in general purpose registers, then the
addressing mode is known as register addressing mode.
Example:
MOV AX,BX

3. Direct addressing mode

An instruc on in which 16 bit effec ve address of an operand is specified in the instruc on,
and then the addressing mode of such instruc on is known as direct addressing mode.
Example:
MOV BL,[3000H]
 4. Register Indirect addressing mode
An instruc on in which address of an operand is specified in pointer register or in index
register or in BX, then the addressing mode is known as register indirect addressing mode.
Example:
MOV AX, [BX]

5. Indexed addressing mode

An instruc on in which the offset address of an operand is stored in index registers (SI or DI)
then the addressing mode of such instruc on is known as indexed addressing mode.
DS is the default segment for SI and DI.
For string instruc ons DS and ES are the default segments for SI and DI resp. this is a special
case of register indirect addressing mode.
Example:
MOV AX,[SI]

6. Based Indexed addressing mode:

An instruc on in which the address of an operand is obtained by adding the content of base
register (BX or BP) to the content of an index register (SI or (DI) The default segment register
may be DS or ES
Example:
MOV AX, [BX+SI]

c) Write an alp to perform block transfer opera on of 10 numbers

WITHOUT STRING INSTRUCTION

.MODEL SMALL
.DATA
ARR1 DB 00H,01H,02H,03H,04H,05H,06,07H.08H.09H
ARR2 DB 10 DUP(00H)
ENDS
.CODE
START:
MOV AX, @DATA
MOV DS,AX
MOV SI, OFFSET ARR1
MOV DI, OFFSET ARR2
MOV CX ,0000A
BACK: MOV AL,[SI]
MOV [DI],AL
INC SI
INC DI
LOOP BACK
MOV AH,4CH
INT 21H
ENDS
END START
d) Draw flow chart and write assembly language program to reverse the word in string.

DATA SEGMENT
STRB DB ‘COMPUTER$'
REV DB 0FH DUP(?)
DATA ENDS
CODE SEGMENT
START:ASSUME CS:CODE,DS:DATA
MOV DX,DATA
MOV DS,DX
LEA SI,STRB
MOV CL,0FH
LEA DI,REV
ADD DI,0FH
UP:MOV AL,[SI]
MOV [DI],AL
INC SI
DEC DI
LOOP UP
MOV AH,4CH
INT 21H CODE
ENDS
END START
6. A empt any TWO of the following:

a) Select assembly language for each of the following

i) rotate register BL right 4 mes
ii) mul ply AL by 04H
iii) Signed division of AX by BL
iv) Move 2000h in BX register
v) increment the counter of AX by 1
vi) compare AX with BX

i) MOV CL, 04H

ROR AX, CL

ii) MOV BL,04h

MUL BL

iii) IDIV BL

iv) MOV BX,2000h

v) INC AX

vi) CMP AX,BX

b) Describe how string instruc ons are used to compare two strings with suitable example.

CMPS /CMPSB/CMPSW: Compare string byte or Words.

Syntax:
CMPS des na on, source
CMPSB des na on, source
CMPSW des na on, source
Opera on: Flags affected < ----- DS:[SI]- ES:[DI]
It compares a byte or word in one string with a byte or word in another string. SI holds the offset
of source and DI holds offset of des na on strings. CX contains counter and DF=0 or 1 to auto
increment or auto decrement pointer a er comparing one byte/word.
e.g.
c) Write an ALP for concatena on of two strings.

MODEL SMALL
.DATA
STR_S DB ‘Hello $’
STR_D DB ‘World $’
.CODE
MOV AX, @DATA
MOV DS, AX
MOV SI, OFFSET STR_S
NEXT:
MOV AL, [SI]
CMP AL, ’$’
JE EXIT
INC SI
JMP NEXT
EXIT:
MOV DI, OFFSET STR_D
UP: MOV AL, [DI]
CMP AL, ’$’
JE EXIT1
MOV [SI], AL
INC SI
INC DI
JMP UP
EXIT1:
MOV AL, ’$’
MOV [SI], AL
MOV AH, 4CH
INT 21H
ENDS
END

d) Explain with example any three Shi and any three Rotate instruc ons.

1.SAL/SHL Des na on , Count:

Le shi s the bits of des na on.
MSB is shi ed into CARRY
LSB gets 0
Bits are shi ed count no.of mes.
IF count =1 ,it is directly specified in instruc on
If count > 1, it has to be loaded in CL register
e.g. SAL BL,1 : Le shi BL bits once
More examples:
MOV CL,05H: Load no of shi s in CL register
SHL BL,CL: le shi BL bits CL(5) number of mes

2. SHR Des na on , Count:

Right shi s the bits of des na on.
LSB is shi ed into CARRY
MSB gets 0
Bits are shi ed count no.of mes.
IF count =1 ,it is directly specified in instruc on
If count > 1, it has to be loaded in CL register
e.g. SHR BL,1 right shi BL bits once

More examples:
MOV CL,05H: Load no of shi s in CL register
SHR BL,CL: right shi BL bits CL(5) number of mes

3. SAR Des na on , Count:

Right shi s the bits of des na on.
LSB is shi ed into CARRY
MSB placed in MSB itself
Bits are shi ed count no.of mes.
IF count =1 ,it is directly specified in instruc on
If count > 1, it has to be loaded in CL register
Rotate Instruc ons
1.ROL Des na on , Count:
Le shi s the bits of des na on.
MSB is shi ed into CARRY
MSB also goes to LSB
Bits are shi ed count no.of mes.
IF count =1 ,it is directly specified in instruc on
If count > 1, it has to be loaded in CL register
e.g ROL BL,1 : Le shi BL bits once

2. ROR Des na on , Count:

Right shi s the bits of des na on.
LSB is shi ed into CARRY
LSB also goes to MSB
Bits are shi ed count no.of mes.
IF count =1 ,it is directly specified in instruc on
If count > 1, it has to be loaded in CL register
e.g. ROR BL,1 : Le shi BL bits once

3.RCL Des na on , Count:

Le shi s the bits of des na on.
MSB is shi ed into CARRY
Carry goes to LSB
Bits are shi ed count no.of mes.
IF count =1 ,it is directly specified in instruc on
If count > 1, it has to be loaded in CL register
e.g. RCL BL,1 : Le shi BL bits once