MULTIVIBRATOR

Oscillators are broadly classified into two categories namely sinusoidal and non-sinusoidal
oscillators. Sinusoidal oscillators produce a sine wave output and the non-sinusoidal oscillators
produce a square or pulsed output. A multivibrator circuit is basically a non-sinusoidal oscillator
with a regenerative feedback. It is a two state circuit that has zero, one or two stable output
states. Depending on the number of stable output states there are three basic types of
multivibrator circuits namely Bistable multivibrator having two stable states, Monostable
multivibrator having one stable state and Astable multivibrator having zero stable states. In the
case of Monostable and Bistable multivibrator an external trigger pulse is required for their
operation whereas in the case of Astable multivibrator it has automatic built in triggering
which switches it continuously between its two unstable states both SET and RESET.
555 TIMER: The 555 timer is widely used as IC timer circuit and it is the most commonly used
general purpose linear integrated circuit. It can run in either one of the two modes: Monostable
(one stable state) or Astable (no stable state). In the Monostable mode it can produce accurate
time delays from microseconds to hours. In the Astable mode it can produce rectangular
waveforms with a variable Duty cycle. The simplicity and ease with which both the
multivibrator circuits can be configured around this IC is one of the main reasons for its wide
use.
The 555 timer IC was first introduced around 1970 by the Signetics Corporation as the
SE555/NE555 and was called “The IC Time Machine" and was also the very first and only
commercial timer IC available. It provided circuit designers with a relatively cheap, stable, and
user-friendly integrated circuit for timer and multivibrator applications. There are three
resistors in the voltage divider network section in it and all have the same value 5 KΩ hence the
name 555.
Block diagram of 555 Timer IC:
The block diagram of a 555 timer is shown in the figure. A 555 timer has two comparators
(which are basically Two op-amps), an R-S flip-flop, two transistors and a resistive network.
The Resistive network consists of three equal resistors (5K Ohms each R) and acts as a voltage
divider. Notice that the resistor network is designed in such a way that the voltage at the
Inverting terminal of Comparator 1 (Upper comparator) will be 2/3Vcc and the voltage at the
Non Inverting terminal of Comparator 2 (Lower comparator) will be 1/3Vcc.
Comparator 1 – compares the threshold voltage (at pin 6) with the reference voltage + 2/3 VCC
volts.
Comparator 2 – compares the trigger voltage (at pin 2) with the reference voltage + 1/3 VCC
volts. In most applications, the control input is not used, so that the control voltage equals +(2/3)
VCC.
Upper comparator has a threshold input (pin 6) and a control input (pin 5). Output of the upper
comparator is applied to set (S) input of the flip-flop. Whenever the threshold voltage exceeds
the control voltage, the upper comparator will set the flip-flop and its output is high. A high
output from the flip-flop when given to the base of the discharge transistor saturates it and thus
discharges the transistor that is connected externally to the discharge pin 7. The complementary
signal out of the flip-flop goes to pin 3, the output. The output available at pin 3 is low. These
conditions will prevail until lower comparator triggers the flip-flop. Even if the voltage at the
threshold input falls below (2/3) VCC that is upper comparator cannot cause the flip-flop to

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change again. It means that the upper comparator can only force the flip-flop’s output high.
To change the output of flip-flop to low, the voltage at the trigger input must fall below + (1/3)
Vcc. When this occurs, lower comparator triggers the flip-flop, forcing its output low. The low
output from the flip-flop turns the discharge transistor off and forces the power amplifier to
output a high. These conditions will continue independent of the voltage on the trigger input.
Lower comparator can only cause the flip-flop to output low.

From the above discussion it is concluded that for the having low output from the timer 555, the
voltage on the threshold input must exceed the control voltage or + (2/3) VCC. This also turns the
discharge transistor on. To force the output from the timer high, the voltage on the trigger input
must drop below +(1/3) VCC. This turns the discharge transistor off. A voltage may be applied to
the control input to change the levels at which the switching occurs. When not in use, a 0.01 nF
capacitor should be connected between pin 5 and ground to prevent noise coupled onto this pin
from causing false triggering. Connecting the reset (pin 4) to a logic low will place a high on the
output of flip-flop. The discharge transistor will go on and the power amplifier will output a low.
This condition will continue until reset is taken high. This allows synchronization or resetting of
the circuit’s operation. When not in use, reset should be tied to +VCC. 555 ICs come in two
packages, either the round metal-can called the 'T' package or the more familiar 8-pin DIP 'V'
package. 555 pin configuration is shown in figure below.

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The Timer IC 555’s pin details are as follows:
PIN 1: Ground Pin: Connects to the 0V power supply, All voltages are measured with respect
to this terminal.
PIN 2: Trigger input: This pin is an inverting input to a comparator that is responsible for
transition of flip-flop from set to reset. The output of the timer depends on the amplitude
of the external trigger pulse applied to this pin.
PIN 3: Output: Output of the timer is available at this pin. There are two ways in which a load
can be connected to the output terminal either between pin 3 and ground pin (pin 1) or between
pin 3 and supply pin (pin 8). The load connected between pin 3 and supply pin is called the
normally on load and that connected between pin 3 and ground pin is called the normally off
load.
PIN 4: Reset input: The timer can be reset (disabled) by applying a negative pulse to this pin.
When the reset function is not in use, the reset terminal should be connected to +VCC to avoid
any possibility of false triggering. Reset pin is internally connected HIGH via 100 KΩ, must be
taken below 0.8 V to reset the IC chip.
PIN 5: Control voltage: The function of this terminal 'is to control the threshold and trigger
levels. Thus either the external voltage or a pot connected to this pin determines the pulse width
of the output waveform. The external voltage applied to this pin can also be used to modulate the
output waveform. When this pin is not used, it should be connected to ground through a 0.01 µF
to avoid any noise problem.
PIN 6: Threshold input: This is the non-inverting input terminal of comparator 1, which
compares the voltage applied to this terminal with a reference voltage of' +2/3VCC. The
amplitude of voltage applied to this terminal is responsible for the set state of flip-flop.
PIN 7: Discharge Pin: This pin is connected internally to the collector of transistor and mostly a
capacitor is connected between this terminal and ground. It is called discharge terminal because
when transistor saturates, capacitor discharges through the transistor. When the transistor is
cutoff, the capacitor charges at a rate determined by external resistor and capacitor.
PIN 8: +VCC: A supply voltage of + 5 V to + 18 V is applied to this terminal with respect to
ground (pin 1).

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