Tutorial Sheets
Tutorial Sheets
Tutorial Sheets
Q1: Group the 8085 instructions into the five different groups:
• Data Transfer Operations
• Arithmetic Operations
• Logic Operations
• Branch Operations
• Machine Control Operations
Q2: Define OPCODE & OPERAND.
Q3: Identify the Opcode & operands in the following instructions:
XRI 22 H
SUI 33 H
STA E123 H
RRC
OUT 01 H
Q4: Demonstrate the difference between the instructions: RLC vs. RLA
Q5: What are the different conditional branching instructions of 8085?
Q6: Depending on the operand type, what are the different sizes of the 8085 instruction may have?
Q7: Specify the size of the following instructions:
MVI A, FF H
ORA C
STA EDFF H
JMP D000 H
JZ E123 H
Q8: In an 8-bit microprocessor, how data can be represented in one of four formats?
Q9: Explain what operations are performed when the following instructions are executed. Give at
least one example for each operation.
(i) LXI H, address
(ii) ADD M
(iii) CMP reg
Q10: An ORA reg or ORI data instruction can be used to make a selected bit of a specified register as
1. Justify this statement. Also write the mnemonic of an instruction that will set bit 6 of the
accumulator without changing any of the other bits in the register.
Q11: Assemble the following program starting with ML: D109 H.
ML Mnemonics
Q: Draw and explain the timing diagram for the following instructions:
a)
ML Mnemonics Hex
C000H MOV A,B 78
b) ML Mnemonics Hex
C123H MVI A, 22H 3E
C124H 22
c) ML Mnemonics Hex
C011H STA, ED22H 32
C012H 22
C013H ED
d) ML Mnemonics Hex
C055H LDA, FABCH 3A
C056H BC
C057H FA
Q2:
For the following program, identify the MEMR signal of the Opcode Fetch machine cycles in
the given figure.
START: MVI C, 45H
STA C000H
JMP START
Tutorial Sheet-4
Q1: Write a program in assembly language to complement a number lying at C100 H memory
location. Store the complement at C101 H.
Q2: Write a program in assembly language to get 2’s complement of a number stored in memory
location C501 H. Store the answer at C502 H.
Q3: Write a program in assembly language to add decimal numbers 70 and 36. Answer is to be stored
in memory location C100 H.
Q4: Write a program in assembly language to multiply two decimal numbers 33 and 6 and store the
answer in memory location C100 H.
Q5: Write an assembly language program to mask off A1 and A2 bits of a given number. Let the
given number is 6E H.
Q6: How many flags are used in 8085? How are these flags affected with the result?
Q7: If carry flag is zero, then show that RAL instruction produces a multiplication of accumulator
contents by a factor of 2.
Q8: If carry flag is zero, then show that RAR instruction produces a division of accumulator contents
by a factor of 2.
Tutorial Sheet-5
Q1: Design a 8-bit register (8 input lines and 8 output lines) to store 8 bits using flip flops.
Q2: Identify the control signals that are generated at the output of the 2 to 4 decoder as shown
below:
Q3:
For the bidirectional buffer shown above, complete the operations (data flow direction) in
following functional table for the given inputs.
Enable Pin (19) Direction Control Pin (1) Operation
Low Low ?
Low High ?
High Low ?
High High ?
Tutorial Sheet-6
Q1: Identify the memory address range of the above interfacing. Also, mention the fold back /mirror
memory ranges.
Q2: The memory address of the last location of a 4kB memory chip is AFFF H. Find the starting
address.
Q3: Draw an interfacing circuit for a 4Kbyte EPROM using a 3 to 8 decoder such that the memory
address range will be C000H-CFFFH.
Q4:
In the above figure, exchange the address lines A15 and A11, and identify the memory map.
Q5:
Identify the memory address range for the memory chips M1 and M2.
Q6:
Specify the o/p line that will go low if the input to the 3 to 8 decoder is as below:
Q7:
Identify the entire memory map (addresses) of the schematic shown above and explain the
significance of the don’t care address lines on the memory map.
Tutorial Sheet-7
Q1: Make a comparison between MEMORY MAPPED I/O & I/O MAPPED I/O schemes.
Q2: Draw & explain the timing diagram of IN & OUT instruction.
Q3:
Can you recognize whether the above is I/O mapped I/O or memory mapped I/O scheme? What is the
PORT address if all the don’t care lines are assumed to be zero?
Q4:
i) Identify the I/O interfacing technique.
ii) State the addresses of the input & output device.
Tutorial Sheet-8
b) LXI B, 1000H
LOOP: DCX B
MOV A, C
ORA B
JNZ LOOP
c)