Computer - Architecture - Imp Q

Computer Architecture Assignment
1. Draw and explain connection between memory to the processor established

with address bus, data bus, and control lines.
Address Bus: It carries the address of the memory location or I/O device that the CPU wants
to access.
Data Bus: It is used to transfer actual data between the CPU and memory or I/O devices.
Control Bus: It carries control signals such as read/write to ensure proper coordination
between the CPU and memory or I/O devices.
2. What is bus? Explain the single bus structure used in computer organization.
A bus is a communication system that transfers data between components inside a
computer or between computers.
Single Bus Structure: In this structure, all components (CPU, memory, and I/O) share a
common bus. The components communicate with each other using the same bus, and only
one transfer can take place at a time. This simplifies the design but can cause bottlenecks.
3. Explain memory location and address. Briefly describe 3 methods to

represent negative numbers.
Memory Location and Address: A memory location is a specific place in memory where data
is stored, and each location has a unique identifier called an address.
Three Methods for Negative Numbers:
1. Sign-Magnitude Representation: The leftmost bit (MSB) represents the sign (0 for
positive, 1 for negative), while the remaining bits represent the magnitude.
2. 1's Complement: Negative numbers are represented by inverting all the bits of the
positive number.
3. 2's Complement: Negative numbers are represented by inverting all the bits of the
number and adding 1.
4. Explain the Big-Endian and Little-Endian assignments with suitable data

structure examples used in memory location and addresses.
Big-Endian: The most significant byte (MSB) is stored first (at the lowest address). For
example, if we store the 32-bit number 0x12345678, it is stored as 12 34 56 78 in memory.
Little-Endian: The least significant byte (LSB) is stored first (at the lowest address). For the
same 32-bit number 0x12345678, it is stored as 78 56 34 12.
5. Describe the concept of instruction sequencing. Mention the instructions
capable of performing four types of operations.
Instruction Sequencing: This refers to the order in which a processor executes machine
instructions. Proper sequencing is necessary for the correct execution of programs.
Four Types of Operations:
1. Data Transfer Instructions: Move data between registers or between memory and
registers.
2. Arithmetic Instructions: Perform operations like addition, subtraction, etc.
3. Logical Instructions: Perform bitwise operations like AND, OR, etc.
4. Control Instructions: Direct the flow of execution (like jump or branch instructions).
6. What do you mean by three-address, two-address, one-address, and zero-

address instructions? Describe them with suitable examples.
Three-address instruction: An instruction format where the operation involves three
operands. Example: ADD A, B, C (A = B + C).
Two-address instruction: Only two operands are specified. Example: ADD A, B (A = A + B).
One-address instruction: A single operand is given, and the accumulator is implied.
Example: ADD A (Accumulator = Accumulator + A).
Zero-address instruction: No operand is required, often used in stack-based architectures.
Example: ADD (operates on the top two elements of the stack).
7. Compare RISC and CISC architecture.

RISC (Reduced Instruction Set Computer):
- Simple instructions that take one clock cycle.
- Larger number of registers.
- Instructions are highly optimized.
CISC (Complex Instruction Set Computer):
- Complex instructions that can take multiple cycles.
- Fewer registers.
- More specialized instructions that can do more per instruction.
8. Explain the concepts of Stacks, queues, and subroutines.

Stack: A LIFO (Last In, First Out) data structure where elements are added and removed
from the top. Used for function calls and local variable storage.
Queue: A FIFO (First In, First Out) data structure where elements are added to the back and
removed from the front. Used in task scheduling.
Subroutine: A sequence of program instructions that perform a specific task, packaged as a
unit. This unit can be used repeatedly in different parts of the program.
9. Draw the instruction cycle with and without interrupts. Justify the statement,
that ‘Interrupts can enhance the performance of the processor.’
Instruction Cycle: The basic cycle consists of fetching the instruction from memory,
decoding it, and executing it.
With Interrupts: The processor is capable of responding to asynchronous events without
stalling the current execution by saving the state of the current task and executing an
interrupt service routine (ISR).
Performance Enhancement by Interrupts: Interrupts allow the processor to respond to
external events like I/O without wasting cycles on continuous polling, thus improving
efficiency.
10. Write short note on Cache memory and Virtual memory.

Cache Memory: A small, high-speed memory located close to the CPU that stores frequently
accessed data to reduce the time taken for data access from the main memory.
Virtual Memory: A memory management technique that uses a portion of the hard disk as
additional RAM. It allows programs to use more memory than physically available by paging
parts of data in and out of main memory.

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Computer Architecture Assignment

1. Draw and explain connection between memory to the processor established

3. Explain memory location and address. Briefly describe 3 methods to

4. Explain the Big-Endian and Little-Endian assignments with suitable data

6. What do you mean by three-address, two-address, one-address, and zero-

7. Compare RISC and CISC architecture.

8. Explain the concepts of Stacks, queues, and subroutines.

10. Write short note on Cache memory and Virtual memory.

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