ST33TPM12LPC

Trusted Platform Module with LPC interface based on 32-bit ARM®

SecurCore® SC300™ CPU
Data brief

 Temperature range: 0°C to +70°C

 ESD protection up to 4 kV (HBM)
 3.3 V supply voltage range
 28-lead thin shrink small outline and 32-lead
very thin fine pitch quad flat pack ECOPACK®
TSSOP28 packages
VQFN32
Security features
Features  Active shield and environmental sensors
 Memory protection unit (MPU)
TPM features  Monitoring of environmental parameters
(power and clock)
 Single-chip Trusted Platform Module (TPM)
 Hardware and software protection against fault
 Compliant with Trusted Computing Group injection
(TCG) Trusted Platform Module (TPM) Main
specifications 1.2, Level 2, Revision 116  AIS-31 Class P2 compliant true random
number generator (TRNG)
 Based on TCG PC Client Specific TPM
Interface Specifications 1.21  Cryptographic algorithms:
 Common criteria (CC) certification based on – RSA key generation from 512 to 2048 with
the certified TPM Protection Profile (Revision a 2-byte step
116) with Evaluation Assurance Level (EAL) 4+ – RSA signature and encryption
 Up to 33-MHz Low Pin Count (LPC) interface – SHA-1 and SHA-256
V1.1 – AES-128 in CTR mode
 Provisioned with Endorsement key and
Performance and resource features
Endorsement Key certificate
 Support of clock suspension for power saving  SHA1 computation for 64-byte block: 155 μs(a)
mode  Signature with a 2048-bit key: 150 ms(a)
 Support of Field Upgrade and Dictionary Attack  Signature with a 1024-bit key: 30 ms(a)
protection  NV storage allocated space: 4 Kbytes
 Monotonic counter endurance guaranteed for (1.2 Kbytes used by EK certificate)
7 years  Supported 2048-bit key slots:
 Support of software and hardware physical – up to 10 key slots (without EK and SRK)
presence – 1 key slot in volatile memory for high-
frequency loading use case
Hardware features
 ARM® SecurCore® SC300™ 32-bit RISC core
 Highly reliable CMOS EEPROM submicron
technology
– 30-year data retention at 25° C
– 500,000 Erase/Write cycles endurance a. Typical value with clock configuration in secure mode
typical at 25° C without communication time.

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 Description ST33TPM12LPC

1 Description

The ST33TPM12LPC is a cost-effective and high performance Trusted Platform Module

(TPM) targeting embedded system applications.
This device implements the functions defined by the Trusted Computing Group
(www.trustedcomputinggroup.org) in the TCG Trusted Platform Module Specifications
version 1.2 Level 2 Revision 116 ([1][2][3]), and is also based on the TCG PC Client specific
TPM interface specifications 1.21 [5] and the PC Client implementation specification for
conventional BIOS [6] for what concerns the TPM internal register list and bit definitions.
The ST33TPM12LPC is based on a secure MCU hardware platform.
The ST33TPM12LPC is built on a 32-bit ARM® reduced instruction set computing (RISC)
processor which provides high cryptographic and general performances. A crypto-processor
NESCRYPT is also present to support efficiently all public key cryptographic algorithms.

1.1 Hardware features

The ST33TPM12LPC is based on a smartcard-class secure MCU that incorporates the
most recent generation of ARM processors for embedded secure systems. Its SecurCore®
SC300™ 32-bit RISC core is built on the Cortex™ M3 core with additional security features
to help to protect against advanced forms of attacks.
Cadenced at 30 MHz, the SC300™ core brings great performance and excellent code
density thanks to the Thumb®-2 instruction set.
The ST33TPM12LPC offers an LPC (Low Pin Count) communication interface compatible
with Low Pin Count interface specification v1.1.
The ST33TPM12LPC features hardware accelerators for advanced cryptographic functions.
The EDES peripheral provides a secure DES (Data Encryption Standard) algorithm
implementation, while the NESCRYPT crypto-processor efficiently supports the public key
algorithm.
The ST33TPM12LPC operates in the 0 to +70°C temperature and 3.3V supply voltage
ranges.
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and device status are available at: www.st.com.
ECOPACK® is an ST trademark.

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 ST33TPM12LPC Description

Figure 1. ST33TPM12LPC hardware block diagram

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 Pin and signal description ST33TPM12LPC

2 Pin and signal description

2.1 Pinout descriptions

Figure 2. TSSOP28 pinout

NC 1 28 LPCPD
NC 2 27 SERIRQ
NC 3 26 LAD0
GND 4 25 NC
NC 5 24 VPS
NC 6 23 LAD1
PP 7 TSSOP28 22 LFRAME
VNC 8 21 LCLK
VNC 9 20 LAD2
VPS 10 19 NC
GND 11 18 GND
NC 12 17 LAD3
NC 13 16 LRESET
NC 14 15 NC

Figure 3. VQFN32 pinout

SERIRQ
LPCPD

LAD0

VPS
NC
NC

NC
NC

32 31 30 29 28 27 26 25
GND 1 24 LAD1
NC 2 23 LFRAME
NC 3 22 LCLK
PP 21 LAD2
4 QFN32
VNC 20 NC
5
VNC 6 19 GND
VPS 7 18 LAD3
GND 8 17 NC
9 10 11 12 13 14 15 16
NC
NC
NC
NC
NC

NC
NC
LRESET

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 ST33TPM12LPC Pin and signal description

Table 1. Pin descriptions

Signal Type Description

3.3V Power supply. This pin must be connected to 3.3V DC power rail
VPS Input
supplied by the motherboard.
GND Input GND has to be connected to the main motherboard ground.
LAD[3:0] Bidir LPC Multiplexed Command, Address and Data (see LPC Spec)
Clock Same clock as PCI clock on the host (typically 33 MHz, but may be
LCLK Input as low as 10 MHz). Same clock phase with typical PCI skew. (see LPC
Spec)
Frame indicates start of a new cycle, termination of broken cycle (see LPC
LFRAME Input
Spec)
Power Down indicates that the peripheral should prepare for power to be
LPCPD Input removed from the LPC i/F devices. Actual power removal is system
dependent (see LPC Spec)
LRESET Input Reset used to re-initialize the device
Physical Presence, active high, internal pull-down. Used to indicate
PP Input
Physical Presence to the TPM.
Serialized IRQ is used by TPM to handle interrupt support (see LPC
SERIRQ Bidir
Spec)
Vendor-controlled No Connect: internal pull-up implemented. Can be
VNC -
left unconnected. Must not be tied to GND.

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 Package mechanical data ST33TPM12LPC

3 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.

3.1 28-pin thin shrink small outline package (TSSOP) with 4.4-
mm body width
Dimensional features of the TSSOP28 package: Body width 4.4 mm. Pitch 0.65 mm.
Unless otherwise specified, general tolerance is ± 0.1 mm.

Figure 4. 28-lead thin shrink small outline package outline

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Table 2. 28-lead thin shrink small outline package mechanical data

millimeters inches
Symbol
Min. Typ. Max. Min. Typ. Max.

A 1.20 0.047
A1 0.05 0.15 0.002 0.006
A2 0.80 1.00 1.05 0.031 0.040 0.041
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.008
D 9.60 9.70 9.80 0.378 0.382 0.386
E 6.20 6.40 6.60 0.244 0.252 0.260
E1 4.30 4.40 4.50 0.170 0.173 0.177

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 ST33TPM12LPC Package mechanical data

Table 2. 28-lead thin shrink small outline package mechanical data (continued)
millimeters inches
Symbol
Min. Typ. Max. Min. Typ. Max.

e 0.65 0.026
L 0.45 0.60 0.75 0.018 0.024 0.0230
L1 1.00 0.040
k 0° 8° 0° 8°
aaa 0.10 0.004

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 Package mechanical data ST33TPM12LPC

3.2 32-lead very thin fine pitch quad flat pack no-lead (VFQFPN)
package
Figure 5. VFQFPN32 5x5 mm 0.5 mm pitch package outline
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Table 3. VFQFPN32 5x5 mm package mechanical data

millimeters inches (1)
Symbol
Min. Typ. Max. Min. Typ. Max.

A 0.800 0.900 1.000 0.0315 0.0354 0.0394

A1 0.000 0.020 0.050 0.0000 0.0008 0.0020
A3 0.200 0.0079
b 0.180 0.250 0.300 0.0071 0.0098 0.0118
D 4.850 5.000 5.150 0.1909 0.1969 0.2028
D2 3.500 3.600 3.700 0.1378 0.1417 0.1457

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 ST33TPM12LPC Package mechanical data

Table 3. VFQFPN32 5x5 mm package mechanical data

millimeters inches (1)
Symbol
Min. Typ. Max. Min. Typ. Max.

E 4.850 5.000 5.150 0.1909 0.1969 0.2028

E2 3.500 3.600 3.700 0.1378 0.1417 0.1457
e 0.500 0.0197
L 0.300 0.400 0.500 0.0118 0.0157 0.0197
ddd 0.050 0.0020
1. Values in inches are converted from mm and rounded to 4 decimal digits.

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 Delivery packing ST33TPM12LPC

4 Delivery packing

Surface-mount packages can be supplied with Tape and Reel packing. The reels have a 13"
typical diameter.
Reels are in plastic, either anti-static or conductive, with a black conductive cavity tape. The
cover tape is transparent anti-static or conductive.
The devices are positioned in the cavities with the identifying pin (normally Pin “1”) on the
same side as the sprocket holes in the tape.
The STMicroelectronics Tape & Reel specifications are compliant to the EIA 481-A standard
specification.

Table 4. Packages on Tape and Reel

Package Description Tape width Tape pitch Reel diameter Quantity per reel

Thin shrink small

TSSOP 28 16 mm 8 mm 13 in. 2500
outline package
Very thin fine pitch
VFQFPN 32 quad flat pack no- 12 mm 8 mm 13 in. 3000
lead package

Figure 6. Reel diagram

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Table 5. Reel dimensions

Tape
Reel size A Max. B Min. C D Min. G Max. N Min. T Max. Unit
width

16 16.4 +2/–0 22.4

13” 330 1.5 13 ±0.2 20.2 100 mm
12 12.6 18.4

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 ST33TPM12LPC Delivery packing

Figure 7. Embossed carrier tape for VFQFPN 5x5 mm

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Table 6. Carrier tape dimensions for VFQFPN 5x5 mm

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Package A0 B0 K0 P P2 D P0 E F W Unit
Min. Max.
5.25 5.25 1.1 8 2 1.55 4 1.75 5.5 12 0.3
FPN 5x5 1.5 mm
±0.1 ±0.1 ±0.1 ±0.1 ±0.1 ±0.05 ±0.1 ±0.1 ±0.1 ±0.3 ±0.05

Figure 8. Embossed carrier tape for TSSOP 16 mm

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Table 7. Carrier tape constant dimensions for TSSOP 16 mm tape

Tape size Ao, Bo, Ko(1) D E Po T Max. Unit

16 mm See note. 1.5 +0.1 / -0 1.75 ±0.1 4 ±0.1 0.4 mm

1. Ao, Bo, Ko, are determined by components sizes. The clearance between the component and the cavity must be within
0.05 mm (Min.) to 0.90 mm (Max.)

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 Revision history ST33TPM12LPC

Revision history

Table 8. Document revision history

Date Revision Changes

16-Sept-2011 1 Initial release.

08-Dec-2011 2 Updated Features.
11-Jan-2013 3 Updated Common Criteria information on page 1.
07-Nov-2013 4 Updated logo information on page 2.

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 ST33TPM12LPC

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