LF347BN
LF347BN
LF347BN
August 2000
Features
n n n n n n n n n n Internally trimmed offset voltage: Low input bias current: Low input noise current: Wide gain bandwidth: High slew rate: Low supply current: High input impedance: Low total harmonic distortion: Low 1/f noise corner: Fast settling time to 0.01%: 5 mV max 50 pA 0.01 pA/Hz 4 MHz 13 V/s 7.2 mA 1012 0.02% 50 Hz 2 s
Simplified Schematic
14
Connection Diagram
Dual-In-Line Package
Quad
00564701
Top View Order Number LF147J, LF147J-SMD, LF347M, LF347BN, LF347N, LF147J/883, or JL147 BCA (Note 1) See NS Package Number J14A, M14A or N14A
DS005647
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LF147/LF347
LF147 Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10 sec.) Soldering Information Dual-In-Line Package Soldering (10 seconds) Small Outline Package Vapor Phase (60 seconds) Infrared (15 seconds) 260C (Note 6)
LF347B/LF347 (Note 6)
LF347B/LF347
65CTA150C 260C
See AN-450 Surface Mounting Methods and Their Effect on Product Reliability for other methods of soldering surface mount devices. ESD Tolerance (Note 12) 900V
DC Electrical Characteristics
Symbol Parameter
5 7
RS=10 k
25 50
100
100
100
12 13.5 11 +15
12 100 100 7.2 11
12 13.5 11 +15
12 80 80 100 100 7.2 11
12 13.5 11 +15
12 70 70 100 100 7.2
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LF147/LF347
AC Electrical Characteristics
Symbol Parameter Amplifier to Amplifier Coupling
(Note 7) LF147 Min Typ Max Min 120 LF347B Typ Max Min 120 LF347 Typ Max 120 dB Units
SR GBW en
8 2.2
13 4 20
8 2.2
13 4 20
8 2.2
13 4 20
V/s MHz
in THD
0.01
0.01
0.01
< 0.02
< 0.02
< 0.02
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Note 3: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage. Note 4: Any of the amplifier outputs can be shorted to ground indefinitely, however, more than one should not be simultaneously shorted as the maximum junction temperature will be exceeded. Note 5: For operating at elevated temperature, these devices must be derated based on a thermal resistance of jA. Note 6: The LF147 is available in the military temperature range 55CTA125C, while the LF347B and the LF347 are available in the commercial temperature range 0CTA70C. Junction temperature can rise to Tj max = 150C. Note 7: Unless otherwise specified the specifications apply over the full temperature range and for VS= 20V for the LF147 and for VS= 15V for the LF347B/LF347. VOS, IB, and IOS are measured at VCM=0. Note 8: The input bias currents are junction leakage currents which approximately double for every 10C increase in the junction temperature, Tj. Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, PD. Tj=TA+jA PD where jA is the thermal resistance from junction to ambient. Use of a heat sink is recommended if input bias current is to be kept to a minimum. Note 9: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from VS = 5V to 15V for the LF347 and LF347B and from VS = 20V to 5V for the LF147. Note 10: Refer to RETS147X for LF147D and LF147J military specifications. Note 11: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside guaranteed limits. Note 12: Human body model, 1.5 k in series with 100 pF.
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LF147/LF347
00564714
00564715
Supply Current
00564716 00564717
00564719 00564718
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LF147/LF347
00564720
00564721
Gain Bandwidth
00564722
00564723
Bode Plot
Slew Rate
00564724
00564725
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LF147/LF347
00564726
00564727
00564728
00564729
00564730
00564731
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LF147/LF347
00564732
00564733
00564734
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LF147/LF347
Pulse Response
RL=2 k, CL=10 pF
00564706
00564704
00564707
00564705
00564708
Application Hints
The LF147 is an op amp with an internally trimmed input offset voltage and JFET input devices (BI-FET II). These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the need for clamps across the inputs. Therefore, large differential input voltages can easily be accommodated without a large increase in input current. The maximum differential input voltage is independent of the supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this will cause large currents to flow which can result in a destroyed unit. Exceeding the negative common-mode limit on either input will force the output to a high state, potentially causing a reversal of phase to the output. Exceeding the negative common-mode limit on both inputs will force the amplifier output to a high state. In neither case does a latch occur since raising the input back within the common-mode range again puts the input stage and thus the amplifier in a normal operating mode.
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LF147/LF347
Application Hints
(Continued)
Exceeding the positive common-mode limit on a single input will not change the phase of the output; however, if both inputs exceed the limit, the output of the amplifier will be forced to a high state. The amplifiers will operate with a common-mode input voltage equal to the positive supply; however, the gain bandwidth and slew rate may be decreased in this condition. When the negative common-mode voltage swings to within 3V of the negative supply, an increase in input offset voltage may occur. Each amplifier is individually biased by a zener reference which allows normal circuit operation on 4.5V power supplies. Supply voltages less than these may result in lower gain bandwidth and slew rate. The LF147 will drive a 2 k load resistance to 10V over the full temperature range. If the amplifier is forced to drive heavier load currents, however, an increase in input offset voltage may occur on the negative voltage swing and finally reach an active current limit on both positive and negative swings. Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a
socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit. As with most amplifiers, care should be taken with lead dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the input to minimize pick-up and maximize the frequency of the feedback pole by minimizing the capacitance from the input to ground. A feedback pole is created when the feedback around any amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many instances the frequency of this pole is much greater than the expected 3 dB frequency of the closed loop gain and consequently there is negligible effect on stability margin. However, if the feedback pole is less than approximately 6 times the expected 3 dB frequency a lead capacitor should be placed from the output to the input of the op amp. The value of the added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than or equal to the original feedback pole time constant.
Detailed Schematic
00564709
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LF147/LF347
Typical Applications
Digitally Selectable Precision Attenuator
00564710
Accuracy of better than 0.4% with standard 1% value resistors No offset adjustment necessary Expandable to any number of stages Very high input impedance
A1 0 0 0 0 1 1 1 1 A2 0 0 1 1 0 0 1 1 A3 0 1 0 1 0 1 0 1 VO Attenuation 0 1 dB 2 dB 3 dB 4 dB 5 dB 6 dB 7 dB
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10
LF147/LF347
Typical Applications
(Continued)
Long Time Integrator with Reset, Hold and Starting Threshold Adjustment
00564711
VOUT starts from zero and is equal to the integral of the input voltage with respect to the threshold voltage:
Output starts when VINVTH Switch S1 permits stopping and holding any output value Switch S2 resets system to zero
11
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LF147/LF347
Typical Applications
00564712
For circuit shown: fo=3 kHz, fNOTCH=9.5 kHz Q=3.4 Passband gain: Highpass 0.1 Bandpass 1 Lowpass 1 Notch 10
foxQ200 kHz 10V peak sinusoidal output swing without slew limiting to 200 kHz See LM148 data sheet for design equations
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12
LF147/LF347
Physical Dimensions
Ceramic Dual-In-Line Package (J) Order Number LF147J, LM147J-SMD or LF147J/883 NS Package Number J14A
S.O. Package (M) Order Number LF347M or LF347MX NS Package Number M14A
13
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Physical Dimensions
Molded Dual-In-Line Package (N) Order Number LF347BN or LF347N NS Package Number N14A
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