LF155/LF156/LF355/LF356/LF357 JFET Input Operational Amplifiers

May 2000

LF155/LF156/LF355/LF356/LF357 JFET Input Operational Amplifiers

General Description
These are the first monolithic JFET input operational amplifiers to incorporate well matched, high voltage JFETs on the same chip with standard bipolar transistors (BI-FET Technology). These amplifiers feature low input bias and offset currents/low offset voltage and offset voltage drift, coupled with offset adjust which does not degrade drift or common-mode rejection. The devices are also designed for high slew rate, wide bandwidth, extremely fast settling time, low voltage and current noise and a low 1/f noise corner. n n n n Wideband, low noise, low drift amplifiers Logarithmic amplifiers Photocell amplifiers Sample and Hold circuits

Features
Advantages n Replace expensive hybrid and module FET op amps n Rugged JFETs allow blow-out free handling compared with MOSFET input devices n Excellent for low noise applications using either high or low source impedance very low 1/f corner n Offset adjust does not degrade drift or common-mode rejection as in most monolithic amplifiers n New output stage allows use of large capacitive loads (5,000 pF) without stability problems n Internal compensation and large differential input voltage capability

Common Features n Low input bias current: 30pA n Low Input Offset Current: 3pA n High input impedance: 1012 n Low input noise current: n High common-mode rejection ratio: n Large dc voltage gain: 106 dB

100 dB

Uncommon Features
LF155/ LF355
j

LF156/ LF356 1.5

LF357 (AV =5) 1.5

Units s

Extremely fast settling time to 0.01% Fast slew rate Wide gain bandwidth Low input noise voltage

j j j

5 2.5 20

12 5 12

50 20 12

V/s MHz

Applications
n Precision high speed integrators n Fast D/A and A/D converters n High impedance buffers

Simplified Schematic

DS005646-1

*3 pF in LF357 series.

BI-FET, BI-FET II are trademarks of National Semiconductor Corporation.

2001 National Semiconductor Corporation

DS005646

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LF155/LF156/LF355/LF356/LF357

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required, contact the National Semiconductor Sales Office/Distributors for availability and specifications. LF155/6 LF356B LF355/6/7 22V 22V 18V Supply Voltage 40V 40V 30V Differential Input Voltage 20V 20V 16V Input Voltage Range (Note 2) Output Short Circuit Duration Continuous Continuous Continuous TJMAX H-Package 150C 115C 115C N-Package 100C 100C M-Package 100C 100C Power Dissipation at TA = 25C (Notes 1, 8) H-Package (Still Air) 560 mW 400 mW 400 mW H-Package (400 LF/Min Air Flow) 1200 mW 1000 mW 1000 mW N-Package 670 mW 670 mW M-Package 380 mW 380 mW Thermal Resistance (Typical) JA H-Package (Still Air) 160C/W 160C/W 160C/W H-Package (400 LF/Min Air Flow) 65C/W 65C/W 65C/W N-Package 130C/W 130C/W M-Package 195C/W 195C/W (Typical) JC H-Package 23C/W 23C/W 23C/W Storage Temperature Range 65C to +150C 65C to +150C 65C to +150C Soldering Information (Lead Temp.) Metal Can Package Soldering (10 sec.) 300C 300C 300C Dual-In-Line Package Soldering (10 sec.) 260C 260C 260C Small Outline Package Vapor Phase (60 sec.) 215C 215C Infrared (15 sec.) 220C 220C See AN-450 Surface Mounting Methods and Their Effect on Product Reliability for other methods of soldering surface mount devices. ESD tolerance (100 pF discharged through 1.5 k) 1000V 1000V 1000V

DC Electrical Characteristics
(Note 3) Symbol VOS VOS/T TC/VOS IOS IB RIN Parameter Input Offset Voltage Average TC of Input Offset Voltage Change in Average TC with VOS Adjust Input Offset Current Input Bias Current Input Resistance Conditions RS =50, TA =25C Over Temperature RS =50 RS =50, (Note 4) TJ =25C, (Notes 3, 5) TJTHIGH TJ =25C, (Notes 3, 5) TJTHIGH TJ =25C 1012 30 5 0.5 3 20 20 100 50 1012 30 LF155/6 Min Typ 3 Max Min 5 7 5 0.5 3 20 1 100 5 1012 30 LF356B Typ 3 Max Min 5 6.5 5 0.5 3 50 2 200 8 LF355/6/7 Typ 3 Max 10 13 Units mV mV V/C V/C per mV pA nA pA nA

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DC Electrical Characteristics
(Note 3) Symbol AVOL Parameter Large Signal Voltage Gain Output Voltage Swing Input Common-Mode Voltage Range Common-Mode Rejection Ratio Supply Voltage Rejection Ratio (Note 6)

(Continued)

Conditions VS = 15V, TA =25C VO = 10V, RL =2k Over Temperature

LF155/6 Min 50 25 Typ 200 Max Min 50 25

LF356B Typ 200 Max Min 25 15

LF355/6/7 Typ 200 Max

Units V/mV V/mV

VO VCM CMRR PSRR

VS = 15V, RL =10k VS = 15V, RL =2k VS = 15V

12 10 11
85 85

13 12
+15.1 12 100 100

12 10 11
85 85

13 12 15.1
12 100 100

12 10
+10 80 80

13 12
+15.1 12 100 100

V V V V dB dB

DC Electrical Characteristics
TA = TJ = 25C, VS = 15V Parameter Supply Current LF155 Typ 2 Max 4 Typ 2 LF355 Max 4 LF156/356B Typ 5 Max 7 Typ 5 LF356 Max 10 Typ 5 LF357 Max 10 Units mA

AC Electrical Characteristics
TA = TJ = 25C, VS = 15V LF155/355 Symbol SR GBW ts en Parameter Slew Rate Gain Bandwidth Product Settling Time to 0.01% Equivalent Input Noise Voltage Equivalent Input Current Noise Input Capacitance (Note 7) RS =100 f=100 Hz f=1000 Hz in CIN f=100 Hz f=1000 Hz 25 20 0.01 0.01 3 15 12 0.01 0.01 3 15 12 0.01 0.01 3 pF Conditions Typ LF155/6: AV =1, LF357: AV =5 2.5 4 5 1.5 5 Min 7.5 LF156/356B LF156/356/ LF356B Typ 12 50 20 1.5 LF357 Units Typ V/s V/s MHz s

Notes for Electrical Characteristics

Note 1: The maximum power dissipation for these devices must be derated at elevated temperatures and is dictated by TJMAX, JA, and the ambient temperature, TA. The maximum available power dissipation at any temperature is Pd =(TJMAXTA)/JA or the 25C PdMAX, whichever is less. Note 2: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage. Note 3: Unless otherwise stated, these test conditions apply:

LF155/156 Supply Voltage, VS TA THIGH

and VOS, IB and IOS are measured at VCM =0.

LF356B

LF355/6/7 VS = 15V 0CTA+70C +70C

15VVS 20V
55CTA+125C +125C

15VVS 20V
0CTA+70C +70C

Note 4: The Temperature Coefficient of the adjusted input offset voltage changes only a small amount (0.5V/C typically) for each mV of adjustment from its original unadjusted value. Common-mode rejection and open loop voltage gain are also unaffected by offset adjustment.

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Notes for Electrical Characteristics

(Continued)

Note 5: The input bias currents are junction leakage currents which approximately double for every 10C increase in the junction temperature, TJ. Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, Pd. TJ =TA+JA Pd where JA is the thermal resistance from junction to ambient. Use of a heat sink is recommended if input bias current is to be kept to a minimum. Note 6: Supply Voltage Rejection is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practice. Note 7: Settling time is defined here, for a unity gain inverter connection using 2 k resistors for the LF155/6. It is the time required for the error voltage (the voltage at the inverting input pin on the amplifier) to settle to within 0.01% of its final value from the time a 10V step input is applied to the inverter. For the LF357, AV =5, the feedback resistor from output to input is 2 k and the output step is 10V (See Settling Time Test Circuit). Note 8: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside guaranteed limits.

Typical DC Performance Characteristics

specified. Input Bias Current

Curves are for LF155 and LF156 unless otherwise

Input Bias Current

DS005646-37

DS005646-38

Input Bias Current

Voltage Swing

DS005646-39

DS005646-40

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LF155/LF156/LF355/LF356/LF357

Typical DC Performance Characteristics

specified. (Continued) Supply Current

Curves are for LF155 and LF156 unless otherwise

Supply Current

DS005646-41

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Negative Current Limit

Positive Current Limit

DS005646-43

DS005646-44

Positive Common-Mode Input Voltage Limit

Negative Common-Mode Input Voltage Limit

DS005646-45 DS005646-46

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LF155/LF156/LF355/LF356/LF357

Typical DC Performance Characteristics

specified. (Continued) Open Loop Voltage Gain

Curves are for LF155 and LF156 unless otherwise

Output Voltage Swing

DS005646-47

DS005646-48

Typical AC Performance Characteristics

Gain Bandwidth Gain Bandwidth

DS005646-49

DS005646-50

Normalized Slew Rate

Output Impedance

DS005646-51

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Typical AC Performance Characteristics

Output Impedance

(Continued)

LF155 Small Signal Pulse Response, AV = +1

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DS005646-53

LF156 Small Signal Pulse Response, AV = +1

LF155 Large Signal Pulse Response, AV = +1

DS005646-6

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LF156 Large Signal Puls Response, AV = +1

Inverter Settling Time

DS005646-9

DS005646-55

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Typical AC Performance Characteristics

Inverter Settling Time

(Continued)

Open Loop Frequency Response

DS005646-56

DS005646-57

Bode Plot

Bode Plot

DS005646-58

DS005646-59

Bode Plot

Common-Mode Rejection Ratio

DS005646-60

DS005646-61

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Typical AC Performance Characteristics

Power Supply Rejection Ratio

(Continued)

Power Supply Rejection Ratio

DS005646-62

DS005646-63

Undistorted Output Voltage Swing

Equivalent Input Noise Voltage

DS005646-64 DS005646-65

Equivalent Input Noise Voltage (Expanded Scale)

DS005646-66

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LF155/LF156/LF355/LF356/LF357

Detailed Schematic

DS005646-13

*C = 3 pF in LF357 series.

Connection Diagrams

(Top Views)

Metal Can Package (H) Dual-In-Line Package (M and N)

DS005646-14

*Available per JM38510/11401 or JM38510/11402

Order Number LF155H, LF156H, LF356BH, LF356H, or LF357H See NS Package Number H08C

DS005646-29

Order Number LF356M, LF356MX, LF355N, or LF356N See NS Package Number M08A or N08E

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Application Hints
These are op amps with JFET input devices. These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the need for clamps across the inputs. Therefore large differential input voltages can easily be accommodated without a large increase in input current. The maximum differential input voltage is independent of the supply voltages. However, neither of the input voltages should be allowed to exceed the negative supply as this will cause large currents to flow which can result in a destroyed unit. Exceeding the negative common-mode limit on either input will force the output to a high state, potentially causing a reversal of phase to the output. Exceeding the negative common-mode limit on both inputs will force the amplifier output to a high state. In neither case does a latch occur since raising the input back within the common-mode range again puts the input stage and thus the amplifier in a normal operating mode. Exceeding the positive common-mode limit on a single input will not change the phase of the output however, if both inputs exceed the limit, the output of the amplifier will be forced to a high state. These amplifiers will operate with the common-mode input voltage equal to the positive supply. In fact, the common-mode voltage can exceed the positive supply by approximately 100 mV independent of supply voltage and over the full operating temperature range. The positive supply can therefore be used as a reference on an input as, for example, in a supply current monitor and/or limiter. Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit. All of the bias currents in these amplifiers are set by FET current sources. The drain currents for the amplifiers are therefore essentially independent of supply voltage. As with most amplifiers, care should be taken with lead dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the input to minimize pickup and maximize the frequency of the feedback pole by minimizing the capacitance from the input to ground. A feedback pole is created when the feedback around any amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to ac ground set the frequency of the pole. In many instances the frequency of this pole is much greater than the expected 3 dB frequency of the closed loop gain and consequently there is negligible effect on stability margin. However, if the feedback pole is less than approximately six times the expected 3 dB frequency a lead capacitor should be placed from the output to the input of the op amp. The value of the added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than or equal to the original feedback pole time constant.

Typical Circuit Connections

VOS Adjustment

DS005646-67

VOS is adjusted with a 25k potentiometer The potentiometer wiper is connected to V+ For potentiometers with temperature coefficient of 100 ppm/C or less the additional drift with adjust is 0.5 V/C/mV of adjustment Typical overall drift: 5 V/C (0.5 V/C/mV of adj.)

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Typical Circuit Connections

(Continued) Driving Capacitive Loads

DS005646-68

* LF155/6 R = 5k

LF357 R=1.25k Due to a unique output stage design, these amplifiers have the ability to drive large capacitive loads and still maintain stability. CL(MAX) . 0.01 F. Overshoot 20% Settling time (ts) . 5 s

LF357. A Large Power BW Amplifier

DS005646-15

For distortion 1% and a 20 Vp-p VOUT swing, power bandwidth is: 500 kHz.

Typical Applications
Settling Time Test Circuit

DS005646-16

Settling time is tested with the LF155/6 connected as unity gain inverter and LF357 connected for AV = 5 FET used to isolate the probe capacitance Output = 10V step AV = 5 for LF357

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Typical Applications

(Continued)

Large Signal Inverter Output, VOUT (from Settling Time Circuit) LF355 LF356 LF357

DS005646-17

DS005646-18

DS005646-19

Low Drift Adjustable Voltage Reference

DS005646-20

VOUT/T= 0.002%/C All resistors and potentiometers should be wire-wound P1: drift adjust P2: VOUT adjust Use LF155 for
j Low IB j Low drift j Low supply current

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Typical Applications

(Continued) Fast Logarithmic Converter

DS005646-21

Dynamic range: 100 A Ii 1 mA (5 decades), |VO|=1V/decade Transient response: 3 s for Ii = 1 decade C1, C2, R2, R3: added dynamic compensation VOS adjust the LF156 to minimize quiescent error RT: Tel Labs type Q81 + 0.3%/C

Precision Current Monitor

DS005646-31

VO =5 R1/R2 (V/mA of IS) R1, R2, R3: 0.1% resistors Use LF155 for
j Common-mode range to supply range j Low IB j Low VOS j Low Supply Current

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Typical Applications

(Continued)

8-Bit D/A Converter with Symmetrical Offset Binary Operation

DS005646-32

R1, R2 should be matched within 0.05% Full-scale response time: 3 s EO +9.920 +0.040 0.040 9.920 B1 B2 B3 B4 B5 B6 B7 B8 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Comments Positive Full-Scale (+) Zero-Scale () Zero-Scale Negative Full-Scale

Wide BW Low Noise, Low Drift Amplifier

DS005646-70

Parasitic input capacitance C1 . (3 pF for LF155, LF156 and LF357 plus any additional layout capacitance) interacts with feedback elements and creates undesirable high frequency pole. To compensate add C2 such that: R2 C2 . R1 C1.

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Typical Applications

(Continued) Boosting the LF156 with a Current Amplifier

DS005646-73

IOUT(MAX).150 mA (will drive RL 100)

No additional phase shift added by the current amplifier

3 Decades VCO

DS005646-24

R1, R4 matched. Linearity 0.1% over 2 decades.

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Typical Applications

(Continued) Isolating Large Capacitive Loads

DS005646-22

Overshoot 6% ts 10 s When driving large CL, the VOUT slew rate determined by CL and IOUT(MAX):

Low Drift Peak Detector

DS005646-23

By adding D1 and Rf, VD1 =0 during hold mode. Leakage of D2 provided by feedback path through Rf. Leakage of circuit is essentially Ib (LF155, LF156) plus capacitor leakage of Cp. Diode D3 clamps VOUT (A1) to VINVD3 to improve speed and to limit reverse bias of D2. Maximum input frequency should be << 12RfCD2 where CD2 is the shunt capacitance of D2.

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Typical Applications

(Continued) Non-Inverting Unity Gain Operation for LF157

DS005646-75

Inverting Unity Gain for LF157

DS005646-25

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Typical Applications

(Continued) High Impedance, Low Drift Instrumentation Amplifier

DS005646-26

System VOS adjusted via A2 VOS adjust Trim R3 to boost up CMRR to 120 dB. Instrumentation amplifier resistor array recommended for best accuracy and lowest drift

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Typical Applications

(Continued) Fast Sample and Hold

DS005646-33

Both amplifiers (A1, A2) have feedback loops individually closed with stable responses (overshoot negligible) Acquisition time TA, estimated by:

LF156 develops full Sr output capability for VIN1V Addition of SW2 improves accuracy by putting the voltage drop across SW1 inside the feedback loop Overall accuracy of system determined by the accuracy of both amplifiers, A1 and A2

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Typical Applications

(Continued) High Accuracy Sample and Hold

DS005646-27

By closing the loop through A2, the VOUT accuracy will be determined uniquely by A1. No VOS adjust required for A2. TA can be estimated by same considerations as previously but, because of the added propagation delay in the feedback loop (A2) the overshoot is not negligible. Overall system slower than fast sample and hold R1, CC: additional compensation Use LF156 for
j Fast settling time j Low VOS

High Q Band Pass Filter

DS005646-28

By adding positive feedback (R2) Q increases to 40 fBP =100 kHz

Clean layout recommended Response to a 1 Vp-p tone burst: 300 s

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Typical Applications

(Continued) High Q Notch Filter

DS005646-34

2R1 = R = 10 M 2C = C1 = 300 pF Capacitors should be matched to obtain high Q fNOTCH = 120 Hz, notch = 55 dB, Q > 100 Use LF155 for
j Low IB j Low supply current

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Physical Dimensions

inches (millimeters) unless otherwise noted

Metal Can Package (H) Order Number LF155H, LF156H, LF356BH, LF356H or LF357H NS Package Number H08C

Small Outline Package (M) Order Number LF356M or LF356MX NS Package Number M08A

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LF155/LF156/LF355/LF356/LF357 JFET Input Operational Amplifiers

Physical Dimensions

inches (millimeters) unless otherwise noted (Continued)

Molded Dual-In-Line Package (N) Order Number LF356N NS Package Number N08E

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