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2020 – today
- 2024
[c126]Ankur Limaye
, Claudio Barone, Nicolas Bohm Agostini, Marco Minutoli, Joseph B. Manzano, Vito Giovanni Castellana, Giovanni Gozzi, Michele Fiorito, Serena Curzel, Fabrizio Ferrandi, Antonino Tumeo:
Towards Automated Generation of Chiplet-Based Systems Invited Paper. ASPDAC 2024: 771-776- [c125]Fabrizio Ferrandi:
High-level synthesis for complex applications: the Bambu approach. CF (Companion) 2024 - [c124]Michele Fiorito, Serena Curzel, Giovanni Gozzi, Fabrizio Ferrandi:
A DNN-based Background Segmentation Accelerator for FPGA-equipped satellites. CF (Companion) 2024 - [c123]Christian Pilato, Subhadeep Banik, Jakub Beránek, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Radim Cmar, Serena Curzel, Fabrizio Ferrandi, Karl F. A. Friebel, Antonella Galizia, Matteo Grasso, Paulo Silva, Jan Martinovic, Gianluca Palermo, Michele Paolino, Andrea Parodi, Antonio Parodi, Fabio Pintus, Raphael Polig, David Poulet, Francesco Regazzoni, Burkhard Ringlein, Roberto Rocco, Katerina Slaninová, Tom Slooff, Stephanie Soldavini, Felix Suchert, Mattia Tibaldi, Beat Weiss, Christoph Hagleitner:
A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach. DATE 2024: 1-6 - [c122]Stephanie Soldavini, Felix Suchert, Serena Curzel, Michele Fiorito, Karl F. A. Friebel, Fabrizio Ferrandi, Radim Cmar, Jerónimo Castrillón, Christian Pilato:
Etna: MLIR-Based System-Level Design and Optimization for Transparent Application Execution on CPU-FPGA Nodes. FCCM 2024: 224 - [c121]Fabrizio Ferrandi, Michele Fiorito, Claudio Barone, Giovanni Gozzi, Serena Curzel:
High-Level Synthesis Developments in the Context of European Space Technology Research (Invited Talk). PARMA-DITAM 2024: 1:1-1:12 - [c120]Claudio Barone, Rishika Kushwah, Ankur Limaye, Vito Giovanni Castellana, Giovanni Gozzi, Michele Fiorito, Fabrizio Ferrandi, Antonino Tumeo:
To Cache or not to Cache? Exploring the Design Space of Tunable, HLS-generated Accelerators. MEMSYS 2024: 210-218 - [i6]Christian Pilato, Subhadeep Banik, Jakub Beránek, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Radim Cmar, Serena Curzel, Fabrizio Ferrandi, Karl F. A. Friebel, Antonella Galizia, Matteo Grasso, Paulo Silva, Jan Martinovic, Gianluca Palermo, Michele Paolino, Andrea Parodi, Antonio Parodi, Fabio Pintus, Raphael Polig, David Poulet, Francesco Regazzoni, Burkhard Ringlein, Roberto Rocco, Katerina Slaninová, Tom Slooff, Stephanie Soldavini, Felix Suchert, Mattia Tibaldi, Beat Weiss, Christoph Hagleitner:
A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach. CoRR abs/2402.12612 (2024) - 2023
- [c119]Vito Giovanni Castellana, Nicolas Bohm Agostini, Ankur Limaye, Vinay Amatya, Marco Minutoli, Joseph B. Manzano, Antonino Tumeo, Serena Curzel, Michele Fiorito, Fabrizio Ferrandi:
Towards On-Chip Learning for Low Latency Reasoning with End-to-End Synthesis. ASP-DAC 2023: 632-638 - [c118]Giovanni Gozzi, Michele Fiorito, Serena Curzel, Fabrizio Ferrandi:
High-Level Synthesis of the OpenMP runtime to improve the generation of parallel accelerators. CF 2023: 209-210 - [c117]Serena Curzel, Michele Fiorito, Patricia López Cueva, Tiago Jorge, Thanassis Tsiodras, Fabrizio Ferrandi:
Exploration of Synthesis Methods from Simulink Models to FPGA for Aerospace Applications. CF 2023: 243-249 - [c116]Nadia Ibellaatti, Edouard Lepape, Alp Kiliç, Kaya Akyel, Kassem Chouayakh, Fabrizio Ferrandi, Claudio Barone, Serena Curzel, Michele Fiorito, Giovanni Gozzi, Miguel Masmano, Ana Risquez Navarro, Manuel Muñoz, Vicente Nicolau Gallego, Patricia López Cueva, Jean-noel Letrillard, Franck Wartel:
HERMES: qualification of High pErformance pRogrammable Microprocessor and dEvelopment of Software ecosystem. DATE 2023: 1-5 - [c115]Luca Ezio Pozzoni, Fabrizio Ferrandi, Loris Mendola, Alfio Antonino Palazzo, Francesco Pappalardo:
Using High-Level Synthesis to model System Verilog procedural timing controls. DATE 2023: 1-6 - [c114]Michele Fiorito, Serena Curzel, Fabrizio Ferrandi:
TrueFloat: A Templatized Arithmetic Library for HLS Floating-Point Operators. SAMOS 2023: 486-493 - [i5]Nadia Ibellaatti, Edouard Lepape, Alp Kiliç, Kaya Akyel, Kassem Chouayakh, Fabrizio Ferrandi, Claudio Barone, Serena Curzel, Michele Fiorito, Giovanni Gozzi, Miguel Masmano, Ana Risquez Navarro, Manuel Muñoz, Vicente Nicolau Gallego, Patricia López Cueva, Jean-noel Letrillard, Franck Wartel:
HERMES: qualification of High pErformance pRogrammable Microprocessor and dEvelopment of Software ecosystem. CoRR abs/2302.06427 (2023) - [i4]Cristina Silvano, Daniele Ielmini, Fabrizio Ferrandi, Leandro Fiorin, Serena Curzel, Luca Benini, Francesco Conti, Angelo Garofalo, Cristian Zambelli, Enrico Calore, Sebastiano Fabio Schifano, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Stefania Perri, Nicola Petra, Davide De Caro, Luciano Lavagno, Teodoro Urso, Valeria Cardellini, Gian Carlo Cardarilli, Robert Birke:
A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms. CoRR abs/2306.15552 (2023) - [i3]Fabrizio Ferrandi, Serena Curzel, Leandro Fiorin, Daniele Ielmini, Cristina Silvano, Francesco Conti, Alessio Burrello, Francesco Barchi, Luca Benini, Luciano Lavagno, Teodoro Urso, Enrico Calore, Sebastiano Fabio Schifano, Cristian Zambelli, Maurizio Palesi, Giuseppe Ascia, Enrico Russo, Nicola Petra, Davide De Caro, Gennaro Di Meo, Valeria Cardellini, Salvatore Filippone, Francesco Lo Presti, Francesco Silvestri, Paolo Palazzari, Stefania Perri:
A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures. CoRR abs/2311.17815 (2023) - 2022
- [j26]Marco Minutoli, Vito Giovanni Castellana, Nicola Saporetti, Stefano Devecchi, Marco Lattuada, Pietro Fezzardi, Antonino Tumeo, Fabrizio Ferrandi:
Svelto: High-Level Synthesis of Multi-Threaded Accelerators for Graph Analytics. IEEE Trans. Computers 71(3): 520-533 (2022) - [j25]Serena Curzel, Nicolas Bohm Agostini, Vito Giovanni Castellana, Marco Minutoli, Ankur Limaye, Joseph B. Manzano, Jeff Zhang, David Brooks, Gu-Yeon Wei, Fabrizio Ferrandi, Antonino Tumeo:
End-to-End Synthesis of Dynamically Controlled Machine Learning Accelerators. IEEE Trans. Computers 71(12): 3074-3087 (2022) - [c113]Serena Curzel, Sofija Jovic, Michele Fiorito, Antonino Tumeo, Fabrizio Ferrandi:
MLIR Loop Optimizations for High-Level Synthesis: A Case Study. PACT 2022: 544-545 - [c112]Serena Curzel, Nicolas Bohm Agostini, Antonino Tumeo, Fabrizio Ferrandi:
Hardware acceleration of complex machine learning models through modern high-level synthesis. CF 2022: 209-210 - [c111]Nicolas Bohm Agostini, Serena Curzel, Ankur Limaye, Vinay Amatya, Marco Minutoli, Vito Giovanni Castellana, Joseph B. Manzano, Antonino Tumeo, Fabrizio Ferrandi:
The SODA approach: leveraging high-level synthesis for hardware/software co-design and hardware specialization: invited. DAC 2022: 1359-1362 - [c110]Serena Curzel, Nicolas Bohm Agostini, Reece Neff, Ankur Limaye, Jeff Jun Zhang, Vinay Amatya, Marco Minutoli, Vito Giovanni Castellana, Joseph B. Manzano, David Brooks, Gu-Yeon Wei, Fabrizio Ferrandi, Antonino Tumeo:
From High-Level Frameworks to custom Silicon with SODA. HCS 2022: 1-13 - [c109]Nicolas Bohm Agostini, Ankur Limaye, Marco Minutoli, Vito Giovanni Castellana, Joseph B. Manzano, Antonino Tumeo, Serena Curzel, Fabrizio Ferrandi:
SODA Synthesizer: An Open-Source, Multi-Level, Modular, Extensible Compiler from High-Level Frameworks to Silicon. ICCAD 2022: 18:1-18:7 - 2021
- [j24]Mattia Tibaldi, Christian Pilato, Fabrizio Ferrandi:
Automatic Generation of Heterogeneous SoC Architectures With Secure Communications. IEEE Embed. Syst. Lett. 13(2): 61-64 (2021) - [c108]Fabrizio Ferrandi, Vito Giovanni Castellana, Serena Curzel, Pietro Fezzardi, Michele Fiorito, Marco Lattuada, Marco Minutoli, Christian Pilato, Antonino Tumeo:
Invited: Bambu: an Open-Source Research Framework for the High-Level Synthesis of Complex Applications. DAC 2021: 1327-1330 - [c107]Emanuele Vitali, Davide Gadioli, Fabrizio Ferrandi, Gianluca Palermo:
Parametric Throughput Oriented Large Integer Multipliers for High Level Synthesis. DATE 2021: 38-41 - [c106]Christian Pilato, Stanislav Böhm, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Vojtech Cima, Radim Cmar, Dionysios Diamantopoulos, Fabrizio Ferrandi, Jan Martinovic, Gianluca Palermo, Michele Paolino, Antonio Parodi, Lorenzo Pittaluga, Daniel Raho, Francesco Regazzoni, Katerina Slaninová, Christoph Hagleitner:
EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms. DATE 2021: 1320-1325 - [c105]Serena Curzel, Nicolas Bohm Agostini, Shihao Song, Ismet Dagli, Ankur Limaye, Cheng Tan, Marco Minutoli, Vito Giovanni Castellana, Vinay Amatya, Joseph B. Manzano, Anup Das, Fabrizio Ferrandi, Antonino Tumeo:
Automated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators. ICCAD 2021: 1-7 - [c104]Vito Giovanni Castellana, Antonino Tumeo, Fabrizio Ferrandi:
High-Level Synthesis of Parallel Specifications Coupling Static and Dynamic Controllers. IPDPS 2021: 192-202 - [i2]Christian Pilato, Stanislav Böhm, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Vojtech Cima, Radim Cmar, Dionysios Diamantopoulos, Fabrizio Ferrandi, Jan Martinovic, Gianluca Palermo, Michele Paolino, Antonio Parodi, Lorenzo Pittaluga, Daniel Raho, Francesco Regazzoni, Katerina Slaninová, Christoph Hagleitner:
EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms. CoRR abs/2103.04185 (2021) - [i1]Serena Curzel, Nicolò Ghielmetti, Michele Fiorito, Fabrizio Ferrandi:
De-specializing an HLS library for Deep Neural Networks: improvements upon hls4ml. CoRR abs/2103.13060 (2021) - 2020
- [j23]Marco Siracusa, Fabrizio Ferrandi:
Tensor Optimization for High-Level Synthesis Design Flows. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 4217-4228 (2020) - [j22]Pietro Fezzardi, Fabrizio Ferrandi:
Automated Bug Detection for High-level Synthesis of Multi-threaded Irregular Applications. ACM Trans. Parallel Comput. 7(4): 27:1-27:26 (2020)
2010 – 2019
- 2019
- [j21]Marco Lattuada, Fabrizio Ferrandi:
A Design Flow Engine for the Support of Customized Dynamic High Level Synthesis Flows. ACM Trans. Reconfigurable Technol. Syst. 12(4): 19:1-19:26 (2019) - [c103]Vito Giovanni Castellana, Marco Minutoli, Antonino Tumeo, Marco Lattuada, Pietro Fezzardi, Fabrizio Ferrandi:
Software defined architectures for data analytics. ASP-DAC 2019: 711-718 - 2018
- [j20]Pietro Fezzardi, Fabrizio Ferrandi, Christian Pilato:
Enabling Automated Bug Detection for IP-Based Designs Using High-Level Synthesis. IEEE Des. Test 35(5): 54-62 (2018) - [j19]Marco Lattuada, Fabrizio Ferrandi, Maxime Perrotin:
Data Transfers Analysis in Computer Assisted Design Flow of FPGA Accelerators for Aerospace Systems. IEEE Trans. Multi Scale Comput. Syst. 4(1): 3-16 (2018) - 2017
- [j18]Marco Lattuada, Fabrizio Ferrandi:
Exploiting vectorization in high level synthesis of nested irregular loops. J. Syst. Archit. 75: 1-14 (2017) - [j17]Pietro Fezzardi, Marco Lattuada, Fabrizio Ferrandi:
Using Efficient Path Profiling to Optimize Memory Consumption of On-Chip Debugging for High-Level Synthesis. ACM Trans. Embed. Comput. Syst. 16(5s): 149:1-149:19 (2017) - 2016
- [j16]Marco Lattuada, Christian Pilato, Fabrizio Ferrandi:
Performance Estimation of Task Graphs Based on Path Profiling. Int. J. Parallel Program. 44(4): 735-771 (2016) - [j15]Razvan Nane, Vlad Mihai Sima, Christian Pilato, Jongsok Choi, Blair Fort, Andrew Canis, Yu Ting Chen, Hsuan Hsiao, Stephen Dean Brown, Fabrizio Ferrandi, Jason Helge Anderson, Koen Bertels:
A Survey and Evaluation of FPGA High-Level Synthesis Tools. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(10): 1591-1604 (2016) - [c102]Marco Minutoli, Vito Giovanni Castellana, Antonino Tumeo, Marco Lattuada, Fabrizio Ferrandi:
Enabling the high level synthesis of data analytics accelerators. CODES+ISSS 2016: 15:1-15:3 - [c101]Marco Minutoli, Vito Giovanni Castellana, Antonino Tumeo, Fabrizio Ferrandi, Marco Lattuada:
A Dynamically Scheduled Architecture for the Synthesis of Graph Database Queries. FCCM 2016: 136 - [c100]Pietro Fezzardi, Fabrizio Ferrandi:
Automated bug detection for pointers and memory accesses in High-Level Synthesis compilers. FPL 2016: 1-9 - [c99]Marco Minutoli, Vito Giovanni Castellana, Antonino Tumeo, Marco Lattuada, Fabrizio Ferrandi:
A dynamically scheduled architecture for the synthesis of graph methods. Hot Chips Symposium 2016: 1-7 - [c98]Marco Minutoli, Vito Giovanni Castellana, Antonino Tumeo, Marco Lattuada, Fabrizio Ferrandi:
Efficient synthesis of graph methods: a dynamically scheduled architecture. ICCAD 2016: 128 - 2015
- [j14]Marco Lattuada, Fabrizio Ferrandi:
Modeling Resolution of Resources Contention in Synchronous Data Flow Graphs. J. Signal Process. Syst. 80(1): 39-47 (2015) - [c97]Marco Lattuada, Fabrizio Ferrandi:
Exploiting Outer Loops Vectorization in High Level Synthesis. ARCS 2015: 31-42 - [c96]Marco Minutoli, Vito Giovanni Castellana, Antonino Tumeo, Fabrizio Ferrandi:
Function Proxies for Improved Resource Sharing in High Level Synthesis. FCCM 2015: 100 - [c95]Marco Minutoli, Vito Giovanni Castellana, Antonino Tumeo, Fabrizio Ferrandi:
Inter-procedural resource sharing in High Level Synthesis through function proxies. FPL 2015: 1-8 - [c94]Marco Lattuada, Fabrizio Ferrandi:
Code Transformations Based on Speculative SDC Scheduling. ICCAD 2015: 71-77 - [c93]Vito Giovanni Castellana, Marco Minutoli, Alessandro Morari, Antonino Tumeo, Marco Lattuada, Fabrizio Ferrandi:
High Level Synthesis of RDF Queries for Graph Analytics. ICCAD 2015: 323-330 - [c92]Pietro Fezzardi, Michele Castellana, Fabrizio Ferrandi:
Trace-based automated logical debugging for high-level synthesis generated circuits. ICCD 2015: 251-258 - 2014
- [c91]Vito Giovanni Castellana, Antonino Tumeo, Fabrizio Ferrandi:
An adaptive Memory Interface Controller for improving bandwidth utilization of hybrid and reconfigurable systems. DATE 2014: 1-4 - [c90]Vito Giovanni Castellana, Antonino Tumeo, Fabrizio Ferrandi:
High-level synthesis of memory bound and irregular parallel applications with Bambu. Hot Chips Symposium 2014: 1 - 2013
- [c89]Fabrizio Ferrandi, Pier Luca Lanzi, Christian Pilato, Donatella Sciuto, Antonino Tumeo:
Ant Colony Optimization for mapping, scheduling and placing in reconfigurable systems. AHS 2013: 47-54 - [c88]Vito Giovanni Castellana, Fabrizio Ferrandi:
Scheduling independent liveness analysis for register binding in high level synthesis. DATE 2013: 1571-1574 - [c87]Christian Pilato, Fabrizio Ferrandi:
Bambu: A modular framework for the high level synthesis of memory-intensive applications. FPL 2013: 1-4 - [c86]Vito Giovanni Castellana, Fabrizio Ferrandi:
An automated flow for the High Level Synthesis of coarse grained parallel applications. FPT 2013: 294-301 - [c85]Silvia Lovergine, Fabrizio Ferrandi:
Dynamic AC-scheduling for hardware cores with unknown and uncertain information. ICCD 2013: 475-478 - [c84]Vito Giovanni Castellana, Fabrizio Ferrandi:
Applications Acceleration through Adaptive Hardware Components. IPDPS Workshops 2013: 2274-2277 - [c83]Silvia Lovergine, Fabrizio Ferrandi:
Harnessing Adaptivity Analysis for the Automatic Design of Efficient Embedded and HPC Systems. IPDPS Workshops 2013: 2298-2301 - [c82]Silvia Lovergine, Antonino Tumeo, Oreste Villa, Fabrizio Ferrandi:
YAPPA: A compiler-based parallelization framework for irregular applications on MPSoCs. RSP 2013: 123-129 - [c81]Marco Lattuada, Fabrizio Ferrandi:
Modeling pipelined application with Synchronous Data Flow graphs. ICSAMOS 2013: 49-55 - 2012
- [c80]Marco Lattuada, Fabrizio Ferrandi:
Performance estimation of embedded software with confidence levels. ASP-DAC 2012: 573-578 - [c79]Silvia Lovergine, Fabrizio Ferrandi:
Instructions activating conditions for hardware-based auto-scheduling. Conf. Computing Frontiers 2012: 253-256 - [c78]Vito Giovanni Castellana, Fabrizio Ferrandi:
Abstract: Speeding-Up Memory Intensive Applications through Adaptive Hardware Accelerators. SC Companion 2012: 1415-1416 - 2011
- [c77]Christian Pilato, Vito Giovanni Castellana, Silvia Lovergine, Fabrizio Ferrandi:
A runtime adaptive controller for supporting hardware components with variable latency. AHS 2011: 153-160 - [c76]Martin Elhøj, André Inácio Reis, Renato P. Ribas, Fabrizio Ferrandi, Christian Pilato, Francesc Moll, Miguel Miranda, Petr Dobrovolný, Nigel Woolaway, Arnaud Grasset, Philippe Bonnot, Giuseppe Desoli, Davide Pandini:
SYNAPTIC Project: Regularity Applied to Enhance Manufacturability and Yield at Several Abstraction Levels. ARCS Workshops 2011 - [c75]Christian Pilato, Fabrizio Ferrandi, Davide Pandini:
Evaluating Static CMOS Complex Cells in Technology Mapping. ARCS Workshops 2011 - [c74]Christian Pilato, Fabrizio Ferrandi, Donatella Sciuto:
A design methodology to implement memory accesses in high-level synthesis. CODES+ISSS 2011: 49-58 - [c73]Christian Pilato, Fabrizio Ferrandi, Davide Pandini:
A design methodology for the automatic sizing of standard-cell libraries. ACM Great Lakes Symposium on VLSI 2011: 151-156 - 2010
- [j13]Koen Bertels, Vlad Mihai Sima, Yana Yankova, Georgi Kuzmanov, Wayne Luk, José Gabriel F. Coutinho, Fabrizio Ferrandi, Christian Pilato, Marco Lattuada, Donatella Sciuto, Andrea Michelotti:
HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms. IEEE Micro 30(5): 88-97 (2010) - [j12]Fabrizio Ferrandi, Pier Luca Lanzi, Christian Pilato, Donatella Sciuto, Antonino Tumeo:
Ant Colony Heuristic for Mapping and Scheduling Tasks and Communications on Heterogeneous Embedded Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(6): 911-924 (2010) - [c72]Marco Lattuada, Fabrizio Ferrandi:
Combining Target-independent Analysis with Dynamic Profiling to Build the Performance Model of a DSP. CIT 2010: 1895-1901 - [c71]Fabrizio Ferrandi, Christian Pilato, Donatella Sciuto, Antonino Tumeo:
Mapping and scheduling of parallel C applications with ant colony optimization onto heterogeneous reconfigurable MPSoCs. ASP-DAC 2010: 799-804 - [c70]Marco Lattuada, Fabrizio Ferrandi:
Performance modeling of embedded applications with zero architectural knowledge. CODES+ISSS 2010: 277-286 - [c69]Antonino Tumeo, Francesco Regazzoni, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto:
A reconfigurable multiprocessor architecture for a reliable face recognition implementation. DATE 2010: 319-322 - [c68]Marco Ceriani, Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto, Antonino Tumeo:
Multiprocessor systems-on-chip synthesis using multi-objective evolutionary computation. GECCO 2010: 1267-1274 - [c67]Christian Pilato, Fabrizio Ferrandi, Davide Pandini:
A Fast Heuristic for Extending Standard Cell Libraries with Regular Macro Cells. ISVLSI 2010: 23-28 - [c66]Marco Lattuada, Fabrizio Ferrandi:
Fine grain analysis of simulators accuracy for calibrating performance models. International Symposium on Rapid System Prototyping 2010: 1-7
2000 – 2009
- 2009
- [c65]Antonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto:
Prototyping pipelined applications on a heterogeneous FPGA multiprocessor virtual platform. ASP-DAC 2009: 317-322 - [c64]Antonino Tumeo, Marco Branca, Lorenzo Camerini, Christian Pilato, Pier Luca Lanzi, Fabrizio Ferrandi, Donatella Sciuto:
Mapping pipelined applications onto heterogeneous embedded systems: a bayesian optimization algorithm based approach. CODES+ISSS 2009: 443-452 - [c63]Antonino Tumeo, Christian Pilato, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto:
HW/SW methodologies for synchronization in FPGA multiprocessors. FPGA 2009: 265-268 - [c62]Marco Branca, Lorenzo Camerini, Fabrizio Ferrandi, Pier Luca Lanzi, Christian Pilato, Donatella Sciuto, Antonino Tumeo:
Evolutionary algorithms for the mapping of pipelined applications onto heterogeneous embedded systems. GECCO 2009: 1435-1442 - [c61]Antonino Tumeo, Simone Borgio, Davide Bosisio, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto:
A multiprocessor self-reconfigurable JPEG2000 encoder. IPDPS 2009: 1-8 - [c60]Muhammad Rashid, Fabrizio Ferrandi, Koen Bertels:
hArtes design flow for heterogeneous platforms. ISQED 2009: 330-338 - [c59]Marco Lattuada, Christian Pilato, Antonino Tumeo, Fabrizio Ferrandi:
Performance modeling of parallel applications on MPSoCs. SoC 2009: 64-67 - [c58]Fabrizio Ferrandi, Marco Lattuada, Christian Pilato, Antonino Tumeo:
Performance estimation for task graphs combining sequential path profiling and control dependence regions. MEMOCODE 2009: 131-140 - 2008
- [j11]Christian Pilato, Antonino Tumeo, Gianluca Palermo, Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto:
Improving evolutionary exploration to area-time optimization of FPGA designs. J. Syst. Archit. 54(11): 1046-1057 (2008) - [c57]Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto:
Lightweight DMA management mechanisms for multiprocessors on FPGA. ASAP 2008: 275-280 - [c56]Christian Pilato, Daniele Loiacono, Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto:
High-level synthesis with multi-objective genetic algorithm: A comparative encoding analysis. IEEE Congress on Evolutionary Computation 2008: 3334-3341 - [c55]Antonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto:
A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications. DATE 2008: 1039-1044 - [c54]Fabrizio Ferrandi, Pier Luca Lanzi, Daniele Loiacono, Christian Pilato, Donatella Sciuto:
A Multi-objective Genetic Algorithm for Design Space Exploration in High-Level Synthesis. ISVLSI 2008: 417-422 - [c53]Antonino Tumeo, Christian Pilato, Fabrizio Ferrandi, Donatella Sciuto, Pier Luca Lanzi:
Ant colony optimization for mapping and scheduling in heterogeneous multiprocessor systems. ICSAMOS 2008: 142-149 - 2007
- [c52]Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto:
A Self-Reconfigurable Implementation of the JPEG Encoder. ASAP 2007: 24-29 - [c51]Christian Pilato, Gianluca Palermo, Antonino Tumeo, Fabrizio Ferrandi, Donatella Sciuto, Pier Luca Lanzi:
Fitness inheritance in evolutionary and multi-objective high-level synthesis. IEEE Congress on Evolutionary Computation 2007: 3459-3466 - [c50]Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto:
A design kit for a fully working shared memory multiprocessor on FPGA. ACM Great Lakes Symposium on VLSI 2007: 219-222 - [c49]Fabrizio Ferrandi, Luca Fossati, Marco Lattuada, Gianluca Palermo, Donatella Sciuto, Antonino Tumeo:
Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs. IESS 2007: 179-192 - [c48]Angelo P. E. Rosiello, Fabrizio Ferrandi, Davide Pandini, Donatella Sciuto:
A Hash-based Approach for Functional Regularity Extraction During Logic Synthesis. ISVLSI 2007: 92-97 - [c47]Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto:
A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs. ISVLSI 2007: 331-336 - [c46]Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto:
An Internal Partial Dynamic Reconfiguration Implementation of the JPEG Encoder for Low-Cost FPGAsb. ISVLSI 2007: 449-450 - [c45]Simone Corbetta, Fabrizio Ferrandi, Massimo Morandi, Marco Novati, Marco D. Santambrogio, Donatella Sciuto:
Two Novel Approaches to Online Partial Bitstream Relocation in a Dynamically Reconfigurable System. ISVLSI 2007: 457-458 - [c44]Antonino Tumeo, Marco Branca, Lorenzo Camerini, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto:
An Interrupt Controller for FPGA-based Multiprocessors. ICSAMOS 2007: 82-87 - [c43]Fabrizio Ferrandi, Pier Luca Lanzi, Gianluca Palermo, Christian Pilato, Donatella Sciuto, Antonino Tumeo:
An Evolutionary Approach to Area-Time Optimization of FPGA designs. ICSAMOS 2007: 145-152 - [c42]Angelo P. E. Rosiello, Engin Kirda, Christopher Kruegel, Fabrizio Ferrandi:
A layout-similarity-based approach for detecting phishing pages. SecureComm 2007: 454-463 - 2006
- [c41]Roberto Cordone, Fabrizio Ferrandi, Marco D. Santambrogio, Gianluca Palermo, Donatella Sciuto:
Using speculative computation and parallelizing techniques to improve scheduling of control based designs. ASP-DAC 2006: 898-904 - [c40]Carlo Amicucci, Fabrizio Ferrandi, Marco D. Santambrogio, Donatella Sciuto:
SyCERS: a SystemC Design Exploration Framework for SoC Reconfigurable Architecture. ERSA 2006: 63-69 - [c39]Francesco Bruschi, Fabrizio Ferrandi:
A SystemC-based Framework of Communication Architecture. FDL 2006: 319-327 - [c38]Fabrizio Ferrandi, Giovanna Ferrara, Roberto Palazzo, Vincenzo Rana, Marco D. Santambrogio:
VHDL to FPGA automatic IP-Core generation: a case study on Xilinx design flow. IPDPS 2006 - [c37]Fabrizio Ferrandi, Marco Novati, Massimo Morandi, Marco D. Santambrogio, Donatella Sciuto:
Dynamic Reconfiguration: Core Relocation via Partial Bitstreams Filtering with Minimal Overhead. SoC 2006: 1-4 - [c36]Tiziana Gravagnoli, Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto:
Automatic Test Pattern Generation with BOA. PPSN 2006: 423-432 - [c35]Simone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo:
Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA. ICSAMOS 2006: 107-114 - 2005
- [j10]Francesco Bruschi, Fabrizio Ferrandi, Donatella Sciuto:
A Framework for the Functional Verification of SystemC Models. Int. J. Parallel Program. 33(6): 667-695 (2005) - [c34]Alberto Donato, Fabrizio Ferrandi, Massimo Redaelli, Marco D. Santambrogio, Donatella Sciuto:
Caronte: A Complete Methodology for the Implementation of Partially Dynamically Self-Reconfiguring Systems on FPGA Platforms. FCCM 2005: 321-322 - [c33]Fabrizio Ferrandi, Marco D. Santambrogio, Donatella Sciuto:
A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture. IPDPS 2005 - [c32]Alberto Donato, Fabrizio Ferrandi, Marco D. Santambrogio, Donatella Sciuto:
Operating system support for dynamically reconfigurable SoC architectures. SoCC 2005: 233-238 - [c31]Alberto Donato, Fabrizio Ferrandi, Massimo Redaelli, Marco D. Santambrogio, Donatella Sciuto:
Caronte: A methodology for the Implementation of Partially dynamically Self-Reconfiguring Systems on FPGA Platforms. VLSI-SoC 2005: 87-109 - 2004
- [c30]Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto, Mara Tanelli:
System-level metrics for hardware/software architectural mapping. DELTA 2004: 231-236 - [c29]Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto:
System Level Hardware-Software Design Exploration with XCS. GECCO (2) 2004: 763-773 - 2003
- [j9]Fabrizio Ferrandi, Franco Fummi, Graziano Pravadelli, Donatella Sciuto:
Identification of design errors through functional testing. IEEE Trans. Reliab. 52(4): 400-412 (2003) - [c28]Fabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto:
Mining interesting patterns from hardware-software codesign data with the learning classifier system XCS. IEEE Congress on Evolutionary Computation 2003: 1486-1492 - [c27]Francesco Bruschi, Fabrizio Ferrandi:
Synthesis of Complex Control Structures from Behavioral SystemC Models. DATE 2003: 20112-20119 - 2002
- [j8]Giuseppe Biasoli, Fabrizio Ferrandi, Alessandro Fin, Franco Fummi, Donatella Sciuto:
Behavioral test generation for the selection of BIST logic. J. Syst. Archit. 47(10): 821-829 (2002) - [j7]Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto:
Test Generation and Testability Alternatives Exploration of Critical Algorithms for Embedded Applications. IEEE Trans. Computers 51(2): 200-215 (2002) - [c26]Fabrizio Ferrandi, Michele Rendine, Donatella Sciuto:
Functional Verification for SystemC Descriptions Using Constraint Solving. DATE 2002: 744-751 - [c25]Francesco Bruschi, Michele Chiamenti, Fabrizio Ferrandi, Donatella Sciuto:
Error Simulation Based on the SystemC Design Description Language. DATE 2002: 1135 - 2001
- [j6]Anna Antola, Fabrizio Ferrandi, Vincenzo Piuri, Mariagiovanna Sami:
Semiconcurrent Error Detection in Data Paths. IEEE Trans. Computers 50(5): 449-465 (2001) - [j5]Roberto Cordone, Fabrizio Ferrandi, Donatella Sciuto, Roberto Wolfler Calvo:
An efficient heuristic approach to solve the unate covering problem. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(12): 1377-1388 (2001) - [c24]Fabrizio Ferrandi, G. Ferrara, Donatella Sciuto, Alessandro Fin, Franco Fummi:
Functional test generation for behaviorally sequential models. DATE 2001: 403-410 - 2000
- [j4]Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino, Donatella Sciuto:
Symbolic optimization of interacting controllers based onredundancy identification and removal. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(7): 760-772 (2000) - [c23]Roberto Cordone, Fabrizio Ferrandi, Donatella Sciuto, Roberto Wolfler Calvo:
An Efficient Heuristic Approach to Solve the Unate Covering Problem. DATE 2000: 364-371 - [c22]Giuseppe Biasoli, Fabrizio Ferrandi, Donatella Sciuto, Alessandro Fin, Franco Fummi:
BIST Architectures Selection Based on Behavioral Testing. DFT 2000: 292-298 - [c21]M. Beardo, Francesco Bruschi, Fabrizio Ferrandi, Donatella Sciuto:
An approach to functional testing of VLIW architectures. HLDVT 2000: 29-33 - [c20]Fabrizio Ferrandi, Donatella Sciuto, Alessandro Fin, Franco Fummi:
An Application of Genetic Algorithms and BDDs to Functional Testing. ICCD 2000: 48-56 - [c19]Fabrizio Ferrandi, G. Fornara, Donatella Sciuto, G. Ferrara, Franco Fummi:
Testability Alternatives Exploration through Functional Testing. VTS 2000: 423-430
1990 – 1999
- 1999
- [c18]Fabrizio Ferrandi, Franco Fummi, Luca Gerli, Donatella Sciuto:
Symbolic Functional Vector Generation for VHDL Specifications. DATE 1999: 442- - [c17]Marco Brera, Fabrizio Ferrandi, Donatella Sciuto, Franco Fummi:
Increase the Behavioral Fault Model Accuracy Using High-Level Synthesis Information. DFT 1999: 174-180 - 1998
- [c16]Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino:
Power Estimation of Behavioral Descriptions. DATE 1998: 762-766 - [c15]F. S. Bietti, Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto:
VHDL Testability Analysis Based on Fault Clustering and Implicit Fault Injection. Great Lakes Symposium on VLSI 1998: 237-242 - [c14]Fabrizio Ferrandi, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi, Fabio Somenzi:
Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits. ICCAD 1998: 235-241 - [c13]D. Corvino, Italo Epicoco, Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto:
Automatic VHDL restructuring for RTL synthesis optimization and testability improvement. ICCD 1998: 436-441 - [c12]Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto:
Implicit test generation for behavioral VHDL models. ITC 1998: 587-596 - 1997
- [j3]Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto, Enrico Macii, Massimo Poncino:
Testing Core-Based Systems: A Symbolic Methodology. IEEE Des. Test Comput. 14(4): 69-77 (1997) - [c11]Massimo Bombana, Patrizia Cavalloro, Fabrizio Ferrandi:
Property verification in the design of telecom applications. ASP-DAC 1997: 167-172 - [c10]Fabrizio Ferrandi, Franco Fummi, Laura Pozzi, Mariagiovanna Sami:
Configuration-Specific Test Pattern Extraction for Field Programmable Gate Arrays. DFT 1997: 85-93 - [c9]Giacomo Buonanno, Fabrizio Ferrandi, L. Ferrandi, Franco Fummi, Donatella Sciuto:
How an "Evolving" Fault Model Improves the Behavioral Test Generation. Great Lakes Symposium on VLSI 1997: 124- - [c8]M. Bacis, Giacomo Buonanno, Fabrizio Ferrandi, Franco Fummi, Luca Gerli, Donatella Sciuto:
Application of a Testing Framework to VHDL Descriptions at Different Abstraction Levels. ICCD 1997: 654-658 - 1996
- [c7]Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino, Donatella Sciuto:
Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques. DAC 1996: 467-470 - [c6]Enrico Macii, Massimo Poncino, Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto:
BDD-based testability estimation of VHDL designs. EURO-DAC 1996: 444-449 - [c5]Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino, Donatella Sciuto:
Test Generation for Networks of Interacting FSMs Using Symbolic Techniques. Great Lakes Symposium on VLSI 1996: 208-213 - [c4]Roberto Bevacqua, Luca Guerrazzi, Fabrizio Ferrandi, Franco Fummi:
Implicit Test Sequences Compaction for Decreasing Test Application Cos. ICCD 1996: 384-382 - 1995
- [c3]Giacomo Buonanno, Fabrizio Ferrandi, Donatella Sciuto:
Data Path Testability Analysis Based on BDDs. ISCAS 1995: 2012-2014 - 1994
- [j2]Fabrizio Ferrandi:
Reduction of fault detection costs through a BDD formalism. Microprocess. Microprogramming 40(10-12): 841-844 (1994) - [j1]Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza:
ALADIN: a multilevel testability analyzer for VLSI system design. IEEE Trans. Very Large Scale Integr. Syst. 2(2): 157-171 (1994) - 1993
- [c2]Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza:
Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks. DFT 1993: 223-230 - [c1]Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza:
An Expert Solution to Functional Testability Analysis of VLSI Circuits. SEKE 1993: 263-265
Coauthor Index
[c89] [c74] [j13] [j12] [c71] [c69] [c68] [c65] [c64] [c63] [c62] [c61] [j11] [c57] [c56] [c55] [c54] [c53] [c52] [c51] [c50] [c49] [c48] [c47] [c46] [c45] [c44] [c43] [c41] [c40] [c37] [c36] [c35] [j10] [c34] [c33] [c32] [c31] [c30] [c29] [j9] [c28] [j8] [j7] [c26] [c25] [j5] [c24] [j4] [c23] [c22] [c21] [c20] [c19] [c18] [c17] [c15] [c13] [c12] [j3] [c9] [c8] [c7] [c6] [c5] [c3] [j1] [c2] [c1]
[c126] [c120] [c119] [j26] [j25] [c113] [c112] [c111] [c110] [c109] [c108] [c105] [c104] [c103] [c102] [c101] [c99] [c98] [c96] [c95] [c93] [c91] [c90] [c89] [c82] [j12] [c71] [c69] [c68] [c65] [c64] [c63] [c62] [c61] [c59] [c58] [j11] [c57] [c55] [c53] [c52] [c51] [c50] [c49] [c47] [c46] [c44] [c43] [c35]
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