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Supporting ada memory management in the iAPX-432

Authors:

Fred J. Pollack,

Dan W. Hammerstrom,

Konrad K. Lai, and

Justin R. RattnerAuthors Info & Claims

ACM SIGARCH Computer Architecture News, Volume 10, Issue 2

Pages 117 - 131

https://doi.org/10.1145/964750.801835

Published: 01 March 1982 Publication History

Abstract

In this paper, we describe how the memory management mechanisms of the Intel iAPX-432 are used to implement the visibility rules of Ada. At any point in the execution of an Ada® program on the 432, the program has a protected address space that corresponds exactly to the program's accessibility at the corresponding point in the program's source. This close match of architecture and language did not occur because the 432 was designed to execute Ada—it was not. Rather, both Ada and the 432 are the result of very similar design goals.

To illustrate this point, we compare, in their support for Ada, the memory management mechanisms of the 432 to those of traditional computers. The most notable differences occur in heap-space management and multitasking. With respect to the former, we describe a degree of hardware/software cooperation that is not typical of other systems. In the latter area, we show how Ada's view of sharing is the same as the 432, but differs totally from the sharing permitted by traditional systems. A description of these differences provide some insight into the problems of implementing an Ada compiler for a traditional architecture.

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Woodruff JJoannou AXia HFox ANorton RChisnall DDavis BGudka KFilardo NMarkettos ARoe MNeumann PWatson RMoore S(2019)CHERI Concentrate: Practical Compressed CapabilitiesIEEE Transactions on Computers10.1109/TC.2019.291403768:10(1455-1469)Online publication date: 1-Oct-2019
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Woodruff JWatson RChisnall DMoore SAnderson JDavis BLaurie BNeumann PNorton RRoe MYew PZhai AKeckler S(2014)The CHERI capability modelProceeding of the 41st annual international symposium on Computer architecuture10.5555/2665671.2665740(457-468)Online publication date: 14-Jun-2014
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Index Terms

Supporting ada memory management in the iAPX-432
1. Applied computing
  1. Computers in other domains
    1. Personal computers and PC applications
      1. Microcomputers
2. Software and its engineering
  1. Software notations and tools
    1. General programming languages
      1. Language types
  2. Software organization and properties
    1. Contextual software domains
      1. Operating systems
        Memory management
        Garbage collection

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Published In

cover image ACM SIGARCH Computer Architecture News

ACM SIGARCH Computer Architecture News Volume 10, Issue 2

March 1982

209 pages

ISSN:0163-5964

DOI:10.1145/964750

Issue’s Table of Contents

ASPLOS I: Proceedings of the first international symposium on Architectural support for programming languages and operating systems
March 1982
209 pages
ISBN:0897910664
DOI:10.1145/800050
Chairmen:
David R. Ditzel,
Lloyd I. Dickman

Copyright © 1982 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 March 1982

Published in SIGARCH Volume 10, Issue 2

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Cited By

Woodruff JJoannou AXia HFox ANorton RChisnall DDavis BGudka KFilardo NMarkettos ARoe MNeumann PWatson RMoore S(2019)CHERI Concentrate: Practical Compressed CapabilitiesIEEE Transactions on Computers10.1109/TC.2019.291403768:10(1455-1469)Online publication date: 1-Oct-2019
https://doi.org/10.1109/TC.2019.2914037
Woodruff JWatson RChisnall DMoore SAnderson JDavis BLaurie BNeumann PNorton RRoe MYew PZhai AKeckler S(2014)The CHERI capability modelProceeding of the 41st annual international symposium on Computer architecuture10.5555/2665671.2665740(457-468)Online publication date: 14-Jun-2014
https://dl.acm.org/doi/10.5555/2665671.2665740
Woodruff JWatson RChisnall DMoore SAnderson JDavis BLaurie BNeumann PNorton RRoe M(2014)The CHERI capability modelACM SIGARCH Computer Architecture News10.1145/2678373.266574042:3(457-468)Online publication date: 14-Jun-2014
https://dl.acm.org/doi/10.1145/2678373.2665740
Woodruff JWatson RChisnall DMoore SAnderson JDavis BLaurie BNeumann PNorton RRoe M(2014)The CHERI capability model: Revisiting RISC in an age of risk2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA)10.1109/ISCA.2014.6853201(457-468)Online publication date: Jun-2014
https://doi.org/10.1109/ISCA.2014.6853201
Vajda F(1986)Supermicros—objectives and approachesMicroprocessing and Microprogramming10.1016/0165-6074(86)90136-517:1(1-17)Online publication date: 1-Jan-1986
https://dl.acm.org/doi/10.1016/0165-6074%2886%2990136-5
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