ACM Transactions on Design Automation of Electronic Systems

Jiang Hu

Texas A&M University

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Tsung-Yi Ho

The Chinese University of Hong Kong

Biological System, Hardware Security, Machine Learning, Microfluidics, Testing

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Prabhat Mishra

University of Florida

System-on-Chip Validation, Formal Verification, Hardware Security, Embedded Systems, Explainable AI, Quantum Computing

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Ann Franchesca Laguna

De La Salle University

hardware-software co-design of machine learning, bioinformatics, and digital signal processing applications

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Iris Bahar

Colorado School of Mines

energy-efficient computing, reliable computing, machine learning hardware acceleration, memory system design, approximate computing

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Laleh Behjat

University of Calgary

Physical Design of Integrated Circuits, Placement, Routing, Clock Network Synthesis, Large-scale mathematical optimization, Machine Learning, Equity diversity and inclusion in engineering

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Ismail Bustany

AMD

physical design, computationally efficient optimization algorithms, MLCAD, optimization languages, sparse matrix computations, hypergraph partitioning, and hardware acceleration

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Jeronimo Castrillon Mazo

TU Dresden

Compilers, Programming Models, Heterogeneous Systems, Emerging Computing, Design-space exploration, Domain-specific Languages, Parallel Computing, Embedded and Cyber-physical Systems

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Abhijit Chatterjee

Georgia Institute of Technology

Testing; Mixed-Signal/RF Design-for-testability, BIST, Self-Healing; Verification-Validation; Error-Resilient Systems and Failure Tolerance; Trustworthy, Secure and Error-Tolerant Machine Learning Algorithms and Architectures

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Shao-Yun Fang

National Taiwan University of Science and Technology

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Siddharth Garg

New York University

Hardware security, AI/ML accelerators, ML for EDA, Adversarial AI, Energy-efficient and robust architectures

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Jingtong Hu

University of Pittsburgh

Hardware/Software Co-design, Embedded Systems, On-Device AI, Digital Health

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Andre Ivanov

University of British Columbia

digital systems test, design for testability, built-in self-test, electronic systems test automation, reliability, silicon lifecycle management

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Lana Josipovic

ETH Zurich

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Yibo Lin

Peking University

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Zhonghai Lu

KTH Royal Institute of Technology

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Guojie Luo

Peking University

hardware synthesis, reconfigurable architecture, edge computing

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Nele Mentens

Katholieke Universiteit Leuven

hardware security, embedded security, FPGA security

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Sule Ozev

Arizona State University

Self-test and Self-calibration for wireless transceivers, analysis and mitigation of process variations for mixed-signal and digital circuits, fault-tolerant and reconfigurable heterogeneous systems, mixed-signal circuit testing.

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Maurizio Palesi

University of Catania

network-on-chip, approximate computing, domain specific accelerators, multi-chip-module-based systems

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Hammond Pearce

University of New South Wales

Hardware Security, Bug finding in hardware RTL, Bug repair in hardware RTL, AI for hardware RTL

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Irith Pomeranz

Purdue University

VLSI circuits, design for testability, synthesis and design verification

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Gang Qu

University of Maryland

hardware security, low power design, energy optimization, embedded system and IoT

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Gang Quan

Florida International University

real-time embedded systems, power/thermal awareness, cloud computing, privacy-preserving computing for the deep neural network

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Ahmad-Reza Sadeghi

Technische Universität Darmstadt

Systems Security, Trusted Computing, Security Architectures, Hardware Security, IoT Security & Privacy, ML Security, Secure Computation

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Ioannis Savidis

Drexel University

Physical design automation, AI/ML for EDA, CAD for analog and mixed-signal circuits, hardware security

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Ulf Schlichtmann

Technical University of Munich

CAD for Reliability, Robustness, Timing, Emerging Technologies (Photonics, Microfluidic Biochips), Neuromorphic Computing

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Muhammad Shafique

NYU Abu Dhabi

Brain-inspired Computing, Embedded Machine Learning and AI, Energy-Efficient Computing, Robust Computing, Fault-Tolerant and Secure Hardware, MPSoCs, FPGAs, Embedded Systems for CPS & IoT, tinyML, EdgeAI, Adversarial ML, AI Accelerators, Memory Optimizations, Embedded AI for Robotics and Healthcare

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Dirk Stroobandt

Ghent University

Physical design (placement and routing), Reconfigurable computing, FPGA architectures, Interconnection-aware design

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Yu Wang

Tsinghua University

NN Accelerator, EDA for PIM, Multi-agent System

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Wujie Wen

North Carolina State University

software-hardware co-design for efficient and reliable computing, secure and private computing, machine learning, cyber-physical systems

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Xiaoqing Xu

Google DeepMind

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Hailong Yao

University of Science and Technology Beijing

VLSI physical design, high-level synthesis and compilation tool chain for AI chips; EDA for microfluidics

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Yang Yi

Virginia Tech

Neuromorphic Computing, Artificial Intelligence Chip Design, Emerging Nano-device, 3D Integration, Machine learning for next-G Communications

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Bei Yu

The Chinese University of Hong Kong

deep learning, physical design, mask optimization

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Pingqiang Zhou

Shanghai Tech

2.5D/3D IC, AI for EDA, domain-specific accelerators, hardware security and AI security

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Cheng Zhuo

Zhejiang University

Power and signal integrity, physical design, computing in memory

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Clarissa Nemeth

KGL Editorial

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