research-article

Hardware Security for and beyond CMOS Technology

Author:

Johann KnechtelAuthors Info & Claims

ISPD '21: Proceedings of the 2021 International Symposium on Physical Design

Pages 115 - 126

https://doi.org/10.1145/3439706.3446902

Published: 21 March 2021 Publication History

Abstract

As with most aspects of electronic systems and integrated circuits, hardware security has traditionally evolved around the dominant CMOS technology. However, with the rise of various emerging technologies, whose main purpose is to overcome the fundamental limitations for scaling and power consumption of CMOS technology, unique opportunities arise to advance the notion of hardware security. In this paper, I first provide an overview on hardware security in general. Next, I review selected emerging technologies, namely (i) spintronics, (ii) memristors, (iii) carbon nanotubes and related transistors, (iv) nanowires and related transistors, and (v) 3D and 2.5D integration. I then discuss their application to advance hardware security and also outline related challenges.

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Cited By

Bhandari JGopinath JAshraf MKnechtel JSinanoglu OKarri R(2024)Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)10.1109/APCCAS62602.2024.10808337(466-470)Online publication date: 7-Nov-2024
https://doi.org/10.1109/APCCAS62602.2024.10808337
Srinivas MElango K(2024)Era of Sentinel Tech: Charting Hardware Security Landscapes Through Post-Silicon Innovation, Threat Mitigation and Future TrajectoriesIEEE Access10.1109/ACCESS.2024.340062412(68061-68108)Online publication date: 2024
https://doi.org/10.1109/ACCESS.2024.3400624
Suzano JAbouzeid FDi Natale GPhilippe ARoche P(2024)On Hardware Security and Trust for Chiplet-Based 2.5D and 3D ICs: Challenges and InnovationsIEEE Access10.1109/ACCESS.2024.336815212(29778-29794)Online publication date: 2024
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Index Terms

Hardware Security for and beyond CMOS Technology
1. Hardware
  1. Emerging technologies
2. Security and privacy
  1. Security in hardware

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cover image ACM Conferences

ISPD '21: Proceedings of the 2021 International Symposium on Physical Design

March 2021

159 pages

ISBN:9781450383004

DOI:10.1145/3439706

General Chair:
Jens Lienig
Dresden University of Technology, Germany
,
Program Chairs:
Laleh Behjat
University of Calgary, Canada
,
Stephen Yang
USA

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Cited By

Bhandari JGopinath JAshraf MKnechtel JSinanoglu OKarri R(2024)Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)10.1109/APCCAS62602.2024.10808337(466-470)Online publication date: 7-Nov-2024
https://doi.org/10.1109/APCCAS62602.2024.10808337
Srinivas MElango K(2024)Era of Sentinel Tech: Charting Hardware Security Landscapes Through Post-Silicon Innovation, Threat Mitigation and Future TrajectoriesIEEE Access10.1109/ACCESS.2024.340062412(68061-68108)Online publication date: 2024
https://doi.org/10.1109/ACCESS.2024.3400624
Suzano JAbouzeid FDi Natale GPhilippe ARoche P(2024)On Hardware Security and Trust for Chiplet-Based 2.5D and 3D ICs: Challenges and InnovationsIEEE Access10.1109/ACCESS.2024.336815212(29778-29794)Online publication date: 2024
https://doi.org/10.1109/ACCESS.2024.3368152
Kumar RDivyanshu DKhan DAmara SMassoud Y(2023)Polymorphic Hybrid CMOS-MTJ Logic Gates for Hardware Security ApplicationsElectronics10.3390/electronics1204090212:4(902)Online publication date: 10-Feb-2023
https://doi.org/10.3390/electronics12040902
Eslami MKnechtel JSinanoglu OKarri RPagliarini SChinnery DHui-Ru Jiang I(2023)Benchmarking Advanced Security Closure of Physical LayoutsProceedings of the 2023 International Symposium on Physical Design10.1145/3569052.3578924(256-264)Online publication date: 26-Mar-2023
https://dl.acm.org/doi/10.1145/3569052.3578924
Kumar RDivyanshu DKhan DAmara SMassoud Y(2022)Spin Orbit Torque-Assisted Magnetic Tunnel Junction-Based Hardware TrojanElectronics10.3390/electronics1111175311:11(1753)Online publication date: 31-May-2022
https://doi.org/10.3390/electronics11111753
Knechtel JGopinath JAshraf MBhandari JSinanoglu OKarri RBehjat LYang S(2022)Benchmarking Security Closure of Physical LayoutsProceedings of the 2022 International Symposium on Physical Design10.1145/3505170.3511046(221-228)Online publication date: 13-Apr-2022
https://dl.acm.org/doi/10.1145/3505170.3511046
Lienig JRothe SThiele MRangarajan NAshraf MNabeel MAmrouch HSinanoglu OKnechtel J(2021)Toward Security Closure in the Face of Reliability Effects ICCAD Special Session Paper2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)10.1109/ICCAD51958.2021.9643447(1-9)Online publication date: 1-Nov-2021
https://doi.org/10.1109/ICCAD51958.2021.9643447
Aljafar MAcken J(2021)Survey on the benefits of using memristors for PUFsInternational Journal of Parallel, Emergent and Distributed Systems10.1080/17445760.2021.197229537:1(40-67)Online publication date: 6-Sep-2021
https://doi.org/10.1080/17445760.2021.1972295

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