research-article

Persistent Memory: A Survey of Programming Support and Implementations

Authors:

Alexandro Baldassin,

Daniel Castro, and

Paolo RomanoAuthors Info & Claims

ACM Computing Surveys (CSUR), Volume 54, Issue 7

Article No.: 152, Pages 1 - 37

https://doi.org/10.1145/3465402

Published: 18 July 2021 Publication History

Abstract

The recent rise of byte-addressable non-volatile memory technologies is blurring the dichotomy between memory and storage. In particular, they allow programmers to have direct access to persistent data instead of relying on traditional interfaces, such as file and database systems. However, they also bring new challenges, as a failure may render the program in an unrecoverable and inconsistent state. Consequently, a lot of effort has been put by both industry and academia into making the task of programming with such memories easier while, at the same time, efficient from the runtime perspective. This survey summarizes such a body of research, from the abstractions to the implementation level. As persistent memory is starting to appear commercially, the state-of-the-art research condensed here will help investigators to quickly stay up to date while also motivating others to pursue research in the field.

References

[1]

Hiroyuki Akinaga and Hisashi Shima. 2010. Resistive random access memory (ReRAM) based on metal oxides. Proc. IEEE 98, 12 (Dec. 2010), 2237–2251.

[2]

Dmytro Apalkov, Alexey Khvalkovskiy, Steven Watts, Vladimir Nikitin, Xueti Tang, Daniel Lottis, Kiseok Moon, Xiao Luo, Eugene Chen, Adrian Ong, Alexander Driskill-Smith, and Mohamad Krounbi. 2013. Spin-transfer torque magnetic random access memory (STT-MRAM). ACM J. Emerg. Technol. Comput. Syst. 9, 2 (May 2013), 13:1–13:35.

Digital Library

[3]

Malcolm Atkinson, Ken Chisholm, Paul Cockshott, and Richard Marshall. 1983. Algorithms for a persistent heap. Softw.: Pract. Exper. 13, 3 (1983), 259–271.

[4]

Malcolm Atkinson and Ronald Morrison. 1995. Orthogonally persistent object systems. VLDB J. 4, 3 (July 1995), 319–402.

[5]

M. P. Atkinson, P. J. Bailey, K. J. Chisholm, P. W. Cockshott, and R. Morrison. 1983. An approach to persistent programming. Comput. J. 26, 4 (Nov. 1983), 360–365.

[6]

M. P. Atkinson, L. Daynès, M. J. Jordan, T. Printezis, and S. Spence. 1996. An orthogonally persistent Java. ACM SIGMOD Rec. 25, 4 (Dec. 1996), 68–75.

Digital Library

[7]

Hillel Avni and Trevor Brown. 2016. PHyTM: persistent hybrid transactional memory for Databases. Proc. VLDB Endow. 10, 4 (Nov. 2016), 409–420.

Digital Library

[8]

Hillel Avni, Eliezer Levy, and Avi Mendelson. 2015. Hardware transactions in nonvolatile memory. In Proceedings of DISC’15. 617–630.

Digital Library

[9]

Anirudh Badam. 2013. How Persistent memory will change software systems. Computer 46, 8 (Aug. 2013), 45–51.

Digital Library

[10]

Alexandro Baldassin, Rafael Murari, João P. L. de Carvalho, Guido Araujo, Daniel Castro, João Barreto, and Paolo Romano. 2020. NV-PhTM: An efficient phase-based transactional system for non-volatile memory. In Proceedings of Euro-Par’20. 477–492.

Digital Library

[11]

A. Bensoussan, C. T. Clingen, and R. C. Daley. 1972. The multics virtual memory: Concepts and design. Commun. ACM 15, 5 (May 1972), 308–318.

Digital Library

[12]

Kumud Bhandari, Dhruva R. Chakrabarti, and Hans-J. Boehm. 2016. Makalu: Fast recoverable allocation of non-volatile memory. In Proceedings of OOPSLA’16. 677–694.

Digital Library

[13]

Kumud Bhandari, Chakrabarti, Dhruva R., and Hans-J. Boehm. 2012. Implications of CPU Caching on Byte-Addressable Non-Volatile Memory Programming. Technical Report HPL-2012-236.

[14]

Daniel Bittman, Peter Alvaro, and Ethan L. Miller. 2019. A Persistent Problem: Managing Pointers in NVM. In Proceedings of PLOS’19. 30–37.

[15]

Colin Blundell, E. Christopher Lewis, and Milo M.K. Martin. 2006. Subtleties of transactional memory atomicity semantics. IEEE Comput. Archit. Lett. 5, 2 (Feb. 2006), 17–17.

Digital Library

[16]

Hans-J. Boehm and Sarita V. Adve. 2008. Foundations of the C++ concurrency memory model. In Proceedings of PLDI’08. 68–78.

[17]

Hans-J. Boehm and Dhruva R. Chakrabarti. 2016. Persistence programming models for non-volatile memory. In Proceedings of ISMM’16. 55–67.

[18]

Jalil Boukhobza, Stéphane Rubini, Renhai Chen, and Zili Shao. 2018. Emerging NVM: A survey on architectural integration and research challenges. ACM Trans. Des. Autom. Electron. Syst. 23, 2 (Jan. 2018), 1–32.

Digital Library

[19]

Daniel P. Bovet and Marco Cesati. 2005. Understanding the Linux Kernel (3th ed.). O’Reilly Media.

[20]

Miao Cai, Chance C. Coats, and Jian Huang. 2020. HOOP: Efficient Hardware-assisted out-of-place update for non-volatile memory. In Proceedings of ISCA’20. 584–596.

Digital Library

[21]

Wentao Cai, Haosen Wen, H. Alan Beadle, Mohammad Hedayati, and Michael L. Scott. 2020. Understanding and optimizing persistent memory allocation. In Proceedings of PPoPP’20. 421–422.

[22]

Daniel Castro, Alexandro Baldassin, João Barreto, and Paolo Romano. 2021. SPHT: Scalable persistent hardware transactions. In Proceedings of FAST’21. 155–169.

[23]

Daniel Castro, Paolo Romano, and João Barreto. 2018. Hardware transactional memory meets memory persistency. In Proceedings of IPDPS’18. 368–377.

[24]

Adrian M. Caulfield, Joel Coburn, Todor Mollov, Arup De, Ameen Akel, Jiahua He, Arun Jagatheesan, Rajesh K. Gupta, Allan Snavely, and Steven Swanson. 2010. Understanding the Impact of emerging non-volatile memories on high-performance, io-intensive computing. In Proceedings of SC’10. 1–11.

Digital Library

[25]

Dhruva R. Chakrabarti, Hans-J. Boehm, and Kumud Bhandari. 2014. Atlas: Leveraging locks for non-volatile memory consistency. In Proceedings of OOPSLA’14. 433–452.

Digital Library

[26]

Albert Chang and Mark F. Mergen. 1988. 801 Storage: Architecture and programming. ACM Trans. Comput. Syst. 6, 1 (Feb. 1988), 28–50.

Digital Library

[27]

Andreas Chatzistergiou, Marcelo Cintra, and Stratis D. Viglas. 2015. REWIND: Recovery write-ahead system for in-memory non-volatile data-structures. Proc. VLDB Endow. 8, 5 (Jan. 2015), 497–508.

Digital Library

[28]

Guoyang Chen, Lei Zhang, Richa Budhiraja, Xipeng Shen, and Youfeng Wu. 2017. Efficient support of position independence on non-volatile memory. In Proceedings of MICRO’17. 191–203.

Digital Library

[29]

Shimin Chen and Qin Jin. 2015. Persistent B+-trees in non-volatile main memory. Proc. VLDB Endow. 8, 7 (Feb. 2015), 786–797.

Digital Library

[30]

Joel Coburn, Adrian M. Caulfield, Ameen Akel, Laura M. Grupp, Rajesh K. Gupta, Ranjit Jhala, and Steven Swanson. 2011. NV-Heaps: Making persistent objects fast and safe with next-generation, non-volatile memories. In Proceedings of ASPLOS’11. 105–118.

Digital Library

[31]

Nachshon Cohen, David T. Aksun, Hillel Avni, and James R. Larus. 2019. Fine-grain checkpointing with in-cache-line logging. In Proceedings of ASPLOS’19. 441–454.

[32]

Nachshon Cohen, David T. Aksun, and James R. Larus. 2018. Object-Oriented Recovery for non-volatile memory. Proc. ACM Program. Lang. 2, OOPSLA (Oct. 2018), 153:1–153:22.

[33]

Nachshon Cohen, Michal Friedman, and James R. Larus. 2017. Efficient logging in non-volatile memory by exploiting coherency protocols. Proc. ACM Program. Lang. 1, OOPSLA (Oct. 2017), 67:1–67:24.

[34]

Nachshon Cohen, Rachid Guerraoui, and Igor Zablotchi. 2018. The inherent cost of remembering consistently. In Proceedings of SPAA’18. 259–269.

Digital Library

[35]

Jeremy Condit, Edmund B. Nightingale, Christopher Frost, Engin Ipek, Benjamin Lee, Doug Burger, and Derrick Coetzee. 2009. Better I/O through byte-addressable, persistent memory. In Proceedings of SOSP’09. 133–146.

Digital Library

[36]

Intel Corporation. 2020. Intel Architecture Instruction Set Extensions Programming Reference.

[37]

Andreia Correia, Pascal Felber, and Pedro Ramalhete. 2018. Romulus: Efficient algorithms for persistent transactional memory. In Proceedings of SPAA’18. 271–282.

Digital Library

[38]

Andreia Correia, Pascal Felber, and Pedro Ramalhete. 2020. Persistent memory and the rise of universal constructions. In Proceedings of EuroSys’20. 1–15.

Digital Library

[39]

Tudor David, Aleksandar Dragojevic, Rachid Guerraoui, and Igor Zablotchi. 2018. Log-free concurrent data structures. In Proceedings of USENIX ATC’18. 373–386.

[40]

Joel E. Denny, Seyong Lee, and Jeffrey S. Vetter. 2016. NVL-C: Static analysis techniques for efficient, correct programming of non-volatile main memory systems. In Proceedings of HPDC’16. 125–136.

[41]

Kshitij Doshi, Ellis Giles, and Peter Varman. 2016. Atomic Persistence for SCM with a non-intrusive backend controller. In Proceedings of HPCA’16. 77–89.

[42]

Per Ekemark, Yuan Yao, Alberto Ros, Konstantinos Sagonas, and Stefanos Kaxiras. 2021. TSOPER: Efficient coherence-based strict persistency. In Proceedings of HPCA’21.

[43]

Alan Fekete, Dimitrios Liarokapis, Elizabeth O’Neil, Patrick O’Neil, and Dennis Shasha. 2005. Making snapshot isolation serializable. ACM Trans. Database Syst. 30, 2 (June 2005), 492–528.

Digital Library

[44]

Scott W. Fong, Christopher M. Neumann, and H.-S. Philip Wong. 2017. Phase-change memory—Towards a storage-class memory. IEEE Trans. Electron Devices 64, 11 (Nov. 2017), 4374–4385.

[45]

Xuanyao Fong, Yusung Kim, Rangharajan Venkatesan, Sri Harsha Choday, Anand Raghunathan, and Kaushik Roy. 2016. Spin-Transfer torque memories: Devices, circuits, and systems. Proc. IEEE 104, 7 (July 2016), 1449–1488.

[46]

R. F. Freitas and W. W. Wilcke. 2008. Storage-class memory: The next storage system technology. IBM J. Res. Dev. 52, 4.5 (July 2008), 439–447.

Digital Library

[47]

Michal Friedman, Naama Ben-David, Yuanhao Wei, Guy E. Blelloch, and Erez Petrank. 2020. NVTraverse: In NVRAM data structures, the destination is more important than the journey. In Proceedings of PLDI’20. 377–392.

Digital Library

[48]

Kaan Genç, Michael D. Bond, and Guoqing Harry Xu. 2020. Crafty: Efficient, HTM-compatible persistent transactions. In Proceedings of PLDI’20. 59–74.

Digital Library

[49]

Ellis Giles, Kshitij Doshi, and Peter Varman. 2013. Bridging the programming gap between persistent and volatile memory using WrAP. In Proceedings of CF’13. 1–10.

Digital Library

[50]

Ellis Giles, Kshitij Doshi, and Peter Varman. 2017. Continuous Checkpointing of HTM Transactions in NVM. In Proceedings of ISMM’17. 70–81.

Digital Library

[51]

Ellis Giles, Kshitij Doshi, and Peter Varman. 2018. Hardware transactional persistent memory. In Proceedings of MEMSYS’18. 190–205.

Digital Library

[52]

Ellis R. Giles, Kshitij Doshi, and Peter Varman. 2015. SoftWrAP: A lightweight framework for transactional support of storage class memory. In Proceedings of MSST’15. 1–14.

[53]

Vaibhav Gogte, Stephan Diestelhorst, William Wang, Satish Narayanasamy, Peter M. Chen, and Thomas F. Wenisch. 2018. Persistency for synchronization-free regions. In Proceedings of PLDI’18. 46–61.

[54]

Vaibhav Gogte, William Wang, Stephan Diestelhorst, Peter M. Chen, Satish Narayanasamy, and Thomas F. Wenisch. 2020. Relaxed persist ordering using strand persistency. In Proceedings of ISCA’20. 652–665.

[55]

Jim Gray, Paul McJones, Mike Blasgen, Bruce Lindsay, Raymond Lorie, Tom Price, Franco Putzolu, and Irving Traiger. 1981. The recovery manager of the system r database manager. Comput. Surveys 13, 2 (June 1981), 223–242.

Digital Library

[56]

Jim Gray and Andreas Reuter. 1992. Transaction Processing: Concepts and Techniques (1st ed.). Morgan Kaufmann.

Digital Library

[57]

Paul Green. 2005. Multics Virtual Memory—Tutorial and Reflections. Retrieved from https://multicians.org/pg/mvm.html.

[58]

Jinyu Gu, Qianqian Yu, Xiayang Wang, Zhaoguo Wang, Binyu Zang, Haibing Guan, and Haibo Chen. 2019. Pisces: A scalable and efficient persistent transactional memory. In Proceedings of USENIX ATC’19. 913–928.

[59]

Jorge Guerra, Leonardo Marmol, Daniel Campello, Carlos Crespo, Raju Rangaswami, and Jinpeng Wei. 2012. Software persistent Memory. In Proceedings of USENIX ATC’12. 319–331.

[60]

Siddharth Gupta, Alexandros Daglis, and Babak Falsafi. 2019. Distributed logless atomic durability with persistent memory. In Proceedings of MICRO’19. 466–478.

Digital Library

[61]

Swapnil Haria, Mark D. Hill, and Michael M. Swift. 2020. MOD: Minimally ordered durable datastructures for persistent memory. In Proceedings of ASPLOS’20. 775–788.

[62]

John L. Hennessy and David A. Patterson. 2011. Computer Architecture: A Quantitative Approach (5th ed.). Morgan Kaufmann.

Digital Library

[63]

Maurice Herlihy and Nir Shavit. 2012. The Art of Multiprocessor Programming (1st ed.). Morgan Kaufmann.

[64]

Terry Ching-Hsiang Hsu, Helge Brügner, Indrajit Roy, Kimberly Keeton, and Patrick Eugster. 2017. NVthreads: Practical persistence for multi-threaded applications. In Proceedings of EuroSys’17. 468–482.

[65]

Qingda Hu, Jinglei Ren, Anirudh Badam, Jiwu Shu, and Thomas Moscibroda. 2017. Log-structured non-volatile main memory. In Proceedings of USENIX ATC’17. 703–717.

[66]

Kaixin Huang, Yan Yan, and Linpeng Huang. 2019. EFLightPM: An Efficient and lightweight persistent memory system. In Proceedings of ICECCS’19. 154–163.

[67]

Taeho Hwang, Jaemin Jung, and Youjip Won. 2015. HEAPO: Heap-based persistent object store. ACM Trans. Storage 11, 1 (Dec. 2015), 3:1–3:21.

Digital Library

[68]

Taeho Hwang and Youjip Won. 2019. Copy-on-write with adaptive differential logging for persistent memory. IEICE Trans. Info. Syst. E102.D, 12 (2019), 2451–2460.

[69]

IBM. 2020. IBM i—A Platform for Innovators, by Innovators. Retrieved from https://www.ibm.com/it-infrastructure/power/os/ibm-i.

[70]

Intel. 2020. Intel 64 and IA-32 Architectures Software Developer’s Manual. Retrieved from https://software.intel.com/content/www/us/en/develop/articles/intel-sdm.html.

[71]

ISO/IEC. 2015. Technical Specification for C++ Extensions for Transactional Memory.

[72]

Joseph Izraelevitz, Terence Kelly, and Aasheesh Kolli. 2016. Failure-atomic persistent memory updates via JUSTDO Logging. In Proceedings of ASPLOS’16. 427–442.

Digital Library

[73]

Joseph Izraelevitz, Hammurabi Mendes, and Michael L. Scott. 2016. Linearizability of persistent memory objects under a full-system-crash failure model. In Proceedings of DISC’16. 313–327.

[74]

Jungi Jeong, Chang Hyun Park, Jaehyuk Huh, and Seungryoul Maeng. 2018. Efficient hardware-assisted logging with asynchronous and direct-update for persistent memory. In Proceedings of MICRO’18. 520–532.

Digital Library

[75]

Arpit Joshi, Vijay Nagarajan, Marcelo Cintra, and Stratis Viglas. 2015. Efficient persist barriers for multicores. In Proceedings of MICRO’15. 660–671.

Digital Library

[76]

Arpit Joshi, Vijay Nagarajan, Marcelo Cintra, and Stratis Viglas. 2018. DHTM: Durable hardware transactional memory. In Proceedings of ISCA’18. 452–465.

Digital Library

[77]

Arpit Joshi, Vijay Nagarajan, Stratis Viglas, and Marcelo Cintra. 2017. ATOM: Atomic durability in non-volatile memory through hardware logging. In Proceedings of HPCA’17. 361–372.

[78]

Sudarsun Kannan, Ada Gavrilovska, and Karsten Schwan. 2016. pVM: Persistent virtual memory for efficient capacity scaling and Object Storage. In Proceedings of EuroSys’16. 1–16.

Digital Library

[79]

Terence Kelly. 2019. Persistent memory programming on conventional hardware. Queue 17, 4 (Aug. 2019), 1–20.

Digital Library

[80]

Wook-Hee Kim, Jinwoong Kim, Woongki Baek, Beomseok Nam, and Youjip Won. 2016. NVWAL: Exploiting NVRAM in write-ahead logging. In Proceedings of ASPLOS’16. 385–398.

Digital Library

[81]

Aasheesh Kolli, Vaibhav Gogte, Ali Saidi, Stephan Diestelhorst, Peter M. Chen, Satish Narayanasamy, and Thomas F. Wenisch. 2017. Language-level persistency. In Proceedings of ISCA’17. 481–493.

[82]

Aasheesh Kolli, Vaibhav Gogte, Ali Saidi, Stephan Diestelhorst, William Wang, Peter M. Chen, Satish Narayanasamy, and Thomas F. Wenisch. 2019. Language support for memory persistency. IEEE Micro 39, 3 (May 2019), 94–102.

Digital Library

[83]

Aasheesh Kolli, Steven Pelley, Ali Saidi, Peter M. Chen, and Thomas F. Wenisch. 2016. High-performance transactions for persistent memories. In Proceedings of ASPLOS’16. 399–411.

[84]

Aasheesh Kolli, Jeff Rosen, Stephan Diestelhorst, Ali Saidi, Steven Pelley, Sihang Liu, Peter M. Chen, and Thomas F. Wenisch. 2016. Delegated persist ordering. In Proceedings of MICRO’16. 1–13.

[85]

R. Madhava Krishnan, Jaeho Kim, Ajit Mathew, Xinwei Fu, Anthony Demeri, Changwoo Min, and Sudarsun Kannan. 2020. Durable transactional memory can scale with timestone. In Proceedings of ASPLOS’20. 335–349.

Digital Library

[86]

Charles Lamb, Gordon Landis, Jack Orenstein, and Dan Weinreb. 1991. The objectstore database system. Commun. ACM 34, 10 (Oct. 1991), 50–63.

Digital Library

[87]

Benjamin C. Lee, Engin Ipek, Onur Mutlu, and Doug Burger. 2009. Architecting phase change memory as a scalable dram alternative. In Proceedings of ISCA’09. 2–13.

Digital Library

[88]

Benjamin C. Lee, Ping Zhou, Jun Yang, Youtao Zhang, Bo Zhao, Engin Ipek, Onur Mutlu, and Doug Burger. 2010. Phase-change technology and the future of main memory. IEEE Micro 30, 1 (Jan. 2010), 143–143.

Digital Library

[89]

Se Kwon Lee, Jayashree Mohan, Sanidhya Kashyap, Taesoo Kim, and Vijay Chidambaram. 2019. RECIPE: Converting concurrent DRAM indexes to persistent-memory indexes. In Proceedings of SOSP’19. 462–477.

Digital Library

[90]

Mengxing Liu, Jiankai Xing, Kang Chen, and Yongwei Wu. 2019. Building Scalable NVM-Based B+tree with HTM. In Proceedings of ICPP’19. 1–10.

Digital Library

[91]

Mengxing Liu, Mingxing Zhang, Kang Chen, Xuehai Qian, Yongwei Wu, Weimin Zheng, and Jinglei Ren. 2017. DudeTM: building durable transactions with Decoupling for Persistent Memory. In Proceedings of ASPLOS’17. 329–343.

Digital Library

[92]

Qingrui Liu, Joseph Izraelevitz, Se Kwon Lee, Michael L. Scott, Sam H. Noh, and Changhee Jung. 2018. iDO: Compiler-directed failure atomicity for nonvolatile memory. In Proceedings of MICRO’18. 258–270.

Digital Library

[93]

Sihang Liu, Korakit Seemakhupt, Yizhou Wei, Thomas Wenisch, Aasheesh Kolli, and Samira Khan. 2020. Cross-failure bug detection in persistent memory programs. In Proceedings of ASPLOS’20. 1187–1202.

Digital Library

[94]

Sihang Liu, Yizhou Wei, Jishen Zhao, Aasheesh Kolli, and Samira Khan. 2019. PMTest: A Fast and flexible testing framework for persistent memory programs. In Proceedings of ASPLOS’19. 411–425.

Digital Library

[95]

David E. Lowell and Peter M. Chen. 1997. Free transactions with Rio Vista. ACM SIGOPS Oper. Syst. Rev. 31, 5 (Oct. 1997), 92–101.

Digital Library

[96]

Youyou Lu, Jiwu Shu, Long Sun, and Onur Mutlu. 2014. Loose-ordering consistency for persistent memory. In Proceedings of ICCD’14. 216–223.

[97]

Virendra J. Marathe, Margo Seltzer, Steve Byan, and Tim Harris. 2017. Persistent Memcached: Bringing legacy code to byte-addressable persistent memory. In Proceedings of USENIX HotStorage’17.

[98]

Leonardo Marmol, Mohammad Chowdhury, and Raju Rangaswami. 2018. LibPM: Simplifying application usage of persistent memory. ACM Trans. Storage 14, 4 (Dec. 2018), 34:1–34:18.

Digital Library

[99]

Amirsaman Memaripour, Anirudh Badam, Amar Phanishayee, Yanqi Zhou, Ramnatthan Alagappan, Karin Strauss, and Steven Swanson. 2017. Atomic in-place updates for non-volatile main memories with kamino-tx. In Proceedings of EuroSys’17. 499–512.

Digital Library

[100]

Amirsaman Memaripour, Joseph Izraelevitz, and Steven Swanson. 2020. Pronto: Easy and fast persistence for volatile data structures. In Proceedings of ASPLOS’20. 789–806.

Digital Library

[101]

Amirsaman Memaripour and Steven Swanson. 2018. Breeze: User-level access to non-volatile main memories for legacy software. In Proceedings of ICCD’18. 413–422.

[102]

Vijay Menon, Steven Balensiefer, Tatiana Shpeisman, Ali-Reza Adl-Tabatabai, Richard L. Hudson, Bratin Saha, and Adam Welc. 2008. Single global lock semantics in a weakly atomic STM. ACM SIGPLAN Not. 43, 5 (May 2008), 15–26.

Digital Library

[103]

Sparsh Mittal and Jeffrey S. Vetter. 2016. A survey of software techniques for using non-volatile memories for storage and main memory systems. IEEE Trans Parallel Distrib Syst 27, 5 (May 2016), 1537–1550.

Digital Library

[104]

C. Mohan, Don Haderle, Bruce Lindsay, Hamid Pirahesh, and Peter Schwarz. 1992. ARIES: A transaction recovery method supporting fine-granularity locking and partial rollbacks using write-ahead logging. ACM Trans. Database Syst. 17, 1 (Mar. 1992), 94–162.

Digital Library

[105]

Iulian Moraru, David G. Andersen, Michael Kaminsky, Niraj Tolia, Parthasarathy Ranganathan, and Nathan Binkert. 2013. Consistent, durable, and safe memory management for byte-addressable non volatile main memory. In Proceedings of TRIOS’13. 1–17.

Digital Library

[106]

J. E. B. Moss. 1992. Working with Persistent Objects: To swizzle or not to swizzle. IEEE Trans. Softw. Eng. 18, 8 (Aug. 1992), 657–673.

Digital Library

[107]

David Mulnix. 2020. Third Generation Intel Xeon Processor Scalable Family Technical Overview. Retrieved from https://www.intel.com/content/www/us/en/develop/articles/intel-xeon-processo r-scalable-family-overview.html.

[108]

Sanketh Nalli, Swapnil Haria, Mark D. Hill, Michael M. Swift, Haris Volos, and Kimberly Keeton. 2017. An analysis of persistent memory use with WHISPER. In Proceedings of ASPLOS’17. 135–148.

Digital Library

[109]

Moohyeon Nam, Hokeun Cha, Young-ri Choi, Sam H. Noh, and Beomseok Nam. 2019. Write-optimized dynamic hashing for persistent memory. In Proceedings of FAST’19. 31–44.

[110]

Dushyanth Narayanan and Orion Hodson. 2012. Whole-system persistence. In Proceedings of ASPLOS’12. 401–410.

Digital Library

[111]

Faisal Nawab, Dhruva R. Chakrabarti, Terence Kelly, and Charles B. Morrey III. 2015. Procrastination beats prevention: Timely sufficient persistence for Efficient Crash Resilience. In Proceedings of EDBT’15. 689–694.

[112]

Faisal Nawab, Joseph Izraelevitz, Terence Kelly, Charles B. Morrey III, Dhruva R. Chakrabarti, and Michael L. Scott. 2017. Dalí: A periodically persistent hash map. In Proceedings of DISC’17. 37:1–37:16.

[113]

Ian Neal, Ben Reeves, Ben Stoler, Andrew Quinn, Youngjin Kwon, Simon Peter, and Baris Kasikci. 2020. AGAMOTTO: How persistent is your persistent memory application? In Proceedings of OSDI’20. 1047–1064.

[114]

Tri M. Nguyen and David Wentzlaff. 2018. PiCL: A software-transparent, persistent cache log for nonvolatile main memory. In Proceedings of MICRO’18. 507–519.

[115]

Yuanjiang Ni, Jishen Zhao, Heiner Litz, Daniel Bittman, and Ethan L. Miller. 2019. SSP: Eliminating redundant writes in failure-atomic NVRAMs via shadow sub-paging. In Proceedings of MICRO’19. 836–848.

[116]

Matheus Almeida Ogleari, Ethan L. Miller, and Jishen Zhao. 2018. Steal but No Force: Efficient hardware undo+redo logging for persistent memory systems. In Proceedings of HPCA’18. 336–349.

[117]

Jim Pappas. 2018. Why persistent memory matters. how did we get here, and what lies ahead? In Proceedings of the Flash Memory Summit.

[118]

Stan Park, Terence Kelly, and Kai Shen. 2013. Failure-Atomic Msync(): A simple and efficient mechanism for preserving the integrity of durable data. In Proceedings of EuroSys’13. 225–238.

Digital Library

[119]

Steven Pelley, Peter M. Chen, and Thomas F. Wenisch. 2014. Memory persistency. In Proceedings of ISCA’14. 265–276.

[120]

Ivy B. Peng, Maya B. Gokhale, and Eric W. Green. 2019. System evaluation of the Intel optane byte-addressable NVM. In Proceedings of MEMSYS’19. 304–315.

[121]

Taciano D. Perez, Marcelo V. Neves, Diego Medaglia, Pedro H. G. Monteiro, and César A. F. De Rose. 2020. Orthogonal persistence in nonvolatile memory architectures: A persistent heap design and its implementation for a Java virtual machine. Softw.: Pract. Exp. 50, 4 (2020), 368–387.

[122]

Gianlucca O. Puglia, Avelino Francisco Zorzo, Cesar A. F. De Rose, Taciano Perez, and Dejan Milojicic. 2019. Non-volatile memory file systems: A Survey. IEEE Access 7 (2019), 25836–25871.

[123]

Azalea Raad and Viktor Vafeiadis. 2018. Persistence semantics for weak memory: Integrating epoch persistency with the TSO memory model. Proc. ACM Program. Lang. 2, OOPSLA (Oct. 2018), 137:1–137:27.

Digital Library

[124]

Azalea Raad, John Wickerson, Gil Neiger, and Viktor Vafeiadis. 2019. Persistency semantics of the Intel-X86 architecture. Proc. ACM Program. Lang. 4, POPL (Dec. 2019), 11:1–11:31.

[125]

Azalea Raad, John Wickerson, and Viktor Vafeiadis. 2019. Weak persistency semantics from the ground up: Formalising the persistency semantics of ARMv8 and transactional models. Proc. ACM Program. Lang. 3, OOPSLA (Oct. 2019), 135:1–135:27.

Digital Library

[126]

Jinglei Ren, Qingda Hu, Samira Khan, and Thomas Moscibroda. 2017. Programming for Non-volatile main memory is hard. In Proceedings of APSys’17. 1–8.

Digital Library

[127]

Jinglei Ren, Jishen Zhao, Samira Khan, Jongmoo Choi, Yongwei Wu, and Onur Mutlu. 2015. ThyNVM: Enabling software-transparent crash consistency in persistent memory systems. In Proceedings of MICRO’15. 672–685.

Digital Library

[128]

Andry Rudoff. 2016. Deprecating the PCOMMIT Instruction. Retrieved from https://www.intel.com/content/www/us/en/develop/blogs/deprecate-pcommit-inst ruction.html.

[129]

Andy Rudoff. 2017. Persistent memory programming. login: 42, 2 (2017).

[130]

M. Satyanarayanan, Henry H. Mashburn, Puneet Kumar, David C. Steere, and James J. Kistler. 1993. Lightweight recoverable virtual memory. In Proceedings of SOSP’93. 146–160.

[131]

Steve Scargall. 2020. Programming Persistent Memory—A Comprehensive Guide for Developers (1st ed.). Apress.

[132]

David Schwalb, Tim Berning, Martin Faust, Markus Dreseler, and Hasso Plattner. 2015. nvm_malloc: Memory allocation for NVRAM. In Proceedings of ADMS’15. 61–72.

[133]

Russell Sears and Eric Brewer. 2006. Stasis: Flexible transactional storage. In Proceedings of OSDI’06. 29–44.

[134]

Margo Seltzer, Virendra Marathe, and Steve Byan. 2018. An NVM Carol: Visions of NVM past, present, and future. In Proceedings of ICDE’18. 15–23.

[135]

Seunghee Shin, Satish Kumar Tirukkovalluri, James Tuck, and Yan Solihin. 2017. Proteus: A flexible and fast software supported hardware logging approach for NVM. In Proceedings of MICRO’17. 178–190.

Digital Library

[136]

Seunghee Shin, James Tuck, and Yan Solihin. 2017. Hiding the Long latency of persist barriers using speculative execution. In Proceedings of ISCA’17. 175–186.

Digital Library

[137]

Thomas Shull, Jian Huang, and Josep Torrellas. 2018. Defining a high-level programming model for emerging NVRAM technologies. In Proceedings of ManLang’18. 1–7.

Digital Library

[138]

Thomas Shull, Jian Huang, and Josep Torrellas. 2019. AutoPersist: An Easy-to-Use Java NVM framework based on reachability. In Proceedings of PLDI’19. 316–332.

Digital Library

[139]

SNIA Technical Position. 2017. NVM Programming Model Version 1.2.

[140]

Yan Solihin. 2019. Persistent Memory: Abstractions, abstractions, and abstractions. IEEE Micro 39, 1 (Jan. 2019), 65–66.

[141]

Kosuke Suzuki and Steven Swanson. 2015. A survey of trends in non-volatile memory technologies: 2000-2014. In Proceedings of IMW’15. 1–4.

[142]

Mark Tyson. 2019. Intel Optane DC Persistent Memory Launched. Retrieved from https://hexus.net/tech/news/storage/129143-intel-optane-dc-persistent-memory -launched/.

[143]

Haris Volos, Andres Jaan Tack, and Michael M. Swift. 2011. Mnemosyne: Lightweight persistent memory. In Proceedings of ASPLOS’11. 91–104.

[144]

Hu Wan, Youyou Lu, Yuanchao Xu, and Jiwu Shu. 2016. Empirical study of redo and undo logging in persistent memory. In Proceedings of NVMSA’16. 1–6.

[145]

Chao Wang and Michael Spear. 2016. Practical condition synchronization for transactional memory. In Proceedings of Eurosys’16. 1–16.

Digital Library

[146]

Tiancong Wang, Sakthikumaran Sambasivam, Yan Solihin, and James Tuck. 2017. Hardware supported persistent object address translation. In Proceedings of MICRO’17. 800–812.

Digital Library

[147]

Zhaoguo Wang, Han Yi, Ran Liu, Mingkai Dong, and Haibo Chen. 2015. Persistent transactional memory. IEEE Comput. Archit. Lett. 14, 1 (Jan. 2015), 58–61.

Digital Library

[148]

Xueliang Wei, Dan Feng, Wei Tong, Jingning Liu, and Liuqing Ye. 2020. MorLog: Morphable hardware logging for atomic persistence in non-volatile main memory. In Proceedings of ISCA’20. 610–623.

Digital Library

[149]

Michèle Weiland, Holger Brunst, Tiago Quintino, Nick Johnson, Olivier Iffrig, Simon Smart, Christian Herold, Antonino Bonanni, Adrian Jackson, and Mark Parsons. 2019. An Early evaluation of intel’s Optane DC persistent memory module and its impact on high-performance scientific applications. In Proceedings of SC’19. 1–19.

Digital Library

[150]

H.-S. Philip Wong, Simone Raoux, SangBum Kim, Jiale Liang, John P. Reifenberg, Bipin Rajendran, Mehdi Asheghi, and Kenneth E. Goodson. 2010. Phase change memory. Proc. IEEE 98, 12 (Dec. 2010), 2201–2227.

[151]

Kai Wu, Jie Ren, Ivy Peng, and Dong Li. 2021. ArchTM: Architecture-aware, high performance transaction for persistent memory. In Proceedings of FAST’21. 141–153.

[152]

Mingyu Wu, Ziming Zhao, Haoyu Li, Heting Li, Haibo Chen, Binyu Zang, and Haibing Guan. 2018. Espresso: brewing Java for more non-volatility with non-volatile memory. In Proceedings of ASPLOS’18. 70–83.

Digital Library

[153]

Zhenwei Wu, Kai Lu, Andrew Nisbet, Wenzhe Zhang, and Mikel Luján. 2020. PMThreads: Persistent memory threads harnessing versioned shadow copies. In Proceedings of PLDI’20. 623–637.

Digital Library

[154]

Fei Xia, De-Jun Jiang, Jin Xiong, and Ning-Hui Sun. 2015. A survey of phase change memory systems. J. Comput. Sci. Technol. 30, 1 (Jan. 2015), 121–144.

[155]

Jian Yang, Juno Kim, Morteza Hoseinzadeh, Joseph Izraelevitz, and Steve Swanson. 2020. An empirical guide to the behavior and use of scalable persistent memory. In Proceedings of FAST’20. 169–182.

[156]

Songping Yu, Nong Xiao, Mingzhu Deng, Yuxuan Xing, Fang Liu, Zhiping Cai, and Wei Chen. 2015. WAlloc: An efficient wear-aware allocator for non-volatile main memory. In Proceedings of IPCCC’15. 1–8.

Digital Library

[157]

Pantea Zardoshti, Michael Spear, Aida Vosoughi, and Garret Swart. 2020. Understanding and improving persistent transactions on optane DC Memory. In Proceedings of IPDPS’20. 348–357.

[158]

Pantea Zardoshti, Tingzhe Zhou, Yujie Liu, and Michael Spear. 2019. Optimizing persistent memory transactions. In Proceedings of PACT’19. 219–231.

[159]

Lu Zhang and Steven Swanson. 2019. Pangolin: A fault-tolerant persistent memory programming library. In Proceedings of USENIX ATC’19. 897–912.

[160]

Jishen Zhao, Sheng Li, Doe Hyun Yoon, Yuan Xie, and Norman P. Jouppi. 2013. Kiln: Closing the performance gap between systems with and without persistence support. In Proceedings of MICRO’13. 421–432.

Cited By

Pupin AFrancesquini EBaldassin A(2024)Comparação Qualitativa das Interfaces de Programação em Memória PersistenteAnais da XV Escola Regional de Alto Desempenho de São Paulo (ERAD-SP 2024)10.5753/eradsp.2024.239932(37-40)Online publication date: 16-May-2024
https://doi.org/10.5753/eradsp.2024.239932
Souza OHonorio BBaldassin A(2024)Avaliando o Impacto da Alocação de Memória em Sistemas com Memória PersistenteAnais da XV Escola Regional de Alto Desempenho de São Paulo (ERAD-SP 2024)10.5753/eradsp.2024.239930(21-24)Online publication date: 16-May-2024
https://doi.org/10.5753/eradsp.2024.239930
Spagnol LHonorio BGalvão EFrancesquini EBaldassin A(2024)Investigando Fatores de Desempenho em Dispositivos PersistentesAnais da XV Escola Regional de Alto Desempenho de São Paulo (ERAD-SP 2024)10.5753/eradsp.2024.239925(81-84)Online publication date: 16-May-2024
https://doi.org/10.5753/eradsp.2024.239925
Show More Cited By

Index Terms

Persistent Memory: A Survey of Programming Support and Implementations

Recommendations

Using DRAM Buffer to Reduce Persistence and Consistence Overheads of Persistent Memory

Persistent memory has the potential to become universal storage for memory and storage uses. Unfortunately, our system architecture is good fit for two-level storage model with DRAM and storage. It incurs two of important performance overheads. First is ...
Read More
Wear-leveling-aware buddy-like memory allocator for persistent memory file systems
Abstract
Existing persistent memory file systems usually ignore the problem that persistent memories (PMs) have limited write endurance. Then the underlying PMs can be damaged easily by the unbalanced writes of file systems. However, existing wear-...
Highlights
- We reveal the high overhead and severe imbalanced wear problem caused by allocator of PM file systems.
- We propose WBAlloc which provides O(1) time complexity in both allocation and deallocation while achieving near-balanced writes.
Read More
Challenges and solutions for fast remote persistent memory access
SoCC '20: Proceedings of the 11th ACM Symposium on Cloud Computing

Non-volatile main memory DIMMs (NVMMs), such as Intel's Optane DC Persistent Memory modules, provide data durability with orders of magnitude higher performance than prior durable technologies. This paper explores the unique challenges that arise when ...
Read More

Comments

Information & Contributors

Information

Published In

cover image ACM Computing Surveys

ACM Computing Surveys Volume 54, Issue 7

September 2022

778 pages

ISSN:0360-0300

EISSN:1557-7341

DOI:10.1145/3476825

Editor:
Albert Zomaya
University of Sydney, Australia

Issue’s Table of Contents

Copyright © 2021 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 18 July 2021

Accepted: 01 May 2021

Revised: 01 March 2021

Received: 01 December 2020

Published in CSUR Volume 54, Issue 7

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Research-article
Research
Refereed

Funding Sources

FCT
FAPESP
EU?s H2020 R&I programme

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

10
Total Citations
View Citations
904
Total Downloads

Downloads (Last 12 months)168
Downloads (Last 6 weeks)13

Other Metrics

View Author Metrics

Citations

Cited By

Pupin AFrancesquini EBaldassin A(2024)Comparação Qualitativa das Interfaces de Programação em Memória PersistenteAnais da XV Escola Regional de Alto Desempenho de São Paulo (ERAD-SP 2024)10.5753/eradsp.2024.239932(37-40)Online publication date: 16-May-2024
https://doi.org/10.5753/eradsp.2024.239932
Souza OHonorio BBaldassin A(2024)Avaliando o Impacto da Alocação de Memória em Sistemas com Memória PersistenteAnais da XV Escola Regional de Alto Desempenho de São Paulo (ERAD-SP 2024)10.5753/eradsp.2024.239930(21-24)Online publication date: 16-May-2024
https://doi.org/10.5753/eradsp.2024.239930
Spagnol LHonorio BGalvão EFrancesquini EBaldassin A(2024)Investigando Fatores de Desempenho em Dispositivos PersistentesAnais da XV Escola Regional de Alto Desempenho de São Paulo (ERAD-SP 2024)10.5753/eradsp.2024.239925(81-84)Online publication date: 16-May-2024
https://doi.org/10.5753/eradsp.2024.239925
Fridman YMutalik Desai SSingh NWillhalm TOren G(2023)CXL Memory as Persistent Memory for Disaggregated HPC: A Practical ApproachProceedings of the SC '23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis10.1145/3624062.3624175(983-994)Online publication date: 12-Nov-2023
https://dl.acm.org/doi/10.1145/3624062.3624175
Kimura GHayamizu YKiran RKitsuregawa MGoda K(2023)Efficient Parallel Mining of High-utility Itemsets on Multicore Processors2023 IEEE 39th International Conference on Data Engineering (ICDE)10.1109/ICDE55515.2023.00388(638-652)Online publication date: Apr-2023
https://doi.org/10.1109/ICDE55515.2023.00388
Zhang ZZhao YFan XZhang B(2023)Big Data Oriented Graph Division and Storage2023 IEEE 8th International Conference on Big Data Analytics (ICBDA)10.1109/ICBDA57405.2023.10104843(47-52)Online publication date: 3-Mar-2023
https://doi.org/10.1109/ICBDA57405.2023.10104843
Singh ASarangi S(2023)JASS: A Tunable Checkpointing System for NVM-Based Systems2023 IEEE 30th International Conference on High Performance Computing, Data, and Analytics (HiPC)10.1109/HiPC58850.2023.00032(164-173)Online publication date: 18-Dec-2023
https://doi.org/10.1109/HiPC58850.2023.00032
Jin PChu ZLiu GLuo YWan S(2023)Optimizing B+-tree for hybrid memory with in-node hotspot cache and eADR awarenessFrontiers of Computer Science: Selected Publications from Chinese Universities10.1007/s11704-023-3344-x18:5Online publication date: 23-Dec-2023
https://dl.acm.org/doi/10.1007/s11704-023-3344-x
Bastelli LBaldassin AFrancesquini E(2022)Programando para Memória Persistente: Dificuldades, Armadilhas e DesempenhoAnais do XXIII Simpósio em Sistemas Computacionais de Alto Desempenho (SSCAD 2022)10.5753/wscad.2022.226384(133-144)Online publication date: 19-Oct-2022
https://doi.org/10.5753/wscad.2022.226384
Nicolae B(2022)Scalable Multi-Versioning Ordered Key-Value Stores with Persistent Memory Support2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS53621.2022.00018(93-103)Online publication date: May-2022
https://doi.org/10.1109/IPDPS53621.2022.00018

View Options

Get Access

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Article

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

HTML Format

View this article in HTML Format.

Media

Figures

Other

Tables

View Issue’s Table of Contents