Tunneling Field Effect Transistor

Increased static and dynamic power dissipation in the integrated circuits (ICs) are the main obstacle for growing
demands of smart phones and laptops, which require semiconductor devices having low power operation. As
the conventional MOSFET has a thermodynamic limit of 60 mV/decade at 300 K on subthreshold slope (SS),
so the device based on the mechanism other than diffusion over a thermal barrier came into existence. In
this regard, Tunnel-FET (TFET) has emerged as a promising replacement. Due to its lower subthreshold slope
(<60 mV/decade at 300 K), reduced OFF-current (IOFF), reduced power consumption, and negligible short
channel effects, TFETs have achieved a lot of attention in the recent years. In the present research work,
double-gate TFET (DG-TFET) device has been investigated. The simulation result shows a very good ION/IOFF
ratio (1012) and low SS (∼41.54 mV/dec). The DG-TFET has very low off current, IOFF (∼10−17 A/m) and
ON-current of (ION) ∼10−5 (A/m) using gate bias in the vicinity of 0.5. In addition, we have optimized the
device parameters, thus improving the ION current and the ION/IOFF ratio yield for two kinds of technologies
(using HfO2 or SiO2 as gate dielectric). A comparison between the two technologies was made. Gate to drain
(Cgd) capacitance as function of gate to source voltage VGS as well as drain to source voltage VDS at frequency
f =1 MHz, Cgd is weaker using SiO2 as gate dielectric compared to HfO2.

Tunnel FET is one of the promising devices advocated as a replacement of conventional MOSFET to be used for low power applications. Temperature is an important factor affecting the performance of circuits or system, so temperature associated reliability issues of double gate Tunnel FET and its impact on essential circuit design components have been addressed here. The temperature reliability investigation is based on double gate Tunnel FET, containing Si 1-x Ge x /Si, source/channel and HfO 2 high-k gate dielectric material. During investigation, it has been found that at high temperature application range~300 K-to-600 K,the Tunnel FET device design parameters exhibit weak temperature dependency with switching current (I ON), while the off-state current (I OFF) is slightly varying~10 −17 A/μm-to-10 −10 A/μm. In addition, the impact of temperature on various device design element such as V TH (i.e.,switching voltage),on-current (I ON), off-current (I OFF), switching ratio (I ON /I OFF) and average subthreshold slope (i.e., SS avg), ambipolar current (I AMB) have been done in this research work.The essential circuit design components for digital and analog/RF applications, such as current amplification factor(g m) and its derivative (g m '),the C-V components of device design, Cgg, Cgd and C gs , cutoff frequency (ƒ T) and gain band width (GBW) product have deeply investigated. In conclusion, the obtained results show that the designed double gate Tunnel FET device configuration and its circuit design components are suitable for ultra-low power circuit,system applications and reliable for hazardous temperature environment.

— We propose a novel systematic procedure to individually characterize relevant physical phenomena that typify tunnel FETs (TFETs) in general. The procedure uses the Lambert W function to explicitly solve the subthreshold and above-threshold transfer characteristics of TFETs, as described by a recently proposed universal TFET compact model based on Kane's tunneling formulation. The resulting explicit analytic solutions may be used to numerically calculate, and thus to reveal, the terminal voltage-dependent functionalities of the device's subthreshold current swing and effective electric field. The description of the output characteristics' gate-to-source voltage dependence and saturation is also part of the procedure. The resulting functional representations of the relevant features constitute useful tools for basic device analysis and design, as well as for formulating specific mathematical descriptive models of these features. Atomistic, quantum-mechanical simulated data of an InAs homojunction TFET are used as an example to numerically and graphically illustrate the proposed characterization procedure.

The experimental observation of band-to-band tunneling in novel tunneling field-effect transistors utilizing a monolayer of MoS2 as the conducting channel is demonstrated. Our results indicate that the strong gate-coupling efficiency enabled by two-dimensional materials, such as monolayer MoS2, results in the direct manifestation of a band-to-band tunneling current and an ambipolar transport.

We propose a novel systematic procedure to individually characterize relevant physical phenomena that typify tunnel FETs (TFETs) in general. The procedure uses the Lambert $W$ function to explicitly solve the subthreshold and above-threshold transfer characteristics of TFETs, as described by a recently proposed universal TFET compact model based on Kane&#39;s tunneling formulation. The resulting explicit analytic solutions may be used to numerically calculate, and thus to reveal, the terminal voltage-dependent functionalities of the device&#39;s subthreshold current swing and effective electric field. The description of the output characteristics&#39; gate-to-source voltage dependence and saturation is also part of the procedure. The resulting functional representations of the relevant features constitute useful tools for basic device analysis and design, as well as for formulating specific mathematical descriptive models of these features. Atomistic, quantum-mechanical simulated data of an InAs homojunction TFET are used as an example to numerically and graphically illustrate the proposed characterization procedure.

— We propose a novel systematic procedure to individually characterize relevant physical phenomena that typify tunnel FETs (TFETs) in general. The procedure uses the Lambert W function to explicitly solve the subthreshold and above-threshold transfer characteristics of TFETs, as described by a recently proposed universal TFET compact model based on Kane&amp;#39;s tunneling formulation. The resulting explicit analytic solutions may be used to numerically calculate, and thus to reveal, the terminal voltage-dependent functionalities of the device&amp;#39;s subthreshold current swing and effective electric field. The description of the output characteristics&amp;#39; gate-to-source voltage dependence and saturation is also part of the procedure. The resulting functional representations of the relevant features constitute useful tools for basic device analysis and design, as well as for formulating specific mathematical descriptive models of these features. Atomistic, quantum-mechanical simulated data of an InAs homojunction TFET are used as an example to numerically and graphically illustrate the proposed characterization procedure.