BTS711L1

Smart Four Channel Highside Power Switch

Features

Overload protection
Current limitation
Short-circuit protection
Thermal shutdown
Overvoltage protection
(including load dump)
Fast demagnetization of inductive loads
Reverse battery protection1)
Undervoltage and overvoltage shutdown
with auto-restart and hysteresis
Open drain diagnostic output
Open load detection in ON-state
CMOS compatible input
Loss of ground and loss of Vbb protection
Electrostatic discharge (ESD) protection

Product Summary
Overvoltage Protection
Operating voltage
active channels:
On-state resistance RON
Nominal load current IL(NOM)
Current limitation
IL(SCr)

43
V
Vbb(AZ)
Vbb(on)
5.0 ... 34
V
two parallel four parallel
one
200
100
50
m
1.9
2.8
4.4
A
4
4
4
A

P-DSO-20

Application

C compatible power switch with diagnostic feedback

for 12 V and 24 V DC grounded loads
All types of resistive, inductive and capacitive loads
Replaces electromechanical relays and discrete circuits

General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic

feedback, monolithically integrated in Smart SIPMOS technology.

Providing embedded protective functions.
Pin Definitions and Functions
Pin
1,10,
11,12,
15,16,
19,20
3
5
7
9
18
17
14
13
4
8
2
6
1)

Symbol Function
Vbb
Positive power supply voltage. Design the
wiring for the simultaneous max. short circuit
currents from channel 1 to 4 and also for low
thermal resistance
IN1
Input 1 .. 4, activates channel 1 .. 4 in case of
IN2
logic high signal
IN3
IN4
OUT1
Output 1 .. 4, protected high-side power output
OUT2
of channel 1 .. 4. Design the wiring for the
OUT3
max. short circuit current
OUT4
ST1/2
Diagnostic feedback 1/2 of channel 1 and
channel 2, open drain, low on failure
ST3/4
Diagnostic feedback 3/4 of channel 3 and
channel 4, open drain, low on failure
GND1/2 Ground 1/2 of chip 1 (channel 1 and channel 2)
GND3/4 Ground 3/4 of chip 2 (channel 3 and channel 4)

Pin configuration (top view)

Vbb
GND1/2
IN1
ST1/2
IN2
GND3/4
IN3
ST3/4
IN4
Vbb

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12
11

Vbb
Vbb
OUT1
OUT2
Vbb
Vbb
OUT3
OUT4
Vbb
Vbb

With external current limit (e.g. resistor RGND=150 ) in GND connection, resistor in series with ST
connection, reverse load current limited by connected load.

Semiconductor Group

2003-Oct-01

BTS711L1
Block diagram
Four Channels; Open Load detection in on state;

Voltage
source

Overvoltage
protection

Current
limit 1

+ V bb

Gate 1
protection

Channel 1

V Logic

IN1

IN2

ST1/2

Voltage

Level shifter

sensor

Rectifier 1

Logic

ESD

Signal GND
Chip 1

Current
limit 2

Level shifter
Rectifier 2

GND1/2

OUT1

18

Temperature
sensor 1

Open load
Short to Vbb
detection 1

Charge
pump 1
Charge
pump 2

Limit for
unclamped
ind. loads 1

Leadframe

Gate 2
protection

Limit for
unclamped
ind. loads 2
Open load
Short to Vbb
detection 2

Chip 1

Channel 2

OUT2

17
Load

Temperature
sensor 2
R

R
O1
O2
GND1/2
Load GND
+ V bb

Leadframe

Channel 3

OUT3

Logic and protection circuit of chip 2

14

(equivalent to chip 1)
7

IN3

IN4

ST3/4
Channel 4

OUT4

Load

GND3/4

PROFET
Signal GND
Chip 2

13

Chip 2

R
O3
O4
GND3/4
Load GND

Leadframe connected to pin 1, 10, 11, 12, 15, 16, 19, 20

Semiconductor Group

2003-Oct-01

BTS711L1
Maximum Ratings at Tj = 25C unless otherwise specified
Parameter

Symbol

Supply voltage (overvoltage protection see page 4)

Supply voltage for full short circuit protection
Tj,start = -40 ...+150C
Load current (Short-circuit current, see page 5)
Load dump protection2) VLoadDump = UA + Vs, UA = 13.5 V
RI3) = 2 , td = 200 ms; IN = low or high,
each channel loaded with RL = 7.1 ,
Operating temperature range
Storage temperature range
Power dissipation (DC)5
Ta = 25C:
(all channels active)
Ta = 85C:
Inductive load switch-off energy dissipation, single pulse
Vbb = 12V, Tj,start = 150C5),
IL = 1.9 A, ZL = 66 mH, 0
one channel:
two parallel channels:
IL = 2.8 A, ZL = 66 mH, 0
IL = 4.4 A, ZL = 66 mH, 0
four parallel channels:

Vbb
Vbb

Values

Unit
43
34

V
V

self-limited
60

A
V

Tj
Tstg
Ptot

-40 ...+150
-55 ...+150
3.6
1.9

EAS

150
320
800

mJ

VESD

1.0

kV

-10 ... +16

2.0
5.0

V
mA

16
44
35

K/W

IL
VLoad
4)
dump

see diagrams on page 9 and page 10

Electrostatic discharge capability (ESD)

(Human Body Model)
Input voltage (DC)
Current through input pin (DC)
Current through status pin (DC)

VIN
IIN
IST

see internal circuit diagram page 8

Thermal resistance
junction - soldering point5),6)
junction - ambient5)

2)

3)
4)
5)
6)

each channel:
one channel active:
all channels active:

Rthjs
Rthja

Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a
150 resistor in the GND connection and a 15 k resistor in series with the status pin. A resistor for input
protection is integrated.
RI = internal resistance of the load dump test pulse generator
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70m thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 15
Soldering point: upper side of solder edge of device pin 15. See page 15

Semiconductor Group

2003-Oct-01

BTS711L1
Electrical Characteristics
Parameter and Conditions, each of the four channels

Symbol

at Tj = 25 C, Vbb = 12 V unless otherwise specified

Load Switching Capabilities and Characteristics

On-state resistance (Vbb to OUT)
IL = 1.8 A
each channel,
Tj = 25C: RON
Tj = 150C:
two parallel channels, Tj = 25C:
four parallel channels, Tj = 25C:
Nominal load current
one channel active:
two parallel channels active:
four parallel channels active:
Device on PCB5), Ta = 85C, Tj 150C
Output current while GND disconnected or pulled
up; Vbb = 30 V, VIN = 0, see diagram page 9
Turn-on time
to 90% VOUT:
Turn-off time
to 10% VOUT:
RL = 12 , Tj =-40...+150C
Slew rate on
10 to 30% VOUT, RL = 12 ,
Tj =-40...+150C:
Slew rate off
70 to 40% VOUT, RL = 12 ,
Tj =-40...+150C:
Operating Parameters
Operating voltage7)
Undervoltage shutdown
Undervoltage restart

Tj =-40...+150C:
Tj =-40...+150C:
Tj =-40...+25C:
Tj =+150C:
Undervoltage restart of charge pump
see diagram page 14
Tj =-40...+150C:
Undervoltage hysteresis
Vbb(under) = Vbb(u rst) - Vbb(under)
Overvoltage shutdown
Tj =-40...+150C:
Overvoltage restart
Tj =-40...+150C:
Overvoltage hysteresis
Tj =-40...+150C:
Overvoltage protection8)
Tj =-40...+150C:
I bb = 40 mA

7)
8)

Values
min
typ
max

--

Unit

165
320

200
400

1.7
2.6
4.1

83
42
1.9
2.8
4.4

100
50
--

--

--

10

mA

ton
toff

80
80

200
200

400
400

dV/dton

0.1

--

V/s

-dV/dtoff

0.1

--

V/s

Vbb(on)
Vbb(under)
Vbb(u rst)

5.0
3.5
--

----

V
V
V

Vbb(ucp)

--

5.6

34
5.0
5.0
7.0
7.0

Vbb(under)

--

0.2

--

Vbb(over)
Vbb(o rst)
Vbb(over)
Vbb(AZ)

34
33
-42

--0.5
47

43
----

V
V
V
V

IL(NOM)

IL(GNDhigh)

At supply voltage increase up to Vbb = 5.6 V typ without charge pump, VOUT Vbb - 2 V
see also VON(CL) in circuit diagram on page 8.

Semiconductor Group

2003-Oct-01

BTS711L1
Parameter and Conditions, each of the four channels

Symbol

at Tj = 25 C, Vbb = 12 V unless otherwise specified

Values
min
typ
max

Unit

----

28
44
--

60
70
12

---

2
8

3
12

mA

each channel, Tj =-40C: IL(SCp)

5.5
9.5
13
4.5
7.5
11
Tj =25C:
2.5
4.5
7
Tj =+150C:
two parallel channels
twice the current of one channel
four parallel channels
four times the current of one channel
Repetitive short circuit current limit,
Tj = Tjt
each channel IL(SCr)
-4
--4
-two parallel channels
-4
-four parallel channels

Standby current, all channels off

Tj =25C: Ibb(off)
Tj =150C:
VIN = 0
Leakage output current (included in Ibb(off))
IL(off)
VIN = 0
Operating current 9), VIN = 5V, Tj =-40...+150C
IGND = IGND1/2 + IGND3/4,
one channel on: IGND
four channels on:

Protection Functions10)
Initial peak short circuit current limit, (see timing
diagrams, page 12)

(see timing diagrams, page 12)

Initial short circuit shutdown time

Tj,start =-40C: toff(SC)

Tj,start = 25C:

---

5.5
4

---

ms

--

47

--

150
--

-10

---

C
K

---

-610

32
--

V
mV

(see page 11 and timing diagrams on page 12)

Output clamp (inductive load switch off)11)

at VON(CL) = Vbb - VOUT
Thermal overload trip temperature
Thermal hysteresis

VON(CL)
Tjt
Tjt

Reverse Battery
Reverse battery voltage 12)
Drain-source diode voltage (Vout > Vbb)
IL = - 1.9 A, Tj = +150C

-Vbb
-VON

9)

Add IST, if IST > 0

Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
11) If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
VON(CL)
12) Requires a 150 resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal
operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature
protection is not active during reverse current operation! Input and Status currents have to be limited (see
max. ratings page 3 and circuit page 8).
10)

Semiconductor Group

2003-Oct-01

BTS711L1
Parameter and Conditions, each of the four channels

Symbol

at Tj = 25 C, Vbb = 12 V unless otherwise specified

Values
min
typ
max

Diagnostic Characteristics
Open load detection current, (on-condition)
10
-200
each channel, Tj = -40C: I L (OL)
10
-150
Tj = 25C:
10
-150
Tj = 150C:
twice the current of one channel
two parallel channels
four times the current of one channel
four parallel channels
13
)
Open load detection voltage
Tj =-40..+150C: VOUT(OL)
2
3
4
Internal output pull down
(OUT to GND), VOUT = 5 V
Tj =-40..+150C: RO
4
10
30
1

Input and Status Feedback14)

Input resistance
(see circuit page 8)

Unit

mA

V
k

RI

2.5

3.5

VIN(T+)

1.7

--

3.5

VIN(T-)

1.5

--

--

-1

0.5
--

-50

V
A

20

50

90

td(ST OL4)

100

320

800

td(ST OL5)

--

20

td(ST)

--

200

600

5.4
---

6.1
---

-0.4
0.6

Tj =-40..+150C:

Input turn-on threshold voltage

Tj =-40..+150C:
Input turn-off threshold voltage
Tj =-40..+150C:
Input threshold hysteresis
Off state input current
VIN = 0.4 V:
Tj =-40..+150C:
On state input current
VIN = 5 V:
Tj =-40..+150C:
Delay time for status with open load after switch
off (other channel in off state)
(see timing diagrams, page 13),
Tj =-40..+150C:
Delay time for status with open load after switch
off (other channel in on state)
(see timing diagrams, page 13),
Tj =-40..+150C:
Status invalid after positive input slope
(open load)
Tj =-40..+150C:
Status output (open drain)
Zener limit voltage Tj =-40...+150C, IST = +1.6 mA:
ST low voltage
Tj =-40...+25C, IST = +1.6 mA:
Tj = +150C, IST = +1.6 mA:

13)
14)

VIN(T)
IIN(off)
IIN(on)

VST(high)
VST(low)

External pull up resistor required for open load detection in off state.
If ground resistors RGND are used, add the voltage drop across these resistors.

Semiconductor Group

2003-Oct-01

BTS711L1
Truth Table
Channel 1 and 2
Channel 3 and 4
(equivalent to channel 1 and 2)

IN1
IN3

Chip 1
Chip 2

Normal operation

Open load

Channel 1 (3)

Channel 2 (4)

Short circuit to Vbb

Channel 1 (3)

Channel 2 (4)

Overtemperature

both channel

Channel 1 (3)
Channel 2 (4)
Undervoltage/ Overvoltage

L = "Low" Level
H = "High" Level

IN2
IN4

OUT1
OUT3

OUT2
OUT4

L
L
H
H
L
L
H

L
H
L
H
L
H
X

L
L
H
H
Z
Z
H

L
H
L
H
L
H
X

L
H
X
L
L
H

L
L
H
L
H
X

L
H
X
H
H
H

Z
Z
H
L
H
X

L
H
X
L
X
H
L
H
X
X
X

L
L
H
L
H
X
X
X
L
H
X

L
H
X
L
L
L
L
L
X
X
L

H
H
H
L
L
L
X
X
L
L
L

ST1/2
ST3/4

ST1/2
ST3/4

BTS 711L1

BTS 712N1

H
H
H
H

H
H
H
H
L
H
H

H(L15))
H
L
H(L15))
H
L

L
H
H
L16)
H
H

L16)
H
H(L17))
L16)
H
H(L17))
H
L
L
H
L
H
L
H

L16)
H
H
H
L
L
H
L
H
L
H

X = don't care
Z = high impedance, potential depends on external circuit
Status signal valid after the time delay shown in the timing diagrams

Parallel switching of channel 1 and 2 (also channel 3 and 4) is easily possible by connecting the inputs and
outputs in parallel (see truth table). If switching channel 1 to 4 in parallel, the status outputs ST1/2 and ST3/4
have to be configured as a 'Wired OR' function with a single pull-up resistor.

Terms
V
bb

Ibb

V
ON1
V
ON2

Leadframe
I IN1
I IN2
I ST1/2

V
IN1 VIN2 VST1/2

3
5
4

IN1
IN2

Vbb
OUT1
PROFET
Chip 1

OUT2

ST1/2 GND1/2
2
R

I
GND1/2

18

I L1

17

I L2

I IN4
I ST3/4

V
OUT1

V
IN3 VIN4 VST3/4

7
9
8

IN3
IN4

Vbb
OUT3
PROFET
Chip 2

OUT4

ST3/4 GND3/4
6

VOUT2
R

GND1/2

V
ON3
V
ON4

Leadframe
I IN3

I
GND3/4

14

I L3

13

I L4
V
OUT3
VOUT4

GND3/4

Leadframe (Vbb) is connected to pin 1,10,11,12,15,16,19,20

External RGND optional; two resistors RGND1/2 ,RGND3/4 = 150 or a single resistor RGND = 75 for
reverse battery protection up to the max. operating voltage.
15)

With additional external pull up resistor

An external short of output to Vbb in the off state causes an internal current from output to ground. If RGND is
used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious.
17) Low resistance to V may be detected by no-load-detection
bb
16)

Semiconductor Group

2003-Oct-01

BTS711L1
Overvoltage protection of logic part

Input circuit (ESD protection), IN1...4

R
IN

GND1/2 or GND3/4
+ V bb

ESD-ZD I

RI

IN

Z2

IN

Logic

GND

ST

R ST

Z1

ESD zener diodes are not to be used as voltage clamp at

DC conditions. Operation in this mode may result in a
drift of the zener voltage (increase of up to 1 V).

GND

R GND
Signal GND

Status output, ST1/2 or ST3/4

VZ1 = 6.1 V typ., VZ2 = 47 V typ., RI = 3.5 k typ.,

RGND = 150

+5V

R ST(ON)

Reverse battery protection

ST

5V

ESDZD

GND

R ST
IN

- Vbb

RI

Logic

ST

ESD-Zener diode: 6.1 V typ., max 5.0 mA;

RST(ON) < 380 at 1.6 mA, ESD zener diodes are not to
be used as voltage clamp at DC conditions. Operation in
this mode may result in a drift of the zener voltage
(increase of up to 1 V).

OUT
Power
Inverse
Diode

GND
RGND
Signal GND

Inductive and overvoltage output

clamp, OUT1...4

RL
Power GND

RGND = 150 , RI = 3.5 k typ,

Temperature protection is not active during inverse
current operation.

+Vbb
VZ
V

ON

OUT

PROFET
Power GND

VON clamped to VON(CL) = 47 V typ.

.

Semiconductor Group

2003-Oct-01

BTS711L1
Open-load detection, OUT1...4
ON-state diagnostic condition:
VON < RONIL(OL); IN high

GND disconnect with GND pull up

(channel 1/2 or 3/4)
+ V bb

Vbb

IN2

PROFET

ST

GND

OUT1

IN1
V

VON

ON

IN1

OUT2

IN2

OUT

Open load
detection

Logic
unit

V
bb

ST

GND

Any kind of load. If VGND > VIN - VIN(T+) device stays off
Due to VGND > 0, no VST = low signal available.

OFF-state diagnostic condition:

VOUT > 3 V typ.; IN low

Vbb disconnect with energized inductive

load
R

EXT

OFF

IN2

PROFET

ST

GND

OUT1

Open load
detection

OUT

OUT2

V
Signal GND

bb

For an inductive load current up to the limit defined by EAS

(max. ratings see page 3 and diagram on page 10) each
switch is protected against loss of Vbb.

GND disconnect

Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load the whole load
current flows through the GND connection.

(channel 1/2 or 3/4)

Vbb

high
V

Logic
unit

IN1

Ibb
bb
IN1

Vbb

IN2

PROFET

OUT1
OUT2
ST
V

GND

V
V
IN1 IN2 ST

V
GND

Any kind of load. In case of IN = high is VOUT VIN - VIN(T+).

Due to VGND > 0, no VST = low signal available.

Semiconductor Group

2003-Oct-01

BTS711L1
Inductive load switch-off energy
dissipation

Typ. on-state resistance

RON = f (Vbb,Tj ); IL = 1.8 A, IN = high

E bb
E AS
ELoad

Vbb

IN

450

PROFET

OUT

400

ST
GND

ZL

{
R

EL

ER

Tj = 150C

300
85C

200

EL = 1/2LI L

-40C

100

EAS= Ebb + EL - ER= VON(CL)iL(t) dt,

50

with an approximate solution for RL > 0 :

ln (1+ |V

25C

150

While demagnetizing load inductance, the energy

dissipated in PROFET is

IL L
(V + |VOUT(CL)|)
2RL bb

350

250

Energy stored in load inductance:

EAS=

RON [mOhm]
500

ILRL

OUT(CL)|

10

20

30

40

Vbb [V]

Typ. open load detection current

Maximum allowable load inductance for

a single switch off (one channel)5)

IL(OL) = f (Vbb,Tj ); IN = high

L = f (IL ); Tj,start = 150C, Vbb = 12 V, RL = 0

IL(OL) [mA]

L [mH]
1000

140
-40C

120

100

80
60
40

10

25C

no load detection not specified

for V bb < 6 V

100

85C

Tj = 150C

20
0
0

1
1

1.5

2.5

10

15

20

25

30

Vbb [V]

IL [A]

Semiconductor Group

10

2003-Oct-01

BTS711L1
Typ. standby current
Ibb(off) = f (Tj ); Vbb = 9...34 V, IN1...4 = low
Ibb(off) [A]
60

50

40

30

20

10

0
-50

50

100

150

200

Tj [C]

Typ. initial short circuit shutdown time

toff(SC) = f (Tj,start ); Vbb =12 V
toff(SC) [msec]
6

0
-50

50

100

150

200

Tj,start [C]

Semiconductor Group

11

2003-Oct-01

BTS711L1

Timing diagrams
Timing diagrams are shown for chip 1 (channel 1/2). For chip 2 (channel 3/4) the diagrams
are valid too. The channels 1 and 2, respectively 3 and 4, are symmetric and consequently
the diagrams are valid for each channel as well as for permuted channels
Figure 2b: Switching an inductive load

Figure 1a: Vbb turn on:

IN1

IN
IN2

V bb

t d(ST)

ST
*)

OUT1

OUT

OUT2

IL
I L(OL)

ST open drain

*) if the time constant of load is too large, open-load-status may

occur

Figure 2a: Switching a lamp:

Figure 3a: Turn on into short circuit:

shut down by overtemperature, restart by cooling

IN
IN1

other channel: normal operation

ST
I

L1

OUT

L(SCp)
I

L(SCr)

t
ST

off(SC)

t
t
The initial peak current should be limited by the lamp and not by
the initial short circuit current IL(SCp) = 7.5 A typ. of the device.

Semiconductor Group

12

Heating up of the chip may require several milliseconds, depending

on external conditions (toff(SC) vs. Tj,start see page 11)

2003-Oct-01

BTS711L1
Figure 5a: Open load: detection in ON-state, open
load occurs in on-state

Figure 3b: Turn on into short circuit:

shut down by overtemperature, restart by cooling
(two parallel switched channels 1 and 2)

IN1

IN1/2

IN2
I

+I

L1

channel 2: normal operation

L2

I L(SCp)
VOUT1

I L(SCr)

channel 1:
open
load

I L1

t
ST1/2

off(SC)

t d(ST OL1)

open
load

normal
load

t d(ST OL2)

t d(ST OL1)

t d(ST OL2)

ST
t

t
td(ST OL1) = 30 s typ., td(ST OL2) = 20 s typ

Figure 4a: Overtemperature:

Reset if Tj <Tjt

Figure 5b: Open load: detection in ON-state, turn

on/off to open load

IN

IN1

IN2

channel 2: normal operation

ST

V
OUT1

OUT

L1

channel 1: open load

d(ST)

d(ST OL4)

d(ST)

d(ST OL5)

ST
t
The status delay time td(STOL4) allows to distinguish between the
failure modes "open load in ON-state" and "overtemperature".

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BTS711L1
Figure 5c: Open load: detection in ON- and OFF-state
(with REXT), turn on/off to open load

VON(CL)

V on

IN1

off-state

OUT1

I L1

bb(u rst)

V
ST

t d(ST)

d(ST)

channel 1: open load

t d(ST OL5)

bb(over)

off-state

channel 2: normal operation

on-state

IN2

Figure 6b: Undervoltage restart of charge pump

bb(o rst)

bb(u cp)

bb(under)

V bb

t
IN = high, normal load conditions.
Charge pump starts at Vbb(ucp) = 5.6 V typ.

td(ST OL5) depends on external circuitry because of high

impedance

Figure 6a: Undervoltage:

Figure 7a: Overvoltage:

IN

IN

Vbb

bb
V

bb(under)

V ON(CL)

Vbb(over)

V bb(o rst)

Vbb(u cp)
Vbb(u rst)
V

OUT

V OUT

ST

ST open drain
t

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BTS711L1

Package and Ordering Code

Standard P-DSO-20-9
BTS711L1

Ordering Code
Q67060-S7000-A2

All dimensions in millimetres

1) Does not include plastic or metal protrusions of 0.15 max per side
2) Does not include dambar protrusion of 0.05 max per side

Definition of soldering point with temperature Ts:

upper side of solder edge of device pin 15.

Pin 15

Printed circuit board (FR4, 1.5mm thick, one layer 70m, 6cm2 active heatsink area) as a reference for max.
power dissipation Ptot, nominal load current IL(NOM) and thermal resistance Rthja

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BTS711L1
Published by
Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81669 Mnchen
Infineon Technologies AG 2001
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and
charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
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For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in
Germany or our Infineon Technologies Representatives worldwide (see address list).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in question please contact
your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon
Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to
affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body,
or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or
other persons may be endangered.

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