sp3232 PDF
sp3232 PDF
sp3232 PDF
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This Datasheet is presented by Dieses Datenblatt wird vom Cette fiche technique est
the manufacturer Hersteller bereitgestellt présentée par le fabricant
SP3222E/3232E
®
DESCRIPTION
The SP3222E/3232E series is an RS-232 transceiver solution intended for portable or hand-
held applications such as notebook or palmtop computers. The SP3222E/3232E series has
a high-efficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V
operation. This charge pump allows the SP3222E/3232E series to deliver true RS-232
performance from a single power supply ranging from +3.3V to +5.0V. The SP3222E/3232E
are 2-driver/2-receiver devices. This series is ideal for portable or hand-held applications such
as notebook or palmtop computers. The ESD tolerance of the SP3222E/3232E devices are
over ±15kV for both Human Body Model and IEC1000-4-2 Air discharge test methods. The
SP3222E device has a low-power shutdown mode where the devices' driver outputs and
charge pumps are disabled. During shutdown, the supply current falls to less than 1µA.
SELECTION TABLE
RS-232 RS-232 External TTL No. of
MODEL Power Supplies Shutdown
Drivers Receivers Components 3-State Pins
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS Input Voltages
These are stress ratings only and functional operation of the TxIN, EN ................................................... -0.3V to +6.0V
device at these ratings or any other above those indicated in RxIN .......................................................................... ±15V
the operation sections of the specifications below is not Output Voltages
implied. Exposure to absolute maximum rating conditions TxOUT ...................................................................... ±15V
for extended periods of time may affect reliability and cause RxOUT ........................................... -0.3V to (VCC + 0.3V)
permanent damage to the device.
Short-Circuit Duration
VCC................................................................-0.3V to +6.0V TxOUT ............................................................ Continuous
V+ (NOTE 1)................................................-0.3V to +7.0V Storage Temperature .............................. -65°C to +150°C
V- (NOTE 1)................................................+0.3V to -7.0V
Power Dissipation Per Package
V+ + |V-| (NOTE 1)....................................................+13V
20-pin SSOP (derate 9.25mW/oC above +70oC) ..... 750mW
18-pin PDIP (derate 15.2mW/oC above +70oC) .... 1220mW
ICC (DC VCC or GND current).................................±100mA
18-pin SOIC (derate 15.7mW/oC above +70oC) ... 1260mW
20-pin TSSOP (derate 11.1mW/oC above +70oC) .. 890mW
16-pin SSOP (derate 9.69mW/oC above +70oC) ..... 775mW
16-pin PDIP (derate 14.3mW/oC above +70oC) .... 1150mW
16-pin Wide SOIC (derate 11.2mW/oC above +70oC) 900mW
16-pin TSSOP (derate 10.5mW/oC above +70oC) .. 850mW
16-pin nSOIC (derate 13.57mW/°C above +70°C) .. 1086mW
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.0V with TAMB = TMIN to TMAX
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
2
ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.0V with TAMB = TMIN to TMAX.
Typical Values apply at VCC = +3.3V or +5.0V and TAMB = 25oC.
RECEIVER INPUTS
Input Resistance 3 5 7 kΩ
TIMING CHARACTERISTICS
Maximum Data Rate 120 235 kbps RL=3kΩ, CL=1000pF, one driver switching
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
3
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 120kbps data rates, all drivers
loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
14
6
12
Transmitter Output Voltage [V]
4
10
Vout+
Figure 1. Transmitter Output Voltage VS. Load Figure 2. Slew Rate VS. Load Capacitance for the
Capacitance for the SP3222 and the SP3232 SP3222 and the SP3232
50
45 118KHz
60KHz
10KHz
40
35
30
Supply Current [mA]
25
20
15
10
0
0 500 1000 1500 2000 2330
Load Capacitance [pF]
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
4
PIN NUMBER
GND Ground. 16 18 15
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
5
EN 1 20 SHDN EN 1 18 SHDN
C1+ 2 19 VCC C1+ 2 17 VCC
V+ 3 18 GND V+ 3 16 GND
C1- 4 17 T1OUT C1- 4 15 T1OUT
C2+ 5 SP3222E 16 R1IN C2+ 5 SP3222E 14 R1IN
C2- 6 15 R1OUT C2- 6 13 R1OUT
V- 7 14 N.C. V- 7 12 T1IN
T2OUT 8 13 T1IN T2OUT 8 11 T2IN
R2IN 9 12 T2IN R2IN 9 10 R2OUT
R2OUT 10 11 N.C.
DIP/SO
SSOP/TSSOP
C1+ 1 16 VCC
V+ 2 15 GND
C1- 3 14 T1OUT
C2+ 4 SP3232E 13 R1IN
C2- 5 12 R1OUT
V- 6 11 T1IN
T2OUT 7 10 T2IN
R2IN 8 9 R2OUT
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
6
VCC VCC
+ 19 + 17
C5 0.1µF C5 0.1µF
VCC VCC
2 C1+ 3 2 C1+ 3
+ V+ + + V+ +
C1 0.1µF *C3 0.1µF C1 0.1µF *C3 0.1µF
4 C1- 4 C1-
5 C2+ SP3222E V- 7 5 C2+ SP3222E V- 7
+ + DIP/SO
C2 0.1µF SSOP C4 0.1µF C2 0.1µF C4 0.1µF
6 C2- TSSOP + 6 C2- +
1 EN 20 1 EN 18
SHDN SHDN
GND GND
*can be returned to *can be returned to
18 16 either VCC or GND
either VCC or GND
VCC
+ 16
C5 0.1µF
VCC
1 C1+ 2
+ V+ +
C1 0.1µF *C3 0.1µF
3 C1-
4 C2+ SP3232E V-
6
+
C2 0.1µF C4 0.1µF
5 C2- +
11 T1IN T1OUT 14
LOGIC RS-232
INPUTS 10 T2IN T2OUT 7 OUTPUTS
12 R1OUT R1IN 13
GND
*can be returned to
15 either VCC or GND
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
7
DESCRIPTION
The SP3222E/3232E transceivers meet the EIA/ The slew rate of the driver output is internally
TIA-232 and V.28/V.24 communication proto- limited to a maximum of 30V/µs in order to meet
cols and can be implemented in battery-pow- the EIA standards (EIA RS-232D 2.1.7, Para-
ered, portable, or hand-held applications such as graph 5). The transition of the loaded output
notebook or palmtop computers. The SP3222E/ from HIGH to LOW also meets the monotonic-
3232E devices all feature Sipex's proprietary ity requirements of the standard.
on-board charge pump circuitry that generates 2
x VCC for RS-232 voltage levels from a single The SP3222E/3232E drivers can maintain high
+3.0V to +5.5V power supply. This series is data rates up to 235Kbps fully loaded. Figure 8
ideal for +3.3V-only systems, mixed +3.3V to shows a loopback test circuit used to test the
+5.5V systems, or +5.0V-only systems that re- RS-232 drivers. Figure 9 shows the test results
quire true RS-232 performance. The SP3222E/ of the loopback circuit with all drivers active at
3232E series have drivers that operate at a typi- 120Kbps with RS-232 loads in parallel with
cal data rate of 235Kbps fully loaded. 1000pF capacitors. Figure 10 shows the test
results where one driver was active at 235Kbps
The SP3222E and SP3232E are 2-driver/2-re- and all drivers loaded with an RS-232 receiver
ceiver devices ideal for portable or hand-held in parallel with a 1000pF capacitor. A solid
applications. The SP3222E features a 1µA RS-232 data transmission rate of 120Kbps
shutdown mode that reduces power consump- provides compatibility with many designs
tion and extends battery life in portable systems. in personal computer peripherals and LAN
Its receivers remain active in shutdown mode, applications.
allowing external devices such as modems to be
monitored using only 1µA supply current. The SP3222E driver's output stages are turned
off (tri-state) when the device is in shutdown
THEORY OF OPERATION mode. When the power is off, the SP3222E
device permits the outputs to be driven up to
The SP3222E/3232E series are made up of three ±12V. The driver's inputs do not have pull-up
basic circuit blocks: 1. Drivers, 2. Receivers, resistors. Designers should connect unused
and 3. the Sipex proprietary charge pump. inputs to VCC or GND.
8
VCC
+
C5 0.1µF
VCC
+ C1+ V+ +
C1 0.1µF C3 0.1µF
C1-
C2+ SP3222E V-
+ SP3232E
C2 0.1µF C4 0.1µF
+
C2-
GND
1000pF
* SP3222 only
Figure 8. SP3222E/3232E Driver Loopback Test Circuit
[ T ] [ T ]
T T
T1 IN 1 T1 IN 1
T1 OUT 2 T1 OUT 2
T T
T T
R1 OUT 3 R1 OUT 3
Ch1 5.00V Ch2 5.00V M 5.00µs Ch1 0V Ch1 5.00V Ch2 5.00V M 2.50µs Ch1 0V
Ch3 5.00V Ch3 5.00V
Figure 9. Driver Loopback Test Results at 120kbps Figure 10. Driver Loopback Test Results at 235kbps
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
9
Receivers In most circumstances, decoupling the power
The receivers convert EIA/TIA-232 levels to supply can be achieved adequately using a 0.1µF
TTL or CMOS logic output levels. All receivers bypass capacitor at C5 (refer to Figures 6 and 7).
have an inverting tri-state output. These receiver In applications that are sensitive to power-sup-
outputs (RxOUT) are tri-stated when the enable ply noise, decouple VCC to ground with a capaci-
control EN = HIGH. In the shutdown mode, the tor of the same value as charge-pump capacitor
receivers can be active or inactive. EN has no C1. Physically connect bypass capacitors as
effect on TxOUT. The truth table logic of the close to the IC as possible.
SP3222E/3232E driver and receiver outputs can
be found in Table 2. The charge pumps operate in a discontinuous
mode using an internal oscillator. If the output
Since receiver input is usually from a transmis- voltages are less than a magnitude of 5.5V, the
sion line where long cable lengths and system charge pumps are enabled. If the output voltage
interference can degrade the signal, the inputs exceed a magnitude of 5.5V, the charge pumps
have a typical hysteresis margin of 300mV. This are disabled. This oscillator controls the four
ensures that the receiver is virtually immune to phases of the voltage shifting. A description of
noisy transmission lines. Should an input be left each phase follows.
unconnected, a 5kΩ pulldown resistor to ground
will commit the output of the receiver to a HIGH Phase 1
state. — VSS charge storage — During this phase of
the clock cycle, the positive side of capacitors C1
Charge Pump and C2 are initially charged to VCC. Cl+ is then
switched to GND and the charge in C1– is trans-
The charge pump is a Sipex–patented design ferred to C2–. Since C2+ is connected to VCC, the
(5,306,954) and uses a unique approach com- voltage potential across capacitor C2 is now 2
pared to older less–efficient designs. The charge times VCC.
pump still requires four external capacitors, but
uses a four–phase voltage shifting technique to Phase 2
attain symmetrical 5.5V power supplies. The — VSS transfer — Phase two of the clock con-
internal power supply consists of a regulated nects the negative terminal of C2 to the VSS
dual charge pump that provides output voltages storage capacitor and the positive terminal of C2
5.5V regardless of the input voltage (VCC) over to GND. This transfers a negative generated
the +3.0V to +5.5V range. voltage to C3. This generated voltage is regu-
lated to a minimum voltage of -5.5V. Simulta-
neous with the transfer of the voltage to C3, the
positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND.
SHDN EN TxOUT RxOUT
Phase 3
0 0 Tri-state Active
— VDD charge storage — The third phase of the
0 1 Tri-state Tri-state clock is identical to the first phase — the charge
transferred in C1 produces –VCC in the negative
1 0 Active Active terminal of C1, which is applied to the negative
side of capacitor C2. Since C2+ is at VCC, the
1 1 Active Tri-state
voltage potential across C2 is 2 times VCC.
Table 2. Truth Table Logic for Shutdown and Enable
Control
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
10
Phase 4 potential to store electro-static energy and
— VDD transfer — The fourth phase of the clock discharge it to an integrated circuit. The
connects the negative terminal of C2 to GND, simulation is performed by using a test model as
and transfers this positive generated voltage shown in Figure 17. This method will test the
across C2 to C4, the VDD storage capacitor. This IC’s capability to withstand an ESD transient
voltage is regulated to +5.5V. At this voltage, during normal handling such as in manufacturing
the internal oscillator is disabled. Simultaneous areas where the ICs tend to be handled
with the transfer of the voltage to C4, the positive frequently.
side of capacitor C1 is switched to VCC and the
negative side is connected to GND, allowing the The IEC-1000-4-2, formerly IEC801-2, is
charge pump cycle to begin again. The charge generally used for testing ESD on equipment
pump cycle will continue as long as the opera- and systems. For system manufacturers, they
tional conditions for the internal oscillator are must guarantee a certain amount of ESD
present. protection since the system itself is exposed to
the outside environment and human presence.
Since both V+ and V– are separately generated The premise with IEC1000-4-2 is that the
from VCC; in a no–load condition V+ and V– will system is required to withstand an amount of
be symmetrical. Older charge pump approaches static electricity when ESD is applied to points
that generate V– from V+ will show a decrease in and surfaces of the equipment that are
the magnitude of V– compared to V+ due to the accessible to personnel during normal usage.
inherent inefficiencies in the design. The transceiver IC receives most of the ESD
current when the ESD source is applied to the
The clock rate for the charge pump typically connector pins. The test circuit for IEC1000-4-2
operates at 250kHz. The external capacitors can is shown on Figure 18. There are two methods
be as low as 0.1µF with a 16V breakdown within IEC1000-4-2, the Air Discharge method
voltage rating. and the Contact Discharge method.
11
VCC = +5V
+5V C4
+ – VDD Storage Capacitor
+ +
C1 C2
– – – +
VSS Storage Capacitor
–5V –5V C3
C4
+ – VDD Storage Capacitor
+ +
C1 C2
– – – +
VSS Storage Capacitor
–10V C3
+6V
a) C2+
GND 1 T
GND 2
b) C2-
T
-6V
Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 5.48V
VCC = +5V
+5V C4
+ – VDD Storage Capacitor
+ +
C1 C2
– – – +
VSS Storage Capacitor
–5V –5V C3
+10V C4
+ – VDD Storage Capacitor
+ +
C1 C2
– – – +
VSS Storage Capacitor
C3
12
R
RC R
RSS
C
SW1
SW1 SW2
SW2
Device
DC Power C
CSS Under
Source Test
The Contact Discharge Method applies the ESD The circuit models in Figures 17 and 18
current directly to the EUT. This method was represent the typical ESD testing circuits used
devised to reduce the unpredictability of the for all three methods. The CS is initially charged
ESD arc. The discharge current rise time is with the DC power supply when the first
constant since the energy is directly transferred switch (SW1) is on. Now that the capacitor is
without the air-gap arc. In situations such as charged, the second switch (SW2) is on while
hand held systems, the ESD charge can be SW1 switches off. The voltage stored in the
directly discharged to the equipment from a capacitor is then applied through RS, the current
person already holding the equipment. The limiting resistor, onto the device under test
current is transferred on to the keypad or the (DUT). In ESD tests, the SW2 switch is pulsed
serial port of the equipment directly and then so that the device under test receives a duration
travels through the PCB and finally to the IC. of voltage.
Contact-Discharge Module
RC RSS RV
C
SW1 SW2
Device
DC Power CSS Under
Source Test
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
13
For the Human Body Model, the current
I➙
limiting resistor (RS) and the source capacitor
(CS) are 1.5kΩ an 100pF, respectively. For 30A
IEC-1000-4-2, the current limiting resistor (RS)
and the source capacitor (CS) are 330Ω an 150pF,
respectively.
15A
The higher CS value and lower RS value in the
IEC1000-4-2 model are more stringent than the
Human Body Model. The larger storage
capacitor injects a higher voltage to the test 0A
point when SW2 is switched on. The lower
current limiting resistor increases the current t=0ns t=30ns
t➙
charge onto the test point.
Figure 19. ESD Test Waveform for IEC1000-4-2
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
14
PACKAGE: PLASTIC SHRINK
SMALL OUTLINE
(SSOP)
E H
A
Ø
A1 L
e B
DIMENSIONS (Inches)
Minimum/Maximum 16–PIN 20–PIN
(mm)
A 0.068/0.078 0.068/0.078
(1.73/1.99) (1.73/1.99)
A1 0.002/0.008 0.002/0.008
(0.05/0.21) (0.05/0.21)
B 0.010/0.015 0.010/0.015
(0.25/0.38) (0.25/0.38)
D 0.239/0.249 0.278/0.289
(6.07/6.33) (7.07/7.33)
E 0.205/0.212 0.205/0.212
(5.20/5.38) (5.20/5.38)
e 0.0256 BSC 0.0256 BSC
(0.65 BSC) (0.65 BSC)
H 0.301/0.311 0.301/0.311
(7.65/7.90) (7.65/7.90)
L 0.022/0.037 0.022/0.037
(0.55/0.95) (0.55/0.95)
Ø 0°/8° 0°/8°
(0°/8°) (0°/8°)
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
15
PACKAGE: PLASTIC
DUAL–IN–LINE
(NARROW)
E1 E
D1 = 0.005" min.
(0.127 min.)
A1 = 0.015" min.
D (0.381min.)
A = 0.210" max.
(5.334 max).
A2 C
L Ø
B1
e = 0.100 BSC B eA = 0.300 BSC
(2.540 BSC) (7.620 BSC)
ALTERNATE
END PINS
(BOTH ENDS)
DIMENSIONS (Inches)
Minimum/Maximum 16–PIN 18–PIN
(mm)
A2 0.115/0.195 0.115/0.195
(2.921/4.953) (2.921/4.953)
B 0.014/0.022 0.014/0.022
(0.356/0.559) (0.356/0.559)
B1 0.045/0.070 0.045/0.070
(1.143/1.778) (1.143/1.778)
C 0.008/0.014 0.008/0.014
(0.203/0.356) (0.203/0.356)
D 0.780/0.800 0.880/0.920
(19.812/20.320) (22.352/23.368)
E 0.300/0.325 0.300/0.325
(7.620/8.255) (7.620/8.255)
E1 0.240/0.280 0.240/0.280
(6.096/7.112) (6.096/7.112)
L 0.115/0.150 0.115/0.150
(2.921/3.810) (2.921/3.810)
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
16
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(WIDE)
E H
A
Ø
A1 L
e B
DIMENSIONS (Inches)
Minimum/Maximum 16–PIN 18–PIN
(mm)
A 0.090/0.104 0.090/0.104
(2.29/2.649) (2.29/2.649))
A1 0.004/0.012 0.004/0.012
(0.102/0.300) (0.102/0.300)
B 0.013/0.020 0.013/0.020
(0.330/0.508) (0.330/0.508)
D 0.398/0.413 0.447/0.463
(10.10/10.49) (11.35/11.74)
E 0.291/0.299 0.291/0.299
(7.402/7.600) (7.402/7.600)
H 0.394/0.419 0.394/0.419
(10.00/10.64) (10.00/10.64)
L 0.016/0.050 0.016/0.050
(0.406/1.270) (0.406/1.270)
Ø 0°/8° 0°/8°
(0°/8°) (0°/8°)
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
17
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(NARROW)
E H
h x 45°
D
A
Ø
A1 L
e B
DIMENSIONS (Inches)
Minimum/Maximum 16–PIN
(mm)
A 0.053/0.069
(1.346/1.748)
A1 0.004/0.010
(0.102/0.249)
B 0.013/0.020
(0.330/0.508)
D 0.386/0.394
(9.802/10.000)
E 0.150/0.157
(3.802/3.988)
e 0.050 BSC
(1.270 BSC)
H 0.228/0.244
(5.801/6.198)
h 0.010/0.020
(0.254/0.498)
L 0.016/0.050
(0.406/1.270)
Ø 0°/8°
(0°/8°)
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
18
PACKAGE: PLASTIC THIN
DIMENSIONS
in inches (mm) Minimum/Maximum SMALL OUTLINE
Symbol 16 Lead 20 Lead (TSSOP)
D 0.193/0.201 0.252/0.260
(4.90/5.10) (6.40/6.60)
e 0.026 BSC 0.026 BSC
(0.65 BSC) (0.65 BSC)
0.039 (1.0)
0’-8’ 12’REF
e/2
0.039 (1.0)
0.033 (0.85)
0.037 (0.95)
(θ2)
0.008 (0.20)
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
19
ORDERING INFORMATION
Model Temperature Range Package Type
SP3222ECA ............................................. 0˚C to +70˚C .......................................... 20-Pin SSOP
SP3222ECA/TR ....................................... 0˚C to +70˚C .......................................... 20-Pin SSOP
SP3222ECP ............................................. 0˚C to +70˚C ............................................ 18-Pin PDIP
SP3222ECT ............................................. 0˚C to +70˚C ........................................ 18-Pin WSOIC
SP3222ECT/TR ....................................... 0˚C to +70˚C ........................................ 18-Pin WSOIC
SP3222ECY ............................................. 0˚C to +70˚C ........................................ 20-Pin TSSOP
SP3222ECY/TR ....................................... 0˚C to +70˚C ........................................ 20-Pin TSSOP
SP3222EEA ............................................ -40˚C to +85˚C ........................................ 20-Pin SSOP
SP3222EEA/TR ...................................... -40˚C to +85˚C ........................................ 20-Pin SSOP
SP3222EEP ............................................ -40˚C to +85˚C .......................................... 18-Pin PDIP
SP3222EET ............................................ -40˚C to +85˚C ...................................... 18-Pin WSOIC
SP3222EET/TR ...................................... -40˚C to +85˚C ...................................... 18-Pin WSOIC
SP3222EEY ............................................ -40˚C to +85˚C ...................................... 20-Pin TSSOP
SP3222EEY/TR ...................................... -40˚C to +85˚C ...................................... 20-Pin TSSOP
Available in lead free packaging. To order add “-L” suffix to part number.
Example: SP3232EEN/TR = standard; SP3232EEN-L/TR = lead free
/TR = Tape and Reel
Pack quantity is 1,500 for SSOP, TSSOP or WSOIC and 2,500 for NSOIC.
Corporation
ANALOG EXCELLENCE
Sipex Corporation
Headquarters and
Sales Office
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.
Date: 02/24/05 SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers © Copyright 2005 Sipex Corporation
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EN - For pricing and availability in your local country please visit one of the below links:
DE - Informationen zu Preisen und Verfügbarkeit in Ihrem Land erhalten Sie über die unten aufgeführten Links:
FR - Pour connaître les tarifs et la disponibilité dans votre pays, cliquez sur l'un des liens suivants:
EN DE FR
This Datasheet is presented by Dieses Datenblatt wird vom Cette fiche technique est
the manufacturer Hersteller bereitgestellt présentée par le fabricant