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    17ee34 PDF

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    Sammed Upadhye
    This document is a model question paper for the third semester Bachelor of Engineering degree examination in Analog Electronic Circuits. It contains 10 questions divided into 5 modules. The questions assess topics related to BJT and FET amplifiers, oscillators, feedback amplifiers, and power amplifiers. Students must answer 5 full questions, selecting one full question from each of the 5 modules. The exam is 3 hours long and carries a maximum of 100 marks.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    17ee34 PDF

    Uploaded by

    Sammed Upadhye
    42 views3 pages
    This document is a model question paper for the third semester Bachelor of Engineering degree examination in Analog Electronic Circuits. It contains 10 questions divided into 5 modules. The questions assess topics related to BJT and FET amplifiers, oscillators, feedback amplifiers, and power amplifiers. Students must answer 5 full questions, selecting one full question from each of the 5 modules. The exam is 3 hours long and carries a maximum of 100 marks.

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    This document is a model question paper for the third semester Bachelor of Engineering degree examination in Analog Electronic Circuits. It contains 10 questions divided into 5 modules. The questions assess topics related to BJT and FET amplifiers, oscillators, feedback amplifiers, and power amplifiers. Students must answer 5 full questions, selecting one full question from each of the 5 modules. The exam is 3 hours long and carries a maximum of 100 marks.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    42 views3 pages

    17ee34 PDF

    Uploaded by

    Sammed Upadhye
    This document is a model question paper for the third semester Bachelor of Engineering degree examination in Analog Electronic Circuits. It contains 10 questions divided into 5 modules. The questions assess topics related to BJT and FET amplifiers, oscillators, feedback amplifiers, and power amplifiers. Students must answer 5 full questions, selecting one full question from each of the 5 modules. The exam is 3 hours long and carries a maximum of 100 marks.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 3

    USN 17EE34

    Model Question Paper


    Third Semester B.E Degree(CBCS) Examination
    Analog Electronic circuits
    Time : 3hrs Max Marks:100
    Note: Answer FIVE full questions,choosing one
    ne full question from each m
    module
    Module 1
    1 a Draw a double ended clipper circuit and explain its working principle with transfer 7 Marks
    characteristics.
    b For the sketch shown fig. below, Vi varies from 0 to 150 7 Marks
    V, sketch the output voltage Vo to the same time scale as
    the input voltage. Assume ideal diode

    c Write the procedure for analyzing the 6 Marks


    clamping circuit, determine output voltage
    for the network shown in fig. (1.b) Assume
    f=1000Hz and ideal diode.

    or
    2 a Consider a fixed bias circuit of a transistor. Obtain expressions for stability factor SICO, 9 Marks
    SVBE and Sβ. Draw the circuit diagram
    b For the circuit shown in fig. find IC, VB, VE, R1 and SICO 7 Marks

    c Define operating point. Explain its significance 4 Marks


    Module 2
    3 a Obtain r- parameter
    er model for CE configuration. 5 Marks
    b Draw the circuit of common base amplifier. Derive the expression for current gain, voltage 7 Marks
    gain, input and output impedance using the model
    c For the emitter follower circuit shown in fig. obtain the 8 Marks
    values of re, Zi, Zo, voltage gain(AV) and current gain (AI).
    assume β=100 and ro= 50kΩ Ω
    17EE34
    Model Question Paper
    Third Semester B.E Degree(CBCS) Examination
    Analog Electronic circuits
    Time : 3hrs Max Marks:100
    Note: Answer FIVE full questions,choosing one full question from each module
    or
    4 a Define h parameters and hence derive h-parameter model of CC-BJT 6 Marks
    b State and prove miller’s theorem 6 Marks
    c For common base amplifier shown in fig. 8 Marks
    determine Zi, AI, AV, and ZO using complete
    hybrid equivalent model. (Given hie=1.6kΩ,
    hfe=100, hre=2 x 10-4, hoe=20µS.)

    Module 3
    5 a Draw the circuit of Darlington emitter follower. Derive the expression for current gain, 10Marks
    voltage gain, input and output impedance using the model.
    b For the cascode circuit shown below calculate 10 Marks
    a) The dc bias voltages VB1,VB2,VC2
    b) The no load voltage gain and the output voltages
    VO2=VO
    c) The voltage gain with load of 10kΩ connected to
    the second stage and the output voltage VO
    d) Input and output impedances

    or
    6 a For the voltage series feedback amplifier topology, obtain expression for AV and Rif. Also 10 Marks
    explain the principle of voltage amplifier used in feedback amplifiers.
    b List and explain the advantages of employing negative feedback in amplifiers 6 Marks
    c Explain the difference between cascade and cascode connections and its applications 4 Marks
    Module 4
    7 a With a neat diagram explain transformer coupled power amplifier and derive the 10 Marks
    expression for AC power delivered to the load, show that the maximum efficiency is 50%.
    b State and explain Barkhausen criterion for sustained oscillations. 5 Marks
    c A crystal has following parameters: 5 Marks
    L=0.334H, C= 0.065pF, CM=1pF, R=5.5kΩ
    Calculate series resonant frequency.
    Calculate parallel resonant frequency.
    17EE34
    Model Question Paper
    Third Semester B.E Degree(CBCS) Examination
    Analog Electronic circuits
    Time : 3hrs Max Marks:100
    Note: Answer FIVE full questions,choosing one full question from each module

    Find Q of the crystal.


    or
    8 a Explain the working of complementary symmetry class B amplifier 6 Marks
    b Derive an expression for frequency of oscillations in wien bridge oscillator 8 Marks
    c Find the values of RC, R. R’ and C for an RC –phase shift oscillator for a frequency of 6 Marks
    oscillation of 1000 Hz. A transistor is having hfe=200 and hie=2kΩ.

    Module 5
    9 a Draw the circuit for JFET common source amplifier using fixed biased configuration and 10 Marks
    determine its input impedance, output impedance and voltage gain using ac equivalent
    small signal model
    b Explain the working and construction of JFET in detail and draw its transfer characteristics 10 Marks
    and drain characteristics.
    or
    10 a Explain the depletion and enhancement type MOSFETs, their characteristics and 10 Marks
    frequency response
    b For the circuit shown in fig. 10 Marks
    a) Calculate Zi and Zo
    b) Calculate AV
    c) Calculate VO, for Vi=1mV(rms)
    d) Repeat from (a) to (c)
    neglecting the effect of rd10

    (Given IDSS=12mA, VP=-3.5V, VGSQ= -


    0.75V, rd=50kΩ)

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