VN750 / VN750S

® / VN750PT / VN750-B5

HIGH SIDE DRIVER

TYPE RDS(on) IOUT VCC
VN750
VN750S
60 mΩ 6A 36 V
VN750PT
VN750-B5 SO-8 PENTAWATT

■ CMOS COMPATIBLE INPUT

■ ON STATE OPEN LOAD DETECTION

■ OFF STATE OPEN LOAD DETECTION

P2PAK PPAK
■ SHORTED LOAD PROTECTION

■ UNDERVOLTAGE AND OVERVOLTAGE ORDER CODES

SHUTDOWN PACKAGE TUBE T&R
■ PROTECTION AGAINST LOSS OF GROUND PENTAWATT VN750 -
■ VERY LOW STAND-BY CURRENT SO-8 VN750S VN750S13TR
■ REVERSE BATTERY PROTECTION (*) P2PAK VN750-B5 VN750-B513TR
PPAK VN750PT VN750PT13TR

DESCRIPTION
compatibility table). Active current limitation
The VN750, VN750S, VN750PT, VN750-B5 are a combined with thermal shutdown and automatic
monolithic device designed in STMicroelectronics restart protect the device against overload.
VIPower M0-3 Technology, intended for driving
any kind of load with one side connected to The device detects open load condition both is on
ground. and off state. Output shorted to VCC is detected in
Active V CC pin voltage clamp protects the device the off state. Device automatically turns off in case
against low energy spikes (see ISO7637 transient of ground pin disconnection.
BLOCK DIAGRAM
VCC

VCC OVERVOLTAGE
CLAMP DETECTION

UNDERVOLTAGE
DETECTION
GND

Power CLAMP

INPUT DRIVER
OUTPUT
LOGIC
CURRENT LIMITER

STATUS ON STATE OPENLOAD

DETECTION

OVERTEMPERATURE
DETECTION OFF STATE OPENLOAD
AND OUTPUT SHORTED TO V CC
DETECTION

(*) See application schematic at page 8

Rev. 1
June 2004 1/31
VN750 / VN750S / VN750PT / VN750-B5

ABSOLUTE MAXIMUM RATING

Value
Symbol Parameter Unit
SO-8 PENTAWATT P2PAK PPAK
VCC DC Supply Voltage 41 V
- VCC Reverse DC Supply Voltage - 0.3 V
- Ignd DC Reverse Ground Pin Current - 200 mA
IOUT DC Output Current Internally Limited A
- IOUT Reverse DC Output Current -6 A
IIN DC Input Current +/- 10 mA
ISTAT DC Status Current +/- 10 mA
Electrostatic Discharge
(Human Body Model: R=1.5KΩ; C=100pF)
- INPUT 4000 V
VESD
- STATUS 4000 V
- OUTPUT 5000 V
- VCC 5000 V
Maximum Switching Energy
EMAX 100 mJ
(L=1.8mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=9A)
Maximum Switching Energy
EMAX 138 138 mJ
(L=2.46mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=9A)
Ptot Power Dissipation TC=25°C 4.2 60 60 60 W
Tj Junction Operating Temperature Internally Limited °C
Tc Case Operating Temperature - 40 to 150 °C
Tstg Storage Temperature - 55 to 150 °C

CONFIGURATION DIAGRAM (TOP VIEW) & SUGGESTED CONNECTIONS FOR UNUSED AND N.C.
PINS

5 OUTPUT
VCC 5 4 N.C.
4 STATUS
OUTPUT STATUS 3 VCC
OUTPUT INPUT 2 INPUT
VCC 8 1 GND 1 GND

SO-8 PPAK / P2PAK PENTAWATT

Connection / Pin Status N.C. Output Input

Floating X X X X
To Ground X Through 10KΩ resistor

CURRENT AND VOLTAGE CONVENTIONS

IS

VF
IIN
VCC
INPUT
ISTAT IOUT
STATUS OUTPUT VCC
GND

VIN
VSTAT VOUT
IGND

2/31
 VN750 / VN750S / VN750PT / VN750-B5

THERMAL DATA
Value
Symbol Parameter Unit
S0-8 PENTAWATT P2PAK PPAK
Rthj-case Thermal Resistance Junction-case Max - 2.1 2.1 2.1 °C/W
Rthj-lead Thermal Resistance Junction-lead Max 30 - - - °C/W
93 (1) 62.1 52.1 (3) 77.1 (3) °C/W
Rthj-amb Thermal Resistance Junction-ambient Max
82 (2) 62.1 37 (4) 44 (4) °C/W

(1) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal
mounting and no artificial air flow.
(2) When mounted on a standard single-sided FR-4 board with 2cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal mount-
ing and no artificial air flow.
(3) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick). Horizontal mounting and no artificial air
flow.
(4) When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35µm thick). Horizontal mounting and no artificial air flow.

ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C unless otherwise specified)

POWER
Symbol Parameter Test Conditions Min Typ Max Unit
VCC Operating Supply Voltage 5.5 13 36 V
VUSD Undervoltage Shut-down 3 4 5.5 V
Undervoltage Shut-down
VUSDhyst 0.5 V
Hysteresis
VOV Overvoltage Shut-down 36 V
IOUT=2A; Tj=25°C; VCC>8V 60 mΩ
RON On State Resistance (#)
IOUT=2A; VCC>8V 120 mΩ
10 25 µA
Off State; VCC=13V; VIN=VOUT =0V
IS Supply Current Off State; VCC=13V; VIN=VOUT=0V; Tj=25°C
10 20 µA
On State; VCC=13V; VIN=5V; IOUT=0A
2 3.5 mA
IL(off1) Off State Output Current VIN=VOUT=0V 0 (#) 50 µA
IL(off2) Off State Output Current VIN=0V; VOUT =3.5V -75 0 µA
IL(off3) Off State Output Current VIN=VOUT=0V; Vcc=13V; Tj =125°C 5 µA
IL(off4) Off State Output Current VIN=VOUT=0V; Vcc=13V; Tj =25°C 3 µA

SWITCHING (V CC=13V)
Symbol Parameter Test Conditions Min Typ Max Unit
td(on) Turn-on Delay Time RL=6.5Ω from VIN rising edge to VOUT=1.3V 40 µs
td(off) Turn-off Delay Time RL=6.5Ω from VIN falling edge to VOUT =11.7V 30 µs
dVOUT/dt(on) Turn-on Voltage Slope RL=6.5Ω from VOUT=1.3V to VOUT=10.4V (#) V/µs
dVOUT/dt(off) Turn-off Voltage Slope RL=6.5Ω from VOUT=11.7V to VOUT =1.3V (#) V/µs

INPUT PIN
Symbol Parameter Test Conditions Min Typ Max Unit
VIL Input Low Level (#) 1.25 V
IIL Low Level Input Current VIN=1.25V 1 (#) µA
VIH Input High Level 3.25 (#) V
IIH High Level Input Current VIN=3.25V (#) 10 µA
Vhyst Input Hysteresis Voltage 0.5 (#) V
IIN=1mA 6 6.8 8 V
VICL Input Clamp Voltage
IIN=-1mA -0.7 V

(#) See relative diagram

3/31

1
VN750 / VN750S / VN750PT / VN750-B5

ELECTRICAL CHARACTERISTICS (continued)

VCC - OUTPUT DIODE
Symbol Parameter Test Conditions Min Typ Max Unit
VF Forward on Voltage -IOUT=1.3A; Tj=150°C 0.6 V

STATUS PIN
Symbol Parameter Test Conditions Min Typ Max Unit
VSTAT Status Low Output Voltage ISTAT =1.6mA (#) 0.5 V
ILSTAT Status Leakage Current Normal Operation; VSTAT=5V (#) 10 µA
Status Pin Input
CSTAT Normal Operation; VSTAT=5V 100 pF
Capacitance
ISTAT =1mA 6 6.8 8 V
VSCL Status Clamp Voltage
ISTAT =-1mA -0.7 V

PROTECTIONS (See note 1)

Symbol Parameter Test Conditions Min Typ Max Unit
TTSD Shut-down Temperature 150 175 200 °C
TR Reset Temperature 135 °C
Thyst Thermal Hysteresis 7 15 °C
Status delay in overload
tSDL Tj>Tjsh 20 µs
condition
9V<VCC<36V 6 9 15 A
Ilim Current limitation
5V<VCC<36V 15 A
Turn-off Output Clamp
Vdemag IOUT=2A; VIN=0V; L=6mH VCC-41 VCC-48 VCC-55 V
Voltage

Note 1: To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be
used together with a proper software strategy. If the device operates under abnormal conditions this software must limit the duration and
number of activation cycles.

(#) See relative diagram

4/31

2
 VN750 / VN750S / VN750PT / VN750-B5

ELECTRICAL CHARACTERISTICS (continued)

OPENLOAD DETECTION
Symbol Parameter Test Conditions Min Typ Max Unit
Openload ON State
IOL VIN=5V 50 (#) 200 mA
Detection Threshold
Openload ON State
tDOL(on) IOUT =0A 200 µs
Detection Delay
Openload OFF State
VOL Voltage Detection VIN=0V 1.5 (#) 3.5 V
Threshold
Openload Detection Delay
tDOL(off) 1000 µs
at Turn Off

OPEN LOAD STATUS TIMING (with external pull-up) OVERTEMP STATUS TIMING
VOUT > VOL IOUT< IOL
Tj > Tjsh
VIN
VIN

VSTAT
VSTAT

tDOL(off) tDOL(on) tSDL tSDL

5/31

1
VN750 / VN750S / VN750PT / VN750-B5

Switching time Waveforms

VOUT

90%
80%

dVOUT/dt(on) dVOUT/dt(off)

10%
t

VIN
td(on) td(off)

TRUTH TABLE
CONDITIONS INPUT OUTPUT STATUS
L L H
Normal Operation
H H H
L L H
Current Limitation H X (Tj < TTSD) H
H X (Tj > TTSD) L
L L H
Overtemperature
H L L
L L X
Undervoltage
H L X
L L H
Overvoltage
H L H
L H L
Output Voltage > VOL
H H H
L L H
Output Current < IOL
H H L

6/31
 VN750 / VN750S / VN750PT / VN750-B5

ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN

TEST LEVELS
ISO T/R 7637/1
Delays and
Test Pulse I II III IV
Impedance
1 -25 V -50 V -75 V -100 V 2 ms 10 Ω
2 +25 V +50 V +75 V +100 V 0.2 ms 10 Ω
3a -25 V -50 V -100 V -150 V 0.1 µs 50 Ω
3b +25 V +50 V +75 V +100 V 0.1 µs 50 Ω
4 -4 V -5 V -6 V -7 V 100 ms, 0.01 Ω
5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2 Ω

ISO T/R 7637/1 TEST LEVELS RESULTS

Test Pulse I II III IV
1 C C C C
2 C C C C
3a C C C C
3b C C C C
4 C C C C
5 C E E E

CLASS CONTENTS
C All functions of the device are performed as designed after exposure to disturbance.
E One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.

7/31
VN750 / VN750S / VN750PT / VN750-B5

Figure 1: Waveforms

NORMAL OPERATION
INPUT
LOAD VOLTAGE
STATUS

UNDERVOLTAGE
VCC VUSDhyst
VUSD
INPUT
LOAD VOLTAGE
STATUS undefined

OVERVOLTAGE
VCC<VOV VCC>VOV
VCC
INPUT
LOAD VOLTAGE
STATUS

OPEN LOAD with external pull-up

INPUT
VOUT >VOL
LOAD VOLTAGE
VOL
STATUS

OPEN LOAD without external pull-up

INPUT

LOAD VOLTAGE
STATUS

OVERTEMPERATURE
Tj TTSD
TR

INPUT
LOAD CURRENT
STATUS

8/31

1
1
 VN750 / VN750S / VN750PT / VN750-B5

APPLICATION SCHEMATIC

+5V +5V

Rprot VCC

STATUS

Dld

µC Rprot INPUT
OUTPUT

GND

RGND
VGND DGND

GND PROTECTION NETWORK AGAINST This small signal diode can be safely shared amongst
REVERSE BATTERY several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
Solution 1: Resistor in the ground line (RGND only). This input threshold and the status output values if the
can be used with any type of load. microprocessor ground is not common with the device
The following is an indication on how to dimension the ground. This shift will not vary if more than one HSD
RGND resistor. shares the same diode/resistor network.
1) RGND ≤ 600mV / (IS(on)max). Series resistor in INPUT and STATUS lines are also
2) RGND ≥ (−VCC) / (-IGND) required to prevent that, during battery voltage transient,
the current exceeds the Absolute Maximum Rating.
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the Safest configuration for unused INPUT and STATUS pin
device’s datasheet. is to leave them unconnected.
Power Dissipation in RGND (when VCC<0: during reverse LOAD DUMP PROTECTION
battery situations) is: Dld is necessary (Voltage Transient Suppressor) if the
PD= (-VCC)2/RGND load dump peak voltage exceeds VCC max DC rating. The
This resistor can be shared amongst several different same applies if the device will be subject to transients on
HSD. Please note that the value of this resistor should be the VCC line that are greater than the ones shown in the
calculated with formula (1) where IS(on)max becomes the ISO T/R 7637/1 table.
sum of the maximum on-state currents of the different µC I/Os PROTECTION:
devices.
If a ground protection network is used and negative
Please note that if the microprocessor ground is not transients are present on the VCC line, the control pins will
common with the device ground then the RGND will be pulled negative. ST suggests to insert a resistor (Rprot)
produce a shift (IS(on)max * RGND) in the input thresholds in line to prevent the µC I/Os pins to latch-up.
and the status output values. This shift will vary
depending on many devices are ON in the case of several The value of these resistors is a compromise between the
high side drivers sharing the same RGND. leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
If the calculated power dissipation leads to a large resistor of µC I/Os.
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below). -VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Solution 2: A diode (DGND) in the ground line. Calculation example:
A resistor (RGND=1kΩ) should be inserted in parallel to For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
DGND if the device will be driving an inductive load. 5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.

9/31
VN750 / VN750S / VN750PT / VN750-B5

OPEN LOAD DETECTION IN OFF STATE

Off state open load detection requires an external pull-up 2) no misdetection when load is disconnected: in this
resistor (RPU) connected between OUTPUT pin and a case the VOUT has to be higher than VOLmax; this
positive supply voltage (VPU) like the +5V line used to results in the following condition RPU<(VPU–VOLmax)/
supply the microprocessor. IL(off2).
The external resistor has to be selected according to the Because Is(OFF) may significantly increase if Vout is pulled
following requirements: high (up to several mA), the pull-up resistor RPU should
1) no false open load indication when load is connected: be connected to a supply that is switched OFF when the
in this case we have to avoid VOUT to be higher than module is in standby.
VOlmin; this results in the following condition The values of VOLmin, VOLmax and IL(off2) are available in
VOUT=(VPU/(RL+RPU))RL<VOlmin. the Electrical Characteristics section.

Open Load detection in off state

V batt. VPU

VCC

RPU

DRIVER
INPUT + IL(off2)
LOGIC

OUT
+
R
-
STATUS
VOL
RL

GROUND

10/31
 VN750 / VN750S / VN750PT / VN750-B5

Off State Output Current High Level Input Current

IL(off1) (uA) Iih (uA)

3 7

2.5
6
Off state
Vin=3.25V
2 Vcc=36V
5
Vin=Vout=0V
1.5
4
1
3
0.5

2
0

-0.5 1

-1 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)

Input Clamp Voltage Status Leakage Current

Vicl (V) Ilstat (uA)
8 0.05

7.8
Iin=1mA
7.6 0.04

7.4 Vstat=5V

7.2 0.03

6.8 0.02

6.6

6.4 0.01

6.2

6 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)

Status Low Output Voltage Status Clamp Voltage

Vstat (V) Vscl (V)

0.6 8

7.8
0.5 Istat=1mA
7.6
Istat=1.6mA
7.4
0.4
7.2

0.3 7

6.8
0.2
6.6

6.4
0.1
6.2

0 6
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (°C)

11/31
VN750 / VN750S / VN750PT / VN750-B5

On State Resistance Vs Tcase On State Resistance Vs VCC

Ron (mOhm) Ron (mOhm)

140 120

110
120 Iout=2A
Iout=2A 100
Vcc=8V; 13V; 36V Tc= 150°C
100 90

80
80
Tc= 125°C
70
60
60

40 50
Tc= 25°C
40
20 Tc= - 40°C
30

0 20
-50 -25 0 25 50 75 100 125 150 175 5 10 15 20 25 30 35 40
Tc (ºC) Vcc (V)

Openload On State Detection Threshold Input High Level

Iol (mA) Vih (V)

220 3.6

200
3.4
Vcc=13V
180
Vin=5V
3.2
160

140 3

120
2.8
100

80 2.6

60
2.4
40
2.2
20

0 2
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)

Input Low Level Input Hysteresis Voltage

Vil (V) Vhyst (V)

2.8 1.5

2.6 1.4

1.3
2.4
1.2
2.2
1.1
2
1
1.8
0.9
1.6
0.8
1.4
0.7

1.2 0.6

1 0.5
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)

12/31
 VN750 / VN750S / VN750PT / VN750-B5

Overvoltage Shutdown Openload Off State Voltage Detection Threshold

Vov (V) Vol (V)

50 5

48 4.5

46 Vin=0V
4
44
3.5
42

40 3

38
2.5
36
2
34
1.5
32

30 1
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175

Tc (°C) Tc (ºC)

Turn-on Voltage Slope Turn-off Voltage Slope

dVout/dt/(on) (V/ms) dVout/dt(off) (V/ms)

1000 500

900 450
Vcc=13V Vcc=13V
800 400
Rl=6.5Ohm Rl=6.5Ohm
700 350

600 300

500 250

400 200

300 150

200 100

100 50

0 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (ºC) Tc (ºC)

Ilim Vs T case

Ilim (A)
20

18
Vcc=13V
16

14

12

10

0
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)

13/31

1
VN750 / VN750S / VN750PT / VN750-B5

SO-8 Maximum turn off current versus load inductance

ILMAX (A)
100

10

A
B
C

1
0.1 1 10 100
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at T Jstart=100ºC
C= Repetitive Pulse at T Jstart=125ºC

Conditions:
VCC=13.5V
Values are generated with R L=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.

VIN, IL
Demagnetization Demagnetization Demagnetization

14/31
 VN750 / VN750S / VN750PT / VN750-B5

PPAK, P 2PAK Maximum turn off current versus load inductance

ILMAX (A)
100

10

1
0.1 1 10 100
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at T Jstart=100ºC
C= Repetitive Pulse at T Jstart=125ºC

Conditions:
VCC=13.5V
Values are generated with R L=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.

VIN, IL
Demagnetization Demagnetization Demagnetization

15/31
VN750 / VN750S / VN750PT / VN750-B5

SO-8 THERMAL DATA

SO-8 PC Board

Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.14cm2, 0.8cm2, 2cm2).

Rthj-amb Vs PCB copper area in open box free air condition

RTHj_amb (ºC/W) SO-8 at 2 pins connected to TAB

110

105
100

95
90

85
80

75
70
0 0.5 1 1.5 2 2.5
PCB Cu heatsink area (cm^2)

16/31
 VN750 / VN750S / VN750PT / VN750-B5

P2PAK THERMAL DATA

P2PAK PC Board

Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.97cm2, 8cm2).

Rthj-amb Vs PCB copper area in open box free air condition

RTHj_amb (°C/W)
55
Tj-Tamb=50°C
50

45

40

35

30
0 2 4 6 8 10
PCB Cu heatsink area (cm^2)

17/31
VN750 / VN750S / VN750PT / VN750-B5

PPAK THERMAL DATA

PPAK PC Board

Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.44cm2, 8cm2).

Rthj-amb Vs PCB copper area in open box free air condition

RTHj_amb (ºC/W)

90
80
70
60
50
40
30
20
10
0
0 2 4 6 8 10
PCB Cu heatsink area (cm^2)

18/31
 VN750 / VN750S / VN750PT / VN750-B5

SO-8 Thermal Impedance Junction Ambient Single Pulse

ZTH (°C/W)
1000

0.5 cm2
100
2 cm2

10

0.1

0.01
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)

Thermal fitting model of a single channel HSD Pulse calculation formula

in SO-8 Z TH δ = R TH ⋅ δ + Z THtp ( 1 – δ )
where δ = tp ⁄ T
Thermal Parameter
Area/island (cm2) 0.5 2
R1 (°C/W) 0.05
Tj C1 C2 C3 C4 C5 C6
R2 (°C/W) 0.8
R3 ( °C/W) 3.5
R1 R2 R3 R4 R5 R6
R4 (°C/W) 21
Pd
R5 (°C/W) 16
R6 (°C/W) 58 28
T_amb
C1 (W.s/°C) 0.006
C2 (W.s/°C) 2.60E-03
C3 (W.s/°C) 0.0075
C4 (W.s/°C) 0.045
C5 (W.s/°C) 0.35
C6 (W.s/°C) 1.05 2

19/31
VN750 / VN750S / VN750PT / VN750-B5

PPAK Thermal Impedance Junction Ambient Single Pulse

ZTH (°C/W)
1000

100 0.44 cm2

6 cm2

10

0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
T ime (s)

Thermal fitting model of a single channel HSD Pulse calculation formula

in PPAK
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where δ = tp ⁄ T
Thermal Parameter
Area/island (cm2) 0.5 6
R1 (°C/W) 0.15
Tj C1 C2 C3 C4 C5 C6 R2 (°C/W) 0.7
R3 ( °C/W) 1.6
R1 R2 R3 R4 R5 R6
R4 (°C/W) 2
Pd R5 (°C/W) 15
R6 (°C/W) 61 24
T_amb
C1 (W.s/°C) 0.0006
C2 (W.s/°C) 0.0025
C3 (W.s/°C) 0.08
C4 (W.s/°C) 0.3
C5 (W.s/°C) 0.45
C6 (W.s/°C) 0.8 5

20/31
 VN750 / VN750S / VN750PT / VN750-B5

P2PAK Thermal Impedance Junction Ambient Single Pulse

ZTH (°C/W)
1000

100
0.5 cm 2

6 cm2

10

0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)

Thermal fitting model of a single channel HSD Pulse calculation formula

in P 2PAK
Z THδ = R T H ⋅ δ + Z THtp ( 1 – δ )
where δ = tp ⁄ T
Thermal Parameter
Area/island (cm2) 0.5 6
R1 (°C/W) 0.15
Tj C1 C2 C3 C4 C5 C6 R2 (°C/W) 0.7
R3 ( °C/W) 0.7
R1 R2 R3 R4 R5 R6
R4 (°C/W) 4
Pd R5 (°C/W) 9
R6 (°C/W) 37 22
T_amb
C1 (W.s/°C) 0.0006
C2 (W.s/°C) 0.0025
C3 (W.s/°C) 0.055
C4 (W.s/°C) 0.4
C5 (W.s/°C) 2
C6 (W.s/°C) 3 5

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VN750 / VN750S / VN750PT / VN750-B5

SO-8 MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.25 0.003 0.009
a2 1.65 0.064
a3 0.65 0.85 0.025 0.033
b 0.35 0.48 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.019
c1 45 (typ.)
D 4.8 5 0.188 0.196
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 3.81 0.150
F 3.8 4 0.14 0.157
L 0.4 1.27 0.015 0.050
M 0.6 0.023
S 8 (max.)
L1 0.8 1.2 0.031 0.047

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 VN750 / VN750S / VN750PT / VN750-B5

PENTAWATT (VERTICAL) MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 4.8 0.189
C 1.37 0.054
D 2.4 2.8 0.094 0.110
D1 1.2 1.35 0.047 0.053
E 0.35 0.55 0.014 0.022
F 0.8 1.05 0.031 0.041
F1 1 1.4 0.039 0.055
G 3.2 3.4 3.6 0.126 0.134 0.142
G1 6.6 6.8 7 0.260 0.268 0.276
H2 10.4 0.409
H3 10.05 10.4 0.396 0.409
L 17.85 0.703
L1 15.75 0.620
L2 21.4 0.843
L3 22.5 0.886
L5 2.6 3 0.102 0.118
L6 15.1 15.8 0.594 0.622
L7 6 6.6 0.236 0.260
M 4.5 0.177
M1 4 0.157
Diam. 3.65 3.85 0.144 0.152

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VN750 / VN750S / VN750PT / VN750-B5

P2PAK MECHANICAL DATA

mm.
DIM.
MIN. TYP MAX.
A 4.30 4.80
A1 2.40 2.80
A2 0.03 0.23
b 0.80 1.05
c 0.45 0.60
c2 1.17 1.37
D 8.95 9.35
D2 8.00
E 10.00 10.40
E1 8.50
e 3.20 3.60
e1 6.60 7.00
L 13.70 14.50
L2 1.25 1.40
L3 0.90 1.70
L5 1.55 2.40
R 0.40
V2 0º 8º
Package Weight 1.40 Gr (typ)

P010R

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 VN750 / VN750S / VN750PT / VN750-B5

PPAK MECHANICAL DATA

DIM. MIN. TYP MAX.

A 2.20 2.40
A1 0.90 1.10
A2 0.03 0.23
B 0.40 0.60
B2 5.20 5.40
C 0.45 0.60
C2 0.48 0.60
D1 5.1
D 6.00 6.20
E 6.40 6.60
E1 4.7
e 1.27
G 4.90 5.25
G1 2.38 2.70
H 9.35 10.10
L2 0.8 1.00
L4 0.60 1.00
R 0.2
V2 0º 8º
Package Weight Gr. 0.3

P032T1

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VN750 / VN750S / VN750PT / VN750-B5
SO-8 TUBE SHIPMENT (no suffix)

B
C Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532
A A 3.2
B 6
C (± 0.1) 0.6

All dimensions are in mm.

TAPE AND REEL SHIPMENT (suffix “13TR”)

REEL DIMENSIONS
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4

All dimensions are in mm.

TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm. End

Start

Top No components Components No components

cover
tape 500mm min
Empty components pockets 500mm min
saled with cover tape.

User direction of feed

26/31
 VN750 / VN750S / VN750PT / VN750-B5

PENTAWATT TUBE SHIPMENT (no suffix)

Base Q.ty 50
Bulk Q.ty 1000
B Tube length (± 0.5) 532
A 18
B 33.1
C (± 0.1) 1
C
All dimensions are in mm.

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VN750 / VN750S / VN750PT / VN750-B5
P2PAK TUBE SHIPMENT (no suffix)

Base Q.ty 50
Bulk Q.ty 1000
B Tube length (± 0.5) 532
A 18
C
B 33.1
C (± 0.1) 1

All dimensions are in mm.

A

TAPE AND REEL SHIPMENT (suffix “13TR”)

REEL DIMENSIONS
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4

All dimensions are in mm.

TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 16
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 11.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm. End

Start

Top No components Components No components

cover
tape 500mm min
Empty components pockets 500mm min
saled with cover tape.

User direction of feed

28/31
 VN750 / VN750S / VN750PT / VN750-B5
PPAK SUGGESTED PAD LAYOUT PPAK TUBE SHIPMENT (no suffix)
A
C
Base Q.ty 75
Bulk Q.ty 3000
Tube length (± 0.5) 532
A 6
B B 21.3
C (± 0.1) 0.6
3 1.8 6.7
All dimensions are in mm.

TAPE AND REEL SHIPMENT (suffix “13TR”)

REEL DIMENSIONS
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4

All dimensions are in mm.

TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width W 16
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 7.5
Compartment Depth K (max) 2.75
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm. End

Start

Top No components Components No components

cover
tape 500mm min
Empty components pockets 500mm min
saled with cover tape.

User direction of feed

29/31

1
VN750 / VN750S / VN750PT / VN750-B5

REVISION HISTORY
Date Revision Description of Changes
- Current and voltage convention update (page 2).
- “Configuration diagram (top view) & suggested connections for unused and n.c.
pins” insertion (page 2).
May 2004 1 - 6cm2 Cu condition insertion in Thermal Data table (page 3).
- VCC - OUTPUT DIODE section update (page 4).
- Revision History table insertion (page 30).
- Disclaimers update (page 31).

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1
 VN750 / VN750S / VN750PT / VN750-B5

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a trademark of STMicroelectronics.

All other names are the property of their respective owners

 2004 STMicroelectronics - Printed in ITALY- All Rights Reserved.

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