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    Detailed MOS Gate Capacitance Model: Chapter 2 MOS Transistor Theory

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    Carlos Saavedra
    The document discusses the capacitance model of a MOS transistor gate. It has two components: intrinsic capacitance (Cgc) over the channel, and overlap capacitances (Cgol) to the source and drain. Cgc varies depending on whether the transistor is cut off, in the linear region, or saturated. In cutoff, Cgc is the gate-body capacitance Cgb. In linear region, Cgc splits into equal gate-source and gate-drain capacitances. In saturation, all intrinsic capacitance is to the source as Cgs = 2/3C0.

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    Detailed MOS Gate Capacitance Model: Chapter 2 MOS Transistor Theory

    Uploaded by

    Carlos Saavedra
    90 views1 page
    The document discusses the capacitance model of a MOS transistor gate. It has two components: intrinsic capacitance (Cgc) over the channel, and overlap capacitances (Cgol) to the source and drain. Cgc varies depending on whether the transistor is cut off, in the linear region, or saturated. In cutoff, Cgc is the gate-body capacitance Cgb. In linear region, Cgc splits into equal gate-source and gate-drain capacitances. In saturation, all intrinsic capacitance is to the source as Cgs = 2/3C0.

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    CMOS-VLSI-design-97

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    The document discusses the capacitance model of a MOS transistor gate. It has two components: intrinsic capacitance (Cgc) over the channel, and overlap capacitances (Cgol) to the source and drain. Cgc varies depending on whether the transistor is cut off, in the linear region, or saturated. In cutoff, Cgc is the gate-body capacitance Cgb. In linear region, Cgc splits into equal gate-source and gate-drain capacitances. In saturation, all intrinsic capacitance is to the source as Cgs = 2/3C0.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    90 views1 page

    Detailed MOS Gate Capacitance Model: Chapter 2 MOS Transistor Theory

    Uploaded by

    Carlos Saavedra
    The document discusses the capacitance model of a MOS transistor gate. It has two components: intrinsic capacitance (Cgc) over the channel, and overlap capacitances (Cgol) to the source and drain. Cgc varies depending on whether the transistor is cut off, in the linear region, or saturated. In cutoff, Cgc is the gate-body capacitance Cgb. In linear region, Cgc splits into equal gate-source and gate-drain capacitances. In saturation, all intrinsic capacitance is to the source as Cgs = 2/3C0.

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    © All Rights Reserved
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    Download as pdf or txt
    of 1

    70 Chapter 2 MOS Transistor Theory

    2.8(a), each source and drain has its own isolated region of contacted diffusion. In Figure
    2.8(b), the drain of the bottom transistor and source of the top transistor form a shared
    contacted diffusion region. In Figure 2.8(c), the source and drain are merged into an
    uncontacted region. The average capacitance of each of these types of regions can be cal-
    culated or measured from simulation as a transistor switches between VDD and GND.
    Table 8.5 also lists the capacitance for each scenario for a variety of processes.
    For the purposes of hand estimation, you can observe that the diffusion capacitance
    Csb and Cdb of contacted source and drain regions is comparable to the gate capacitance
    (e.g., 1–2 f F /Rm of gate width). The diffusion capacitance of the uncontacted source or
    drain is somewhat less because the area is smaller but the difference is usually unimportant
    for hand calculations. These values of Cg = Csb = Cdb ~ 1f F /Rm will be used in examples
    throughout the text, but you should obtain the appropriate data for your process using
    methods to be discussed in Section 8.4.

    2.3.2 Detailed MOS Gate Capacitance Model


    The MOS gate sits above the channel and may partially overlap the source and drain dif-
    fusion areas. Therefore, the gate capacitance has two components: the intrinsic capaci-
    tance Cgc (over the channel) and the overlap capacitances Cgol (to the source and drain).
    The intrinsic capacitance was approximated as a simple parallel plate in EQ (2.12)
    with capacitance C0 = WLCox. However, the bottom plate of the capacitor depends on the
    mode of operation of the transistor. The intrinsic capacitance has three components repre-
    senting the different terminals connected to the bottom plate: Cgb (gate-to-body), Cgs
    (gate-to-source), and Cgd (gate-to-drain). Figure 2.9(a) plots capacitance vs. Vgs in the cut-
    off region and for small Vds, while 2.9(b) plots capacitance vs. Vds in the linear and satura-
    tion regions [Dally98].
    Cgc
    C0 Cgb
    1. Cutoff. When the transistor is OFF (Vgs < Vt), the channel is not inverted and charge
    on the gate is matched with opposite charge from the body. This is called Cgb , the
    C0
    2 Cgs,
    gate-to-body capacitance. For negative Vgs, the transistor is in accumulation and Cgb =
    Cgd C0. As Vgs increases but remains below a threshold, a depletion region forms at the
    0 Vgs surface. This effectively moves the bottom plate downward from the oxide, reducing
    <1 0 Vt 1 the capacitance, as shown in Figure 2.9(a).
    (a)
    2. Linear. When Vgs > Vt, the channel inverts and again serves as a good conductive bot-
    tom plate. However, the channel is connected to the source and drain, rather than the
    C0 Cgc
    body, so Cgb drops to 0. At low values of Vds, the channel charge is roughly shared
    Cgs 2 between source and drain, so Cgs = Cgd = C0/2. As Vds increases, the region near the
    C0 3 C0
    2 drain becomes less inverted, so a greater fraction of the capacitance is attributed to the
    Cgd source and a smaller fraction to the drain, as shown in Figure 2.9(b).
    Vds
    0
    0 1
    Vdsat 3. Saturation. At Vds > Vdsat, the transistor saturates and the channel pinches off. At this
    (b)
    point, all the intrinsic capacitance is to the source, as shown in Figure 2.9(b). Because
    of pinchoff, the capacitance in saturation reduces to Cgs = 2/3 C0 for an ideal transis-
    FIGURE 2.9 Intrinsic gate capac-
    itance Cgc = Cgs + Cgd + Cgb as a
    tor [Gray01].
    function of (a) Vgs and (b) Vds The behavior in these three regions can be approximated as shown in Table 2.1.

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