2.

1Biasing in MOSFET Amplifiers

Biasing: Establishing the desired DC voltages (VDS) and currents (ID) for the operation of the MOS amplifier.
MOSFET Regions of Operation
There are three regions of operation in the MOSFET
– When VGS < VT, no conductive channel is present and ID = 0, this is said to be cutoff region.
– If VGS < VT and VDS < VDS,sat, the device is in the triode region of operation. Increasing VDS increases the
lateral field in the channel, and hence the current. Increasing V GS increases the transverse field and hence the
inversion layer density, which also increases the current.
– If VGS < VT and VDS > VDS,sat, the device is in the saturation region of operation. Since the drain end channel
density has become small, the current is much less dependent on VDS, but is still dependent on VGS, since
increased VGS still increases the inversion layer density.

Fig.1 MOSFET Characteristic curves

As ID is increased at fixed VDS, no current flows until the inversion layer is established. For VGS slightly above
threshold, the device is in saturation since there is little inversion layer density (the drain end is pinched off). As
VGS increases, a point is reached where the drain end is no longer pinched off, and the device is in the triode
region. A larger VDS value postpones the point of transition to triode.
Common ways of biasing
1. Biasing by fixing VGS
2. Biasing by fixing VG and connecting a resistance in the Source
3. Biasing using a Drain-to-Gate Feedback Resistor
2.1.1 Biasing by fixing VGS
In this biasing technique, a suitable voltage supply is applied between gate and source as shown in the circuit
diagram Fig. 2(a).

Fig.2 (a) Fixing VGS circuit (b) graph showing large variability in ID values

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Bias point (i.e., ID and VDS) should be stable irrespective to variations in parameter values like, µn, Cox, (W/L),
Vt due to temperature and/or manufacturing variability.
ID in saturation region is given by

Where, W = Width of channel, L = Length of the channel, μn = Mobility of electrons in the conduction channel,
Cox = capacitance of oxide layer and Vt = threshold voltage
This method is NOT desirable as µn, Cox, (W/L) and Vt are drastically change due to temperature and/or
manufacturing variability.
When the MOSFET device is changed (even using the same supplier), this method can result in a large
variability in the value of ID. Devices 1 and 2 represent extremes among units of the same type. See Fig.2(b).
2.1.2 Biasing by fixing VG and connecting a resistance in the Source
In this biasing technique, a suitable voltage supply VG is applied to gate by connecting RS between source and
ground as shown in the fig.3(a).

Fig.3 (a) Fixing VG circuit (b) graph showing small variability in ID values

Voltage drop across resistance RS provides the biasing voltage VG and no external source is required for biasing
and this is the reason that it is called self-biasing.

Normally, VG is much smaller than VGS. In this case, RS value creates negative feedback and it stabilizes the ID
current, hence it is called as degenerative resistance.
Even if VG is larger than VGS, ID current value is determined by neglecting VGS

From the fig. 3(b) it is illustrated that intersection of iD and VGS characteristic curve provide coordinates ID and
VGS of bias point. It is observe that as in the case of fixed VGS, variation of ID (see difference between ID1 and ID2)
is much smaller.
Examples of Bias with Source Degeneration

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 2.1.3 Biasing using a Drain-to-Gate Feedback Resistor

In this case, RG works just like the RS which is to stabilize the bias
current ID in the event of changing VGS. i,e, Note that there is no voltage dropped across RG.

2.2 Small signal Operation and Modeling

The small-signal analysis is a mathematical approximation that allows us to see the effect of incremental changes
on the inputs of an electrical device on its output characteristics.

2.2.1 DC bias point

For dc bias point ID, we set the signal VGS to be zero. Thus,

Where neglected channel length modulation.

Here, VOV = VGS – Vt, is the overdrive voltage at which MOS
is biased to operate. The DC voltage at the drain will be

To ensure saturation region,

Fig. 4 Fixing VGS circuit

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2.2.2 Signal Current in Drain Terminal
Assume instantaneous input signal vgs applied and total gate to source voltage is

Resulting total instantaneous drain current is

First component is the dc bias current, second is the current component directly proportional to the applied signal
and last is proportional to square of input signal.

This is DC term plus a time-varying term, then from the above, one can see that the time-varying term is
approximately given by

The above has the unit of conductance, and it is called the MOSFET trans-conductance.

Fig. 5 Graphical depiction of the small signal analysis for MOSFET

2.2.3 Voltage Gain

From the fig. 4, the total instantaneous drain voltage vD is

Under small signal condition:

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The signal component of this is

The voltage gain Av defined as

-ve sign indicates output is 180o out of
phase of applied input signal

Fig. 6 Total instantaneous voltage vGS and vD

2.3 Small signal equivalent circuit models

By looking at the VI characteristic curve of the MOSFET, it is seen for incremental vds, the current id does not
change. This relationship can be modeled by a current source. Moreover, the gate of the MOSFET is essentially
an open circuit at DC. Hence, the small-signal equivalent-circuit model is presented in Figure 8(a).

Fig. 7 MOS Symbol, Hybrid π- model and T model

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 Fig.8

ro is introduced in parallel to controlled source is to improve

small signal model shown in the Fig.(b).
2.4 Transconductance ( gm)
The transconductance can be looked at with more details by using

The transconductance can be increased by increasing the W/L ratio, and also increasing the overdrive voltage
VOV . But increasing VOV implies that the operating point for VDS has to increase in order for the MOSFET to be
in the saturation region. Also, by using the fact that,

(1)

This implying that gm is proportional to the square roots of the drain current ID, and W/L.

At this point, note that

1. The trans-conductance gm of a MOSFET is
geometry dependent whereas that of the BJT
is not.

2. The trans-conductance of a BJT is much

larger than that of a MOSFET.

Since gm is an incremental relationship, this

can be shown graphically as in Figure 9.

Fig. 9 incremental change in trans-conductance gm of a MOSFET

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2.5 T- Equivalent circuit model
The hybrid-π equivalent-circuit model can be replaced by the T equivalent circuit model. The morphing of a
hybrid-π model to the T model is shown in Figure.
1. The current source in the hybrid-π model can be split into two without affecting the branch current. This is
seen from the morphing of Figure 10(a) to Figure 10(b).
2. Note that the gate current is zero. The point X can be connected to the gate input, and yet the gate current is
zero because of KCL at X. This is indicated in Figure 10(c).
3. But the second voltage-controlled current source is just the voltage and current relation of a resistor whose
resistance is 1/gm. Hence, it can be replaced by a resistor as shown in Figure 10(d).
Notice that in the T equivalent-circuit model, due to its construction, and KCL, the gate current is always zero,
implying that its resistance is infinite.

Figure 10 (a) and (b) early effect representing the T equivalent-circuit model

Also as the morphing of the hybrid-π equivalent-circuit model to the T equivalent-circuit model is unaffected by
connecting a resistor between D and S, an ro can be thus connected to account for the Early effect or the channel
modulation effect as shown in Figure 10(a). Figure 10(b) is an alternative way of representing the T equivalent-
circuit model, so that the gate current is always zero by KCL.

Fig.11 (a) (b)

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The morphing of the π equivalent-circuit model to the T equivalent circuit model is still valid if a resistor is
connected between the drain D and the source S. Hence, in fig11(a), ro can be connected to account for the Early
effect. Fig11(b) shows an alternative T model that is equivalent.

2.6 Single stage MOS amplifiers

2.6.1 Basic Configurations

Amplifier Configurations: 1) Common Source without source resistance 2) Common Source with a source
resistance 3) Common gate 4) Common drain or source follower
Common Source (CS) Amplifier
• CS is most widely used configuration
• The source is grounded, making it common between input and output.
• We can use hybrid  model.
• In multistage amplifiers, the large gain is achieved from CS stage.

Fig.11 (a) NMOS Common-Source amplifier (b) AC equivalent

Common Gate (CG) Amplifier

In CG Configuration, gate potential is at constant potential and the input signal is applied at the source terminal
and the output is produced at the drain terminal. So that increase in input voltage Vsig in positive direction
increases the negative gate source voltage. Due to ID reduces, the drop IDRD also reduces.
Since VD= VDD-IDRD, the reduction in ID results in an increase in output voltage

Figure 12(a) shows CG amplifier and figure (b) shows its small signal equivalent circuit.

By analizing the small signal equivalent circuit, the voltage gain of CG amplifier is given by,
Av = gm RD
The input impedance of CG stage is relatively low only if the load resistance connected to the drain is small.
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Common Drain (CD) Amplifier – Source Follower
In the CD Amplifier configuration, the drain terminal is at AC ground. The input is applied between the gate and
drain terminals, while the output is measured between the source and drain terminal.

Figure 13(a) shows CD amplifier and figure (b) shows its small signal equivalent circuit.

The Common Drain Amplifier has

1) High Input Impedance
2) Low Output Impedance
3) Sub-unity voltage gain
Since the output at the source terminal is following the input signal, it is also known as Source Follower.
Because of its low output impedance, it is used as a buffer for driving the low output impedance load. Since there
is a resistance RL connected to the source, it is easier to use the T-model

2.7 Characterizing amplifiers

An amplifier fed with a voltage signal having a source resistance and feeding a load resistance L. Here,
L can be load or input resistance to the succeeding stages.

Input resistance with no load

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Open circuit voltage Gain:

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2.8 Common-Source (CS) Amplifier without Source Resistance
The common-source (CS) amplifier for MOSFET is the analogue of the common emitter amplifier for BJT. Its
popularity arises from its high gain, and that by cascading a number of them, larger amplification of the signal
can be achieved. Fig. 14(a) shows the small-signal model for the CS amplifier. Here, RD is considered part of the
amplifier and is the resistance that one measures between the drain and the ground. The small-signal model can
be replaced by its hybrid-π model as shown in Fig. 14(b). Then the current induced in the output port is i =
−gmvgs as indicated by the current source. Thus

Figure 14(a) shows CV amplifier withot RS and figure (b) shows its small signal equivalent circuit.

To find the Norton equivalence resistance, one sets vi = 0, which will make the current source an open circuit
with zero current. And by the test-current method, the output resistance is
Ro = RD (4)
From the fact that Rin = ∞, then vi = vsig. The overall voltage gain, Gv, is the same as the voltage gain proper, Av,
namely,

Final Remarks on CS Amplifier

1. The CS amplifiers has infinite input impedance (draws no current at DC), and a moderately high output
resistance (easier to match for maximum power transfer), and a high voltage gain (a desirable feature of an
amplifier).
2. Reducing RD reduces the output resistance of a CS amplifier, but unfortunately, the voltage gain is also
reduced. Alternate design can be employed to reduce the output resistance.
3. A CS amplifier suffers from poor high frequency performance, as most transistor amplifiers do.

2.9 CS Amplifier with a Source Resistance

From fig.15(b), a T model is used for the equivalent circuit for simplicity. It is seen that the input resistance of
the circuit is infinite because no gate current flows. As a consequence, vi = vsig. However, because of the
existence of the source resistance, less of the input voltage is divided to vgs, by the voltage divider formula.
Thus

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 Figure 15(a) shows CG amplifier and figure (b) shows its small signal equivalent circuit.

It is seen that Rs can be used to make vgs small so that there is less nonlinear distortion as the small-signal
approximations will become better. The output voltage is generated by the controlled current source yielding

The above shows that including the source resistance reduces the amplifier gain by a factor of (1 +gmRs) but
linearity and bandwidth performance will improve. This is called negative feedback because when the input
voltage vi or vgs attempts to increase, the voltage drop across Rs increases reducing vgs. The source resistance is
also called source-degeneration resistance.
The equivalent Thevenin’s resistor is Ro which is just RD in this case. When a load resistor RL is added, then the
voltage gain is

Because the input resistance is infinite, hence vi = vsig and the overall voltage gain Gv = Av.

Summary of the CS Amplifier with Source Resistance

1. The input resistance Rin is infinite.
2. The open-circuit voltage gain, Avo, is reduced by a factor of (1 +gmRs) as seen in Eq(4).
3. For the same nonlinear distortion, the input signal can be increased by a factor of (1 +gmRs) compared to
without Rs.
4. As shall be shown later, the high-frequency response of this design is improved. In general, the addition of the
source resistance Rs gives rise to a “negative” feedback factor (1 +gmRs) that reduces voltage gain, but improves
linearity, and high-frequency response. Because of the negative-feedback action of Rs, it is also called the
source-degenerate resistance.

2.10. Common-Gate (CG) Amplifier

The small-signal and a T-model equivalent-circuit common-gate (CG) amplifier is shown in Fig. 16(b). By
inspection, the input resistance Rin is given by

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 Figure 16(a) shows CG amplifier and figure (b) shows its small signal equivalent circuit.

Meaning that the vi is attenuated compared to vsig, since Rsig is typically larger than 1/gm. When a load resistor RL
is connected to the output, the voltage gain is

As the input impedance is low, it is good for matching sources with a low input impedance due the the maximum
power theorem, but it draws more current, implying high power consumption from the signal source.
Summary of the CG Amplifier
1. The CG amplifier has a low input resistance 1/gm. This is undesirable as it will draw large current when driven
by a voltage input.
2. The voltage gain of the CG amplifier can be made similar in magnitude to that of the CS amplifier if R D||RL
can be made large compared to Rsig + 1/gm.
3. The output resistance can be made large since Ro = RD.
4. The CG amplifier has good high frequency performance as shall be shown later.
2.11 The Source Follower (Common Drain Amplifier)
This is similar to the emitter follower for the BJT, which is used as a voltage buffer. It is a unit-gain amplifier
with very large input impedance but smaller output impedance. Therefore it is good for matching a high-
impedance circuit to a low-impedance circuit or to a circuit that needs a larger supply of current.

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 Figure 17(a) shows CD (source follower) amplifier and figure (b) shows its small signal equivalent circuit.

Figure 17(a) & (b) shows the small-signal circuit and a T-model equivalent circuit diagram for a source follower.
The input source is represented by a Thevenin equivalent voltage vsig and resistor Rsig. A load resistor is
connected to the output between the source and ground. Since the gate current is zero for this circuit,
Rin = ∞ (1)
Using the voltage divider formula, it is seen that voltage gain proper or terminal voltage gain is

Since 1/gm is typically small, with large RL, the gain is less than unity, but is close to unity.
Hence, this is a source follower, because the source voltage follows the input voltage, but yet,
it can provide a larger current to the output than the input current.

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