2.4.3.2 Drain-Induced Barrier Lowering: Chapter 2 MOS Transistor Theory
2.4.3.2 Drain-Induced Barrier Lowering: Chapter 2 MOS Transistor Theory
2.4.3.2 Drain-Induced Barrier Lowering: Chapter 2 MOS Transistor Theory
8 × 1017 cm 3
Ks = 2 ( 0.026 V ) ln = 0.93 V
1.45 × 1010 cm 3
L=
10.5 × 10 8 cm
F
3.9 × 8.85 × 10 14 cm
( )( )(
F
2 1.6 × 10 19 C 11.7 × 8.85 × 10 14 cm )
8 × 1017 cm 3 = 0.16 (2.40)
Vt = 0.3 + L ( )
Ks + 0.6 V Ks = 0.34 V
2.4.3.2 Drain-Induced Barrier Lowering The drain voltage Vds creates an electric field that
affects the threshold voltage. This drain-induced barrier lowering (DIBL) effect is espe-
cially pronounced in short-channel transistors. It can be modeled as
Vt = Vt 0 MVds (2.41)
where M is the DIBL coefficient, typically on the order of 0.1 (often expressed as 100 mV/V).
Drain-induced barrier lowering causes Ids to increase with Vds in saturation, in much
the same way as channel length modulation does. This effect can be lumped into a smaller
Early voltage VA used in EQ (2.34). Again, this is a bane for analog design but insignifi-
cant for most digital circuits. More significantly, DIBL increases subthreshold leakage at
high Vds, as we will discuss in Section 2.4.4.
2.4.3.3 Short Channel Effect The threshold voltage typically increases with channel
length. This phenomenon is especially pronounced for small L where the source and drain
depletion regions extend into a significant portion of the channel, and hence is called the
short channel effect 8 or Vt rolloff [Tsividis99, Cheng99]. In some processes, a reverse short
channel effect causes Vt to decrease with length.
There is also a narrow channel effect in which Vt varies with channel width; this effect
tends to be less significant because the minimum width is greater than the minimum
length.