Ade Lab
Ade Lab
Laboratory Programs
8. Design and implement a mod-n (n<8) synchronous up counter using J-K Flip-Flop
ICs and Demonstrate its working.
Theory:
In digital logic and computing, a counter is a device which stores (and sometimes displays)
the number of times a particular event or process has occurred, often in relationship to a clock
signal.
A synchronous counter is one whose output bits change sate simultaneously. Such a
counter circuit can be built from JK flip-flop by connecting all the clock inputs together, so
that each and every flip- flop receives the exact same clock pulse at the exact same time. By
examining the four-bit binary count sequence, it noticed that just before a bit toggles, all pre-
ceding bits are "high".
That is a synchronous up-counter can be implemented by toggling the bit when all of
the less significant bits are at a logic high state. For example, bit 1 toggles when bit 0 is logic
high; bit 2 toggles when both bit 1 and bit 0 are logic high; bit 3 toggles when bit 2, bit 1 and
bit 0 are all high; and so on.
DESIGN TABLE
Present State Next state Flip flop inputs
0 0 0 0 0 1 0 X 0 X 1 X
0 0 1 0 1 0 0 X 1 X X 1
0 1 0 0 1 1 0 X X 0 1 X
0 1 1 1 0 0 1 X X 1 X 1
1 0 0 1 0 1 X 0 0 X 1 X
1 0 1 0 0 0 X 1 0 X X 1
1 1 0 X X X X X X X X X
1 1 1 X X X X X X X X X
JC KC
X X
JC=1 KC=1
0 X