Department of E& TC Engineering

Vishwakarma Institute of Technology, Pune

LAB JOURNAL
ET2273 - INDUSTRIAL ELECTRONICS

BATCH 3

Submitted by

Name:

Roll No:

GRNo:

Batch guide
Prof. Dr. Medha Wyawahare

1
 TABLE OF CONTENTS

Expt Title Dt of performance Page No

1 BJT Biasing 21-02-2022 3

2 BJT Common 01-03-2022 14

Emitter Amplifier

3 Design of inverting 18-04-2022 22

and non-inverting
amplifier

4 MOSFET as a switch 21-03-2022 32

5 Single phase 25-04-2022 39

controlled converter

6 Step Down Chopper 02-05-2022 45

(Buck converter)

2
 Experiment No. 1

Title : BJT Biasing.

Pre-Lab. : 1. Knowledge about DC analysis of BJT Circuits

Requisites

2. Multisim Live

Learning : To calculate Q point of a given circuit by

Objectives carrying out DC analysis and to verify it
practically

Outcomes After completion of the experiment students

will be able to
1. Observe Q point of BJT circuit
2. To verify regions of operation

Apparatus : Multisim Live

Sr. Description Quantity

No. required
1 BJT with Beta=100

2 Voltage probe 02
3 Current probe 02
4 Power Supply 10 V 02
5 Connecting wires

Theory : BJT biasing

Transistor Biasing is the process of setting a

3
transistors DC operating voltage or current
conditions to the correct level so that any AC input
signal can be amplified correctly by the transistor. A
transistors steady state of operation depends a great
deal on its base current, collector voltage, and
collector current and therefore, if a transistor is to
operate as a linear amplifier, it must be properly
biased to have a suitable operating point.
Establishing the correct operating point requires the
proper selection of bias resistors and load resistors
to provide the appropriate input current and collector
voltage conditions. The correct biasing point for a
bipolar transistor, either NPN or PNP, generally lies
generally at the center of its load line. This central
operating point is called the “Quiescent Operating
Point”, or Q-point for short. The various types of
biasing methods are: • Fixed Bias • Collector to base
bias • Voltage divider bias. The different types of
biasing schemes are shown below.

4
5
 Theoretically Q point is found by DC analysis of the
circuit. The steps for DC analysis are as below
1. Remove the ac sources
2. Assume the region of operation (active or
saturation) and assume proper junction
voltages
3. Apply KVL to the base and collector loops
4. Find the Q point values by solving KVL
equations
5. Verify the region of operation

Circuit : Fixed Bias circuit with Rc=2k and Rb=300k

Diagram

6
 Fixed Bias circuit with Rc=2k and Rb=150k

Voltage divider Bias circuit with Rc=2k, Re=100 ohm, Rb1=100k,

Rb2=5k

7
 Procedure :
1. Build a BJT fixed bias circuit with Rc 2k and Rb 300 k. Choose Beta=100
for BJT
2. Simulate the circuit
3. Note the Q point values 4. Find out in which region the BJT operates.
5. Justify your conclusion with proper reason.
6. Now change the base resistance to 150k
7. Simulate the circuit
8. Note the Q point values
9. Find out in which region the BJT operates.
10. Justify your conclusion with proper reason.

Observations: Q point for circuit 1

Ib= 30.656 µA = 0.030656 mA
Ic= 3.0656 mA
Vbe= 803.18 mV = 0.803 V
Vce= 3.8688 V

Q point for circuit 2

Ib= 61.230 µA = 0.06123 mA
Ic= 4.9219 mA
Vbe= 815.55 mV = 0.815 V
Vce= 156.23 mV = 0.156 V

Q point for circuit 3

Ib= 11.713 µA = 0.01171 mA
Ic= 1.1713 mA
Vbe= 778.30 mV = 0.778 V
Vce= 17.5387 V

8
Calculations:

Verification of region of operation of circuit 1

In circuit 1, β = 100(given)
β* Ib = (100 * 0.030656) mA
= 3.0656 mA
= Ic ===> Therefore, for circuit 1, Ic = β* Ib

Vce = 3.8688 > 0.2 ===> Therefore, for circuit 1, Vce > Vcesat

Therefore, circuit 1 is operating in Active region

Verification of region of operation of circuit 2

In circuit 2, β = 100(given)
β* Ib = (100 * 0.06123) mA
= 6.123 mA
Ic = 4.9219 mA ===> Therefore, for circuit 2, Ic < β* Ib

Vce = 0.156 ~ 0.2 ===> Therefore, for circuit 2, Vce ~ Vcesat

Therefore, circuit 2 is operating in Saturation region

Verification of region of operation of circuit 3

In circuit 3, β = 100(given)
β* Ib = (100 * 0.011713) mA
= 1.1713 mA
= Ic ===> Therefore, for circuit 3, Ic = β* Ib

Vce = 17.5387 > 0.2 ===> Therefore, for circuit 3, Vce > Vcesat

Therefore, circuit 3 is operating in Active region

9
DC Analysis:

10
11
12
13
Comments &:
Conclusions

In Active region, collector-base junction is reverse biased while emitter-base

junction is forward biased. In this region, the transistor acts as an amplifier.
The conditions to be fulfilled by a transistor for it to be operating in active region
are,
Ic = β* Ib
Vce > Vcesat

In Saturation region, the collector-base and emitter-base junctions, both are

forward biased. The transistor behaves as though a switch has been closed
between the collector and emitter. As the collector becomes positive, a smaller
number of holes are attracted to the collector, and more recombination occurs
in the base region (for PNP transistor). Therefore, in the saturation, collector
current drops. The conditions to be fulfilled by a transistor for it to be operating
in saturation region are therefore,

Ic < β* Ib
Vce ~ Vcesat = Knee voltage

In Cut-off region, the collector-base and emitter-base junctions, both are reverse
biased. Only a very small reverse saturation current I cbo flows, there is no base
or emitter current flowing.

In conclusion, a Bipolar Junction Transistor can be biased into Active, Saturation

or Cut-off regions, as per the requirement, by providing a fixed bias, voltage
divider bias or a collector to base bias. In the Active region the transistor can
function as an amplifier and in the Saturation and Cut-off regions, it can be
utilized as a switch.

14
 Experiment No.2

Title : BJT Common Emitter Amplifier

Pre-Lab. : 1)How BJT works as an amplifier
Requisites 2)BJT Amplifier configurations
3)Analysis of CE Amplifier
Learning : To find the Q point and amplifier parameters of CE
Objectives amplifier

Outcomes After completion of the experiment students will be able to

1) To find Q point (ICQ, VCEQ, IBQ)
2) To find AV, AI, Ri and Ro of CE Amplifier

Apparatus :
Sr. Description Quantity
No. Required
BJT with
1 01
Beta=100
2 Voltage probe 02
3 Current probe 02
Power
4 Supply 10 02
V
Connecting wires
5

Resistors
6 01 each
2k, 150k,300k

Theory: If the operation of BJT is limited to linear region, it is possible

to replace a transistor by an electrical equivalent circuit. This
circuit consists of dependent voltage and current sources and
passive components. The terminal behaviour of the amplifier
circuit and of the circuit after a BJT is replaced by its electrical
equivalent, are found to be in close agreement with each other.
When we replace the active device by its two port equivalent as
shown in Figure 5.1, the entire circuit reduces to a linear circuit.
To enable us to estimate the amplifier performance it is
important that BJT is operated in its linear region. This can be
ensured by properly biasing the BJT. Also, it is necessary to
15
limit the maximum signal excursion so that the device is not
taken into its non-linear region of operation at the extremes of
signal excursion. The parameters of BJT are assumed to be
constant over this small signal range. The signal excursion also
occupies a small portion of AC load line.
The small signal operation also implies that for sufficiently
small voltage and current excursions around the Q point, the
BJT is considered to be operating in linear region and it may be
replaced by two-port network equivalent consisting of
impedances and controlled sources. Once we replace a
transistor by its small signal model, all terminal characteristics
of transistor can be parameterized. The parameters introduced
in the model are interpreted in terms of external V -I
characteristics of the transistor. It is possible to measure
parameters of the transistor by using specific circuit
configurations. Alternatively, the parameters can also be
derived from a family of static input output characteristics.
As far as frequency of operation is concerned, the upper
limit is approximately 20 kHz. Below this frequency the
equivalent circuit of transistor does not involve any reactive
elements. Hence, the resultant network analysis will involve all
REAL numbers.
To amplify an AC signal without distortion, normally the
Q point is biased exactly at middle of the DC load line. This
ensures maximum input signal excursion.

16
Circuit Diagram:

Input Output Waveforms :

17
Procedure:
Build the circuit in Multisim live. Find Q point values by
disconnecting AC source.
Follow the steps given below to find out Av, AI, Rj and Ro of CE
Amplifier.
A) To find Av
1) Apply a sine wave signal having 1 KHz frequency from
function generator as input signal between input
terminals of the amplifier.
2) Adjust the amplitude of the input signal such that the
output signal will be undistorted sine wave.
3) Observe both input and output signal waveforms
simultaneously on CRO.
4) Note down Vi

5)Find out

B) To find Rj
6) Apply the same sine wave signal between input terminal
of the amplifier including a resistor R (1k) in series with
the amplifier input and note V0'.

7) Find out

C) To find Ro
8) Apply the same sine wave signal between input terminals
of the amplifier and connect a resistor RL (1 k) as a load
across output terminals. Note the p-p amplitude of
output signal across load as Vo".

9) Find out

D) To find AI
10) Find out AI using following formula.

18
Observations:

❖ Q POINT

• ICQ = 3.06mA = 0.00306 A

• VCEQ = 3.8688 V
• IBQ = 30.6µA = 0.0000306 A
• VBEQ = 803.18mV = 0.803 V

❖ AMPLIFIER PARAMETERS

• Vi = 7.0451mV = 0.0070451 V
• Vo= 8.3424 V
• Vo’= 4.5601 V
• Ri = 1205.64Ω
• Vo’’= 2.9511 V
• Ro= 1826.8Ω
• AI = 781.5

19
Figure. Finding Av

Figure. Finding Ri

20
 Figure. Finding Ro

Calculations:

1)

2)

3)

4)

21
Comments
& Conclusions:
From this experiment we conclude the process of amplification using
transistor, here Bipolar Junction Transistor (BJT). We also calculate gain in
three different conditions and observe that with increase in load, current gain
reduces.

22
 Experiment No. 3

Title : Design of inverting and non-inverting

amplifier

Pre-Lab. :
1. Knowledge about DC analysis of BJT Circuits
Requisites
2. Multisim Live

Learning : To develop and simulate Op Amp in inverting and

Objectives
noninverting configuration for various input
signals using MULTISIM.

Outcomes : After completion of the experiment students will

be able design inverting and non- inverting
amplifier.

Apparatus : Multisim Live

Theory : Operational amplifier is one fundamental building

block of analog circuits. When used properly in
negative feedback configurations, the overall closed‐
loop transfer characteristic can be precisely set by
stable passive components such as resistors,
capacitors, and diodes, regardless of the potential
variation of open‐loop parameters. Negative feedback
amplifier with op amp operating at its core provides
key to highly reliable and stable analog functions.
In this lab, we will be simulating four basic
configurations using the μA741 op amp. We will refer
the data sheet of LM 741 by Texas Instruments.
https://www.ti.com/lit/ds/symlink/lm741.pdf

Circuit analysis
with ideal op amp: The two main characteristics of an ideal op‐amp
23
are: Infinite gain (i.e. a change in even a fraction of
a millivolt in the input will swing the output over its
full range), and infinite input impedance (absolutely
zero current will flow into the inputs). To apply circuit
analysis with ideal op-amps, use nodal analysis but
with these “golden rules” shown below: (1) no
current flows into the op‐amp and,

(2) the input voltages are identical if the op‐amp is

in a negative feedback configuration i.e. the
differential input voltage is zero as Vp = Vn = 0
(Virtual Earth)

1. Inverting amplifier

● The inverting amplifier amplifies a signal input

by a gain but also inverts the input signal.
Recall that the open loop gain of any ideal
amplifier is given by A = ∞ and the output
voltage is given by
i.e. voltage at noninverting terminal minus
voltage at inverting terminal. So clearly, we
can see that in the open loop configuration for
the operational amplifier, we can only obtain
±∞ as the output, or more practically the high
or low bounds of the supply voltage (since
in practice we cannot create infinite potential).
● In order to solve this problem, we implement a
negative feedback loop shown in the figure

24
 below, which will allow us to construct a system
with a finite closed loop gain.

An inverting amplifier is shown in the following figure:

The principal features of this configuration are:

● The amplifier is inverting with the feedback loop
closed.
● The closed‐loop gain is solely determined by the
feedback resistors and
● The noninverting input terminal is always
grounded in this configuration. As a result, the
negative input must follow the potential of the
positive. This is often referred to as the “virtual
ground” property of feedback op amps.
● The closed‐loop gain of this amplifier is,

● If we know the resistance ratio and the input

signal, we can find output voltage as:

● The equation for the output voltage Vout also

shows that the circuit is linear in nature for a
fixed amplifier gain as Vout = Vin x Gain. This
property can be very useful for converting a
smaller sensor signal to a much larger voltage.
● If the two resistors are of equal value, R1 = Rƒ
then the gain of the amplifier will be -1
25
 producing a complementary form of the input
voltage at its output as Vout = -Vin. This type
of inverting amplifier configuration is generally
called a Unity Gain Inverter of simply an
Inverting Buffer.

2. Non‐inverting amplifier

A non‐inverting amplifier is shown in the following

figure. The principal features of this configuration
are:
● The amplifier is non‐inverting with the feedback
loop closed.
● The closed‐loop gain is solely determined by the
feedback resistors and assuming that
the loop gain of the circuit is very large.
● The positive input terminal now is connected to
the input voltage source. The feedback path,
however, is still connected around the output
terminal and the negative input terminal.
● The closed‐loop gain of this amplifier is,

● We can also find output voltage, if we know the

resistance ratio and the input signal as:

● The input resistance of this configuration is

very large.

Equivalent Potential Divider Network, to find gain of

this configuration:

26
Circuit : Inverting amplifier

with AC V input with DC V input

27
 Non-inverting amplifier

with DC V input with AC V input

Procedure :
Perform hand calculation to determine the
feedback factor of the op‐amp for inverting and
noninverting amplifier circuits.
● Enter both the schematics into individual
MULTISIM screens.
● Select the values of and to set
different gain values for both inverting as well
noninverting amplifier.
● Apply DC voltage as well as sinusoidal and
square wave signal with various amplitudes and
frequencies to both the configurations.
● Select and values to satisfy gain
mentioned in the observation table.
● For 1 kHz AC signals set start time 0 sec and
end time as (5e -3) i.e. 5 ms, so that 5 cycles
will appear in the ‘grapher’ window. You can set
these values in ‘Document’ settings of Multisim.
Similarly for 10 MHz AC signals set start time 0
sec and end time as (10e -6) i.e. 10 μs.
● Enclose images of AC input signal and its output
waveforms for both inverting as well
noninverting amplifier.

28
Observations:

Inverting Amplifier with DC V input

Rf R1 Gain Vin Vout (TH) Vout (Pract)

1 kΩ 1 kΩ 1 100 mV -100 mV -100 mV

4 kΩ 1 kΩ 4 2V -8 V -8.0001 V

5 kΩ 1 kΩ 5 5V -25 V -12.128 V

Inverting Amplifier with AC V input

Rf R1 Gain Frequency Vin Amplitude p-p(V)

3 kΩ 1 kΩ 3 1kHz Sinusoidal – 1V 5.9908

3 kΩ 1 kΩ 3 10 MHz Sinusoidal – 5V 24.072
5 kΩ 1 kΩ 5 1 kHz Square (clock in Multisim) – 1V 4.9998
5 kΩ 1 kΩ 5 10 MHz Square (clock in Multisim)– 5V 12.054

Non-Inverting Amplifier with DC V input

Rf R1 Gain Vin Vout (TH) Vout (Pract)

3 kΩ 1 kΩ 4 2V 8V 7.9998 V
4 kΩ 1 kΩ 5 5V 25 V 12.058 V

Non-Inverting Amplifier with AC V input

Rf R1 Gain Frequency Vin Amplitude p-p(V)

2 kΩ 1 kΩ 3 1kHz Sinusoidal – 1V 5.9908
2 kΩ 1 kΩ 3 10 MHz Sinusoidal – 5V 24.078
4 kΩ 1 kΩ 5 1 kHz Square (clock in Multisim) – 1V 4.999
4 kΩ 1 kΩ 5 10 MHz Square (clock in Multisim)– 5V 12.058

29
Waveforms:

[1] Inverting Amplifier with AC V input

Rf = 3kΩ, R1=1kΩ, Frequency = 1kHz,1V Sinusoidal Vin

Rf = 3kΩ, R1=1kΩ, Frequency = 10MHz,5V Sinusoidal Vin

Rf = 5kΩ, R1=1kΩ, Frequency = 1kHz,1V Square Vin

30
 Rf = 5kΩ, R1=1kΩ, Frequency = 1MHz,5V Square Vi

[2] Non-Inverting Amplifier with AC V input

Rf = 2kΩ, R1=1kΩ, Frequency = 1kHz,1V Sinusoidal Vin

Rf = 2kΩ, R1=1kΩ, Frequency = 10MHz,5V Sinusoidal Vin

31
 Rf = 4kΩ, R1=1kΩ, Frequency = 1kHz,1V Square Vin

Rf = 4kΩ, R1=1kΩ, Frequency = 1MHz,5V Square Vi

Comments & Conclusions:

The operational amplifier is a key component of analog circuitry. Simple

circuits containing operational amplifiers can be used to perform
mathematical operations, such as addition, subtraction, and multiplication,
on signals. They can also be used to take derivatives and integrals. Another
important application of an op-amp circuit is the voltage follower, which
serves as an isolator between two parts of a circuit
Here, we analyse the behaviour of both Inverting and Non-inverting
Operational Amplifiers using the μA741 op amp. We have also depicted
various theoretical characteristics of Op Amps in graphical format.

32
 Experiment No.4

TITLE: MOSFET AS A SWITCH

Objective: To study MOSFET and its application as switch

Tool: Simulation software Multisim live

Theory: A MOSFET is a four-terminal device having source(S), gate

(G), drain (D) and body (B) terminals. In general, the body of the
MOSFET is in connection with the source terminal thus forming a
three-terminal device such as a field-effect transistor. MOSFET is
generally considered as a transistor and employed in both the analog
and digital circuits.

MOSFET With Terminals

A MOSFET can function in two ways

• Depletion Mode
• Enhancement Mode

Depletion Mode

When there is no voltage across the gate terminal, the channel shows
its maximum conductance. Whereas when the voltage across the gate

33
terminal is either positive or negative, then the channel conductivity
decreases.

Enhancement Mode

When there is no voltage across the gate terminal, then the device does
not conduct. When there is the maximum voltage across the gate
terminal, then the device shows enhanced conductivity.

Working Principle of MOSFET

The main principle of the MOSFET device is to be able to control the

voltage and current flow between the source and drain terminals. It
works almost like a switch and the functionality of the device is based
on the MOS capacitor. The MOS capacitor is the main part of MOSFET.

The semiconductor surface at the below oxide layer which is located

between the source and drain terminal can be inverted from p-type to
n-type by the application of either a positive or negative gate voltage
respectively. When we apply a repulsive force for the positive gate
voltage, then the holes present beneath the oxide layer are pushed
downward with the substrate.

The depletion region populated by the bound negative charges which are
associated with the acceptor atoms. When electrons are reached, a
channel is developed. The positive voltage also attracts electrons from
the n+ source and drain regions into the channel. Now, if a voltage is
applied between the drain and source, the current flows freely between
the source and drain and the gate voltage controls the electrons in the

34
channel. Instead of the positive voltage, if we apply a negative voltage,
a hole channel will be formed under the oxide layer.

MOSFET Regions of Operation

To the most general scenario, the operation of this device happens

mainly in three regions and those are as follows:

• Cut-off Region – It is the region where the device will be in the OFF
condition and there zero amount of current flow through it. Here, the
device functions as a basic switch and is so employed as when they
are necessary to operate as electrical switches.
• Saturation Region – In this region, the devices will have their drain
to source current value as constant without considering the
enhancement in the voltage across the drain to source. This happens
only once when the voltage across the drain to source terminal
increases more than the pinch-off voltage value. In this scenario, the
device functions as a closed switch where a saturated level of current
across the drain to source terminals flows. Due to this, the saturation
region is selected when the devices are supposed to perform
switching.
• Linear/Ohmic Region – It is the region where the current across
the drain to source terminal enhances with the increment in the
voltage across the drain to source path. When the MOSFET devices
function in this linear region, they perform amplifier functionality.
Let us now consider the switching characteristics of MOSFET

A semiconductor too such as MOSFET or Bipolar Junction Transistor is

basically functioned as switches in two scenarios one is ON state, and
the other is OFF state. To consider this functionality, let us have a look
at the ideal and practical characteristics of the MOSFET device.
35
Ideal Switch Characteristics

When a MOSFET is supposed to function as an ideal switch, it should

hold the below properties and those are

• In the ON condition, there must be the current limitation that it

carries
• In the OFF condition, blocking voltage levels should not hold any kind
of limitations
• When the device functions in ON state, the voltage drop value should
be null
• The resistance in OFF state should be infinite
• There should be no restrictions on the speed of operation

Circuit diagram:

36
Procedure:
1) Configure the circuit as shown in the figure.
2) Connect voltage probe across Gate and source and across drain
and connect current probe in series with drain to measure drain
current
3) Go on varying Vgs from -4 V to +4 Volts in steps of 0.5 V and
note drain current
4) Plot the graph of: - a) Vgs Vs Id
5) Note the threshold voltage
6) Adjust Vgs below threshold to make it an off switch. Note drain
current and Vds
7) Adjust Vgs above threshold to make it an on switch. Note drain
current and Vds

Observations for transfer characteristics:

Vds= 10V

Vgs(V) Id(A)
-4 0

-3.5 0

-3 0

-2.5 0

-2 0

-1.5 0

-1 0

-0.5 0

0 0

37
0.5 0.0000025

1 0.00001

1.5 0.0000225

2 0.00004

2.5 0.0000625

3 0.00009

3.5 0.0001225

4 0.00016

0.0001
8

0.0001
6

0.0001
4

0.0001
2

0.000
1

0.0000
8

-5 -4 -3 -2 -1
0.0000 0 1 2 3 4 5
-
6
0.00002
Figure. Transfer characteristics (y-axis: Id, x-axis: Vgs)
0.0000
4
Vth= 0.5V 0.0000
2

When Mosfet is off 0 When Mosfet is on

Vgs= -4V Vgs=0.5V

Id=0A Id= 2.5µA

38
Conclusion:

For a semiconductor device, like a MOSFET, to act as an ideal switch,

when the device is in ON state, there should be zero voltage drop and
OFF state resistance should be infinite. In a practical situation however,
when the device is ON, there will be a finite on state resistance resulting
in a forward voltage drop. There will also be a finite off state resistance
which results in a reverse leakage current.

In this experiment, we have tried to determine the threshold gate to

source voltage, depending on which the MOSFET will function as an ON
(saturation region) or OFF (cutoff region) switch. For an NMOS, when
the voltage VGS is low, the NMOS turns off and when VGS is high the
NMOS turns on.We have also successfully plotted the transfer
characteristics for the same.

39
 Experiment No.5

TITLE: SINGLE PHASE CONTROLLED CONVERTER

Objective: To study SCR based single phase-controlled converter

(semi-converter) with resistive load.

Tool: Simulation software PSIM

Theory: The single-phase SCR based controlled converter, which is also

referred as a semi-converter, comprises of 2 SCRs and 2 diodes. It is a
AC to variable DC converter/ rectifier. Variation in the firing angle (α) of
SCRs causes the output voltage to vary from minimum to maximum
value. Firing pulses of both the SCRs are synchronized with AC source
in respective half cycles. Refer the connection diagram. Semi converter
is a single quadrant converter. The polarity of average load voltage is
always positive for any firing angle α (min to max). For an inductive
load, semi converter provides inherent freewheeling of load energy
through two diodes in the respective cycles. Hence circuit works only as
a rectifier and can be used for unidirectional speed control of DC motor.

Circuit diagram for resistive load:

40
Circuit diagram for inductive load:

`
Procedure:
1. Configure the circuit as shown in the figure.
2. Connect Gating Signal Generator to each of the two SCRs, for
adjusting firing angle.
3. Set the following parameters of circuit components: -
AC Source: - Voltage- 325V (max. value), Frequency-
50Hz Load resistance, RL=10Ω,
4. Connect voltage probe across AC source and across the load to
observe input voltage and output voltage waveforms respectively.
5. Observe waveforms across load at various firing angles.
6. Measure load voltage against variation in firing angle and verify it with
theoretically calculated values.
7. Calculate Vload for different firing angles. Observe the simulated value
by connecting DC Voltage probe across the load
8. Plot the waveforms of: - a) AC Source voltage
b) Load voltage for different firing angles.

41
Observations: For Resistive load: -

Sr. Firing VLoad =Vm/𝝅*(1+cos(α)) VLoad observed

No. angle α°

1. 30◦ 193.13 207.38

2. 45◦ 176.69 190.61

3. 60◦ 155.25 166.88

4. 90◦ 103.50 109.3

Waveforms for Resistive load:

Firing angle 30◦

Firing angle 90◦

42
Firing angle 60◦

Firing angle 90◦

Waveforms for Inductive load:

Firing angle 90◦

43
Firing angle 45◦

Firing angle 60◦

Firing angle 90◦

44
Conclusion:

The single-phase controlled converter is an AC to variable DC converter. It

finds application in battery charging, speed control of DC motors and front
end of UPS (Uninterruptible Power Supply) and SMPS (Switched Mode Power
Supply). By varying the firing angle using Gating Signal Generator connected
to two SCRs, output voltage across the loads and the waveform for single
phase full wave bridge converter was observed here.

45
 Experiment No.6

Title: Step Down Chopper (Buck converter)

Objective: To study step down chopper with resistive and inductive

load.

Tool: Simulation software PSIM

Theory: Step-down chopper is a circuit that step downs its DC input

voltage. The value of average output DC voltage of this chopper is less
than that of its fixed DC input source voltage. Refer the connection
diagram. The circuit consists of an inductor L, a free-wheeling diode,
switch as a chopper element, dc Source and Load. Fixed DC input
voltage Vdc is applied and the variable DC output voltage, which is a
function of duty cycle, is observed across the load. Device is switched
ON and OFF at some frequency called the chopping frequency (f).
The chopper can be used for speed control of DC motor.

Procedure:
1) Configure the circuit as shown in the figure.
2) Connect Gating Signal Generator to the base terminal of a power
BJT which acts as a switch/ chopper element.
3) Set the following parameters of circuit components: -
DC Source: - Voltage- 100V (max. value),
Gating Signal Frequency – 50Hz
Load resistance, RL=10Ω,
4) Connect voltage probe across DC source and across the load to
observe input voltage and output voltage waveforms respectively.
5) Observe waveforms across load at various duty cycles (0 < δ <1)

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 6) Measure load voltage against variation in duty cycle and verify it
with theoretically calculated values.
7) Plot the waveforms of: - a) DC Source voltage
b) Load voltage for different duty cycles.

CIRCUIT DIAGRAM:

Resistive load:

Inductive load:

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 Observations: For Resistive load: - Vdc = 100V

Sr. Duty VLoad =Vdc * δ Observed VLoad

No. Cycle(δ)
1. 100% 100 V 99.9 V

2. 50% 50 V 49.95 V

3. 40% 40 V 40.02 V

4. 25% 25 V 24.99 V

WAVEFORMS:

Resistive load

Duty cycle 100%

Duty cycle 50%

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Duty cycle 40%

Duty cycle 25%

Observations: For Inductive load: - Vdc = 100V

Sr. Duty VLoad =Vdc * δ Observed VLoad

No. Cycle(δ)
1. 100% 100 V 99.9 V

2. 50% 50 V 49.99 V

3. 40% 40 V 39.99 V

4. 25% 25 V 24.99 V

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Inductive load

Duty cycle 100%

Duty cycle 50%

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Duty cycle 40%

Duty cycle 25%

Conclusion:
When chopper is ON, supply is connected across load. Current flows from supply
to load. When chopper is OFF, load current continues to flow in the same direction
through FWD due to energy stored in inductor ‘L’. Load current can be continuous
or discontinuous depending on the values of ‘L’ and duty cycle ‘d’ For a
continuous current operation, load current varies between two limits Imax and
Imin When current becomes equal to Imax the chopper is turned-off and it is
turned-on when current reduces to Imin.

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