R8CB05BO Champion
R8CB05BO Champion
R8CB05BO Champion
PIN DESCRIPTION
Operating Voltage
Pin No. Symbol Description
Min. Typ. Max. Unit
1 GND Ground
3 ISENSE Current sense input to the PFC current limit comparator -5 0.7 V
6 V+I PWM feed back and current limit comparator input 0 1.5 V
7 PFCOFFB PFCOFFB; it can turn off PFC stage when it is below 5V. 0 VCC V
ORDERING INFORMATION
Part Number Operation Frequency Initial Accuracy (KHz) Temperature Range Package
R8CB05BOGIR Fpwm = Fpfc = 100Khz 90 100 110 -40℃ to 125℃ 10 Pin SSOP(R10)
Note:
1. G : Suffix for Pb Free Product
2. Initial Accuracy : TA=25℃
BLOCK DIAGRAM
2 4
IAC .VEAO
40K IAC 8
VCC
400K S Q
ISENSE
100K R
PFC CMP
3
-
R Q
-
UVB
+
.
SUM + VREFDK 9
V To Ramp PFCOUT
VFB
GMV
5 -
. . . UVLO
+
2.5V
FAULT
VCC . .
BROKENWIRE
-
+
0.5V
. R1
2.25V - UVB
1.1V - R2 Q
VREFDK 10
+
-1V
PFCOFFB
SHUTDOWN PFC
7 - 10mS
.
5.5V +
+
PWM CMP
5V 1.5V -
PWMCLK . . - 1
SS .
GND
GND
+
R8CB05BO
Symbol Parameter Test Conditions Unit
Min. Typ. Max.
Voltage Error Amplifier (GMv)
IAC
Input Impedance (R8CB05BO) ISENSE = 0V, TA=25℃ 35K 40K 50K Ohm
Hysteresis 65 150 mV
VIN OK Comparator
V + I Comparator
Threshold Voltage Normal operation without soft start 1.38 1.5 1.62 V
R8CB05BO
Symbol Parameter Test Conditions Unit
Min. Typ. Max.
PFCOFFB
PFCOFFB Threshold Low PFCOFFB 4.75 5.0 5.25 V
PFCOFFB Hysteresis 350 500 750 mV
PFC Frequency
Voltage Stability 10V < VCC < 15V 1 %
Temperature Stability 2 %
Total Variation Line, Temp (R8CB05BO) 90 100 110 kHz
PFC Dead Time (Note 2) 0.3 0.45 0.65 us
PFC
Minimum Duty Cycle IAC=100uA,VFB=2.55V, ISENSE = 0V 1 %
Maximum Duty Cycle IAC=0uA,VFB=2.0V, ISENSE = 0V 90 95 %
Output Low Rdson 15 22.5 ohm
IOUT = -100mA 0.8 1.5 V
Output Low Voltage
IOUT = -10mA, VCC = 8V 0.4 0.8 V
Output High Rdson 30 45 ohm
Output High Voltage IOUT = 100mA, VCC = 15V 13.5 14.2 V
Rise/Fall Time (Note 2) CL = 1000pF 50 ns
PWM
Duty Cycle Range IC 49 49.5 50 %
Output Low Rdson At room temp 15 22.5 ohm
IOUT = -100mA 0.8 1.5 V
Output Low Voltage
IOUT = -10mA, VCC = 8V 0.7 1.5 V
Output High Rdson (Note 2) At room temp 30 45 ohm
Output High Voltage IOUT = 100mA, VCC = 15V 13.5 14.2 V
Rise/Fall Time (Note 2) CL = 1000pF 50 ns
Supply
Start-Up Current VCC = 11V, CL = 0 135 150 uA
Operating Current VCC = 15V, CL = 0 2 4 mA
Undervoltage Lockout Threshold 12.35 13 13.65 V
Undervoltage Lockout Hysteresis 2.7 3 3.3 V
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Note 2: Guaranteed by design, not 100% production test.
127
120
Transconductance (umho)
113
106
99
92
85
78
71
64
57
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
VFB (V)
Functional Description
Detailed Pin Descriptions
The R8CB05BO consists of an ICST (Input Current IAC (Pin 2)
Shaping Technique), CCM (Continuous Conduction Mode) Typically, it has a feed-forward resistor, RAC,
or DCM (Discontinuous Conduction Mode) boost PFC 4Mega~10Mega ohm resistor connected between this pin
(Power Factor Correction) front end and a synchronized and rectified line input voltage.
PWM (Pulse Width Modulator) back end. The R8CB05BO The current of RAC will program the automatic slope
is designed to replace FAN4803 (8 pin SOP package), compensation for the system. This feed-forward signal can
which is the second generation of the ML4803 with 8 pin increase the signal to noise ratio for the light load condition
package. It is distinguished from earlier combo controllers or the high input line voltage condition.
by its low count, innovative input current shaping technique,
and very low start-up and operating currents. The PWM ISENSE (Pin 3)
section is dedicated to peak current mode operation. It uses This pin ties to a resistor which senses the PFC input
conventional trailing-edge modulation, while the PFC uses current. This signal should be negative with respect to the IC
leading-edge modulation. This patented Leading ground. It internally feeds the pulse-by-pulse current limit
Edge/Trailing Edge (LETE) modulation technique helps to comparator and the current sense feedback signal. The
minimize ripple current in the PFC DC bus capacitor. ILIMIT trip level is –1V. The ISENSE feedback is internally
multiplied by a gain of four and compared against the internal
The main improvements from ML4803 are: programmed ramp to set the PFC duty cycle. The
1. Add Green Mode Functions for both PFC and PWM intersection of the boost inductor current down-slope with the
2. Remove the one pin error amplifier and add back the internal programming ramp determines the boost off-time.
slew rate enhancement GMv, which is using voltage
input instead of current input. This transconductance It requires a RC filter between ISENSE and PFC boost
amplifier will increase the transient response 5 to 10 sensing resistor.
times from the conventional OP
3. VFB PFC OVP comparator VEAO (Pin 4)
4. PFC Tri-Fault Detect for UL1950 compliance and
This is the PFC slew rate enhanced transconductance
enhanced safety
amplifier output which needs to connected with a
5. A feed forward signal from IAC pin is added to do the
automatic slope compensation. This increases the compensation network Ground.
signal to noise ratio during the light load; therefore,
THD is improved at light load and high input line VFB (Pin 5)
voltage. Besides this is the PFC slew rate enhanced
6. R8CB05BO does not require the bleed resistor and it transconductance input, it also tie to a couple of protection
uses the more than 800k ohm resistor between IAC comparators, PFCOVP, and PFC Tri-Fault Detect
pin and rectified line voltage to feed the initial current
before the chip wakes up. V + I (Pin 6)
7. VIN-OK comparator is added to guaranteed PWM This pin is tied to the primary side PWM current sense
cannot turn on until VFB reaches 2.5V in which PFC resistor or transformer. It provides the internal pulse-by-pulse
boost output is about steady state, typical 380V. current limit for the PWM stage (which occurs at 1.5V) and
8. A 10mS digital PWM soft start circuit is added the peak current mode feedback path for the current mode
9. 10 pin SOP package control of the PWM stage. Besides current information, the
10. No internal Zener and VCCOVP comparator photo-couple also goes into V + I pin. Therefore, it is the
SUM Amplifier input.
The R8CB05BO operates both PFC and PWM sections at Soft Start is around 10mS after the startup(VCC is greater
100kHz. This allows the use of smaller PWM magnetic and than 13V).
output filter components, while minimizing switching losses
in the PFC stage.
PFC Control: Leading Edge Modulation with Input Therefore, equation (6) becomes:
Current Shaping Technique I d × toff
(I.C.S.T.) Id = = I d × d ' = I d × (1 − d ) (7)
Tsw
The only differences between the conventional PFC control
topology and I.C.S.T. is: Combine equation (7) and equation (5), and we get:
the current loop of the conventional control method is a ( d ' ) 2 × Vout
close loop method and it requires a detail understanding Id × d ' =
Re
about the system loop gain to design. With I.C.S.T., since
the current loop is an open loop, it is very straightforward to d × Vout
'
(1 − d ) 2 × Vout
Id = (5)
Re
One of the advantages of this control technique is that it ZCV: Compensation Net Work for the Voltage Loop
required only one system clock. Switch 1(SW1) turns OFF GMv: Transconductance of VEAO
and switch 2 (SW2) turns ON at the same instant to PIN: Average PFC Input Power
minimize the momentary “no-load” period, thus lowering VOUTDC: PFC Boost Output Voltage; typical designed value is
ripple voltage generated by the switching action. With such 380V.
synchronized switching, the ripple voltage of the first stage CDC: PFC Boost Output Capacitor
is reduced. Calculation and evaluation have shown that the
120Hz component of the PFC’s output ripple voltage can be ΔVEAO: This is the necessary change of the VEAO to deliver
reduced by as much as 30% using this method, the designed average input power. The average value is
substantially reducing dissipation in the high-voltage PFC 6V-3V=3V since when the input line voltage increases, the
capacitor. delta VEAO will be reduced to deliver the same to the output.
To over compensate, we choose the delta VEAO is 3V.
Typical Applications
PFC Section: Internal Voltage Ramp
PFC Voltage Loop Error Amp, VEAO The internal ramp current source is programmed by way of
The ML4803 utilizes an one pin voltage error amplifier in VEAO pin voltage. When VEAO increases the ramp current
the PFC section (VEAO). In the R8CB05BO, it is using the source is also increase. This current source is used to
slew rate enhanced transconductance amplifier, which is develop the internal ramp by charging the internal 30pF +12/
the same as error amplifier in the CM6800. The unique -10% capacitor. The frequency of the internal programming
transconductance profile can speed up the conventional ramp is set internally to 100kHz.
transient response by 10 times. The internal reference of
the VEAO is 2.5V. The input of the VEAO is VFB pin. Design PFC ISENSE Filtering
ISENSE Filter, the RC filter between Rs and ISENSE:
PFC Voltage Loop Compensation
The voltage-loop bandwidth must be set to less than 120Hz There are 2 purposes to add a filter at ISENSE pin:
to limit the amount of line current harmonic distortion. A 1.) Protection: During start up or inrush current
typical crossover frequency is 30Hz. conditions, it will have a large voltage cross Rs,
which is the sensing resistor of the PFC boost
The Voltage Loop Gain (S) converter. It requires the ISENSE Filter to attenuate
the energy.
2.) Reduce L, the Boost Inductor: The ISENSE Filter
ΔVOUT ΔVFB ΔVEAO
= * * also can reduce the Boost Inductor value since the
ΔVEAO ΔVOUT ΔVFB ISENSE Filter behaves like an integrator before
PIN * 2.5V going ISENSE which is the input of the current error
≈ * GMV * ZCV amplifier, IEAO.
VOUTDC * ΔVEAO * S * CDC
2
The ISENSE Filter is a RC filter. The resistor value of the PWM section wakes up after PFC reaches steady state
ISENSE Filter is between 100 ohm and 50 ohm. By selecting PWM section is off all the time before PFC VFB reaches
RFILTER equal to 50 ohm will keep the offset of the IEAO less 2.25V. Then internal 10mS digital PWM soft start circuit
than 5mV. Usually, we design the pole of ISENSE Filter at slowly ramps up the soft-start voltage.
fpfc/6, one sixth of the PFC switching frequency. Therefore,
PFC OVP Comparator
the boost inductor can be reduced 6 times without
PFC OVP Comparator sense VFB pin which is the same the
disturbing the stability. Therefore, the capacitor of the
voltage loop input. The good thing is the compensation
ISENSE Filter, CFILTER, will be around 283nF.
network is connected to VEAO. The PFC OVP function is a
relative fast OVP. It is not like the conventional error amplifier
IAC, RAC, Automatic Slope Compensation, DCM at high line which is an operational amplifier and it requires a local
and light load, and Startup current feedback and it make the OVP action becomes very slow.
The threshold of the PFC OVP is 2.5V+10% =2.75V with
There are 4 purposes for IAC pin: 250mV hysteresis.
1.) For the leading edge modulation, when the duty
cycle is less than 50%, it requires the similar slope PFC Tri-Fault Detect Comparator
compensation, as the duty cycle of the trailing
edge modulation is greater than 50%. In the To improve power supply reliability, reduce system
R8CB05BO, it is a relatively easy thing to design. component count, and simplify compliance to UL1950 safety
Use an more than 800K ohm resistor, RAC to standards, the R8CB05BO includes PFC Tri-Fault Detect.
connect IAC pin and the rectified line voltage. It This feature monitors VFB (Pin 5) for certain PFC fault
will do the automatic slope compensation. If the conditions.
input boost inductor is too small, the RAC may
need to be reduced more. In case of a feedback path failure, the output of the PFC
2.) During the startup period, Rac also provides the could go out of safe operating limits. With such a failure, VFB
initial startup current, 100uA;therefore, the bleed will go outside of its normal operating area. Should VFB go
resistor is not needed. too low, too high, or open, PFC Tri-Fault Detect senses the
3.) Since IAC pin with RAC behaves as a feedforward error and terminates the PFC output drive.
signal, it also enhances the signal to noise ratio
and the THD of the input current. PFC Tri-Fault detect is an entirely internal circuit. It requires
4.) It also will try to keep the maximum input power to no external components to serve its protective function.
be constant. However, the maximum input power
will still go up when the input line voltage goes up. VCC over voltage and generate VCC
For the R8CB05BO system, if VCC is generated from a
Start Up of the system, UVLO, VREFOK and Soft Start source that is proportional to the PFC output voltage. The
During the Start-up period, RAC resistor will provide the PFC OVP will avoid the VCC over voltage. Given that 16V on
start up current~100uA from the rectified line voltage to IAC VCC corresponds to 380V on the PFC output, 17.6V on VCC
pin. During the Start up, the soft start function is triggered corresponds to an acceptable level of 18V.
and the duration of the soft start will last around 10mS.
Typically, there is a bootstrap winding off the boost inductor.
PFC section wakes up after Start up period
After Start up period, PFC section will softly start since The VCC isn’t built in the VCC OVP function. For the VCC
VEAO is zero before the start-up period. Since VEAO is a maximum rating, an external zener clamp is desirable and
slew rate enhanced transconductance amplifier (see figure proposed to limit VCC over voltage.
3), VEAO has a high impedance output like a current
source and it will slowly charge the compensation net work It is a necessary to put RC filter between bootstrap winding
which needs to be designed by using the voltage loop gain and VCC. For VCC=15V, it is sufficient to drive either a
equation. power MOSFET or a IGBT.
Before PFC boost output reaches its design voltage, it is
around 380V and VFB reaches 2.5V, PWM section is off.
UVLO
The UVLO threshold is 13V providing 3V hysteresis.
PWM Section
Component Reduction
Components associated with the VRMS and IEAO pins of a
typical PFC controller such as the CM6800 have been
eliminated. The PFC power limit and bandwidth does vary
with line voltage.
EMI
- + GBU808 L
FG
IN5406 N
IN5406
0.47uF/400V
GND
1N5406
5M
VCC 380VDC
T106-75
15V ER806
VCC
SR160 SR160
280K R8CB05BO
1 10
GND PWM OUT PWM OUT
1M
47 102pF 14N50 +
2 9 10 1/2W 180uF/450V
IAC PFC OUT
VCC 10K
SR140 SR140
1N4148
3 8
Isense VCC
1K 10K
4 7
VEAO PFCOFFB
VCC 470pF/250V
68K
1M 1M 104pF 10M
5 6 9.5V
380VDC VFB V+I
VCC ISO1A
1N4148 330K
+ 0
4.7uF 10K 104pF
472pF 13K PWM IS
474pF 473pF 500
1N4148
470pF
+5V +12V
B+
380VDC 1K
20A/100V
+12V
4.7K 0.1uF
09N90 10 +
+
2200uF/16V 2200uF/16V
1000PF
3
1
TL431
PWM OUT 1000PF + +
2
2200uF/10V 2200uF/6.3V
4.75K 1% 1/8W
09N90
10
PWM IS GND
0.2 2W
PACKAGE DIMENSION
10 Pin-SSOP (R10)
PIN 1 ID
ZD B
F θ
NUMBERING SCHEME
Ordering Number: R8CB05BOIR (note1)
note1:
I : -40℃~+125℃
R: SSOP-10
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before placing orders, that the information being relied on is current.
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customer should provide adequate design and operating safeguards.
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