Ec6304-Electronic Circuits - I Iii Semester Ece Two Marks Questions and Answers EC6304 - Electronic Circuits - I
Ec6304-Electronic Circuits - I Iii Semester Ece Two Marks Questions and Answers EC6304 - Electronic Circuits - I
Ec6304-Electronic Circuits - I Iii Semester Ece Two Marks Questions and Answers EC6304 - Electronic Circuits - I
ii. Stability factor indicate the degree of change in operating point due to variation
in temperature.
𝜕𝐼𝑐
Sʹ = , with β, ICO constant
𝜕𝑉𝐵𝐸
𝜕𝐼𝑐
Sʹʹ = |, with VBE, ICO constant
𝜕𝛽
2. Why do you fix the operating point in the middle of the dc load line? [Nov 05]
In order to get the faithful amplification of the signals, operating point had to be fixed in
the middle of the dc load line.
3. What is Bias? What is the need for biasing? [ Nov-08, May-09,Nov-10, May-11, May-
13]
The proper flow of zero signal collector emitter supply voltage during the passage of
signal is known as transistor biasing.
Alternatively, the process of giving proper supply voltages and resistances for obtaining
the desired Q-point is called biasing.
The need for biasing is
To prevent thermal runaway
To achieve stability
4. Why capacitive coupling is used to connect a signal source to an amplifier?
[Nov/Dec-07]
Coupling capacitor blocks DC voltage but freely pass signal voltages. Because of this
biasing conditions are maintained constant.
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EC6304- Electronic Circuits- I III Semester ECE
Two marks questions and answers
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EC6304- Electronic Circuits- I III Semester ECE
Two marks questions and answers
The required condition to avoid thermal runaway is that the rate at which heat is released
at the collector junction must not exceed the rate at which the heat can be dissipated. It is
given by
𝜕𝑃𝑐 𝜕𝑃𝐷
<
𝜕𝑇𝑗 𝜕𝑇𝑗
10. Draw the single stage self biased circuit using PNP transistor. [April /May – 11]
11. What are the advantages and disadvantages of fixed bias circuit?
Advantages of fixed bias circuit are as follows
This is a simple circuit which uses very few components
The operating point can be fixed anywhere in the active region of the
characteristics by simply changing the value of RB. Thus it provides flexibility in
design.
Disadvantages of fixed bias circuit are as follows
This circuit does not provide any check on the collector current which
increases with the rise in temperature i.e. thermal stability is not provided by
this circuit.
Since IC and β and IB is already fixed; IC depends on β which changes unit to
unit and shifts the operating points.
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EC6304- Electronic Circuits- I III Semester ECE
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16. What is DC load line? How is Q point plotted on the DC load line? [Nov / Dec – 12]
i. The line joining the ICMAX and VCEMAX in the output characteristics of a transistor is
called DC load line.
ii. The optimum Q-point is located at the midpoint of the DC load line between the
saturation and cutoff regions. In order to get faithful amplification, the Q point must
be within the active region of the transistor.
Ic(mA
)
ICMA (VCEQ,
ICQ)
X
VCE(V)
VCEM
AX
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EC6304- Electronic Circuits- I III Semester ECE
Two marks questions and answers
17. For the circuit shown in the figure, determine the operating point with β = 100.
[A/M – 08]
Vcc=10V
4 kohm
1kohm
IB IC
= 9.3mA
IC = β IB
= 100 x 9.3 x 10-3
= 0.93A
VCE = VCC – ICRC
= 10 – (0.93 x 4 x 10-3)
= 9.9962 V
18. What are the factors that affect the Q point of a circuit using BJT? [ Nov / Dec 09]
Reverse saturation current ICO, which doubles for every 10ºC increase in
temperature.
Base-emitter voltage VBE, which decreases by 2.5 mV per ºC.
Transistor current gain β, which increases with temperature.
Variations in transistor parameters such as β.
19. What is reverse saturation current? [May /June – 12]
i. In the npn BJT transistor, the base collector junction is reverse biased.
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EC6304- Electronic Circuits- I III Semester ECE
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ii. Under the reverse bias condition, the thermally generated holes in the P-region are
attracted towards the negative terminal of the battery and the electrons in the N-
region are attracted towards the positive terminal of the battery.
iii. The minority carriers, electrons in the P- region and holes in the N-region, wander
over to the junction and flow towards their majority carrier side giving rise to a
current known as reverse saturation current.
20. Draw the fixed bias and the self bias circuits. [ Nov /Dec – 09], [May /June – 07]
FIXED BIAS CIRCUIT SELF BIAS CIRCUIT
21. State the advantages of self-bias over other types of biasing. [ Nov /Dec – 10]
In a fixed bias, the stability factor S = 1 + β. Since β is a large quantity, the circuit
provides poor stability.
In collector-to-base bias method, when RC is very small, 𝑆 ≈ 1 + β , this is equal
to that of fixed bias. Hence it is not preferable.
𝑅𝐵
In self bias method, when is very small, 𝑆 ≈ 1, which provides good stability.
𝑅𝐸
Hence self bias method is the best biasing method among the biasing methods.
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26. What are the different methods of biasing JFET? [May /June – 12]
The different methods of biasing JFET are
i. Fixed Bias
ii. Voltage divider Bias
iii. Self Bias
27. What are the parameters that the operating point depends upon?
The operating point depends upon
AC and DC loads
Available power supply
Maximum transistor rating
Peak signal extension to be handled by the stage and the tolerable distortion.
𝜕𝑇 = 𝑇𝑗 − 𝑇𝐴
𝑇𝑗 − 𝑇𝐴 = 𝜃𝑃𝐷
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EC6304- Electronic Circuits- I III Semester ECE
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𝑇𝑗 − 𝑇𝐴
𝜃 =
𝑃𝐷
𝜃 Constant proportionality is known as thermal resistance.
29. Why is the input impedance of FET more than that of BJT?
Input impedance of FET is more than that of BJT because the input circuit of FET
is reverse bias whereas the input circuit of BJT is forward bias.
30. What are the different methods of biasing JFET? [May / June – 12]
The different methods of biasing JFET are
a) Fixed Bias
b) Voltage divider Bias
c) Self Bias
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UNIT–II
BJT AMPLIFIERS
2. Write the voltage gain equation for CE configuration including source resistance.
The voltage gain equation for CE configuration including source resistance is
given as
𝑉𝐶
AVS = 𝑉𝑆
𝐴𝐼 𝑍𝐿
AVS = 𝑍𝑖𝑒 +𝑅𝑆
Where,
AVS – Voltage gain including source resistance
AI – Current gain
ZL – Load impedance
Zie – Input impedance of CE amplifier
RS – Source resistance
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EC6304- Electronic Circuits- I III Semester ECE
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Class AB amplifier
10. Two identical amplifiers having 10 dB gain each are cascaded. Calculate the output,
if the input is of 1 mV (p-p).
[A/M – 11]
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EC6304- Electronic Circuits- I III Semester ECE
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Solution:
Given: AV1 = Av2=10 dB
VI = 1mV (p-p)
To find : V0
Overall gain: AV = AV1 . AV2
AV = 10 * 10
AV = 100 dB
𝑉
AV = 20log 𝑉𝑜
𝑖
𝑉𝑜 100
log = =5
𝑉𝑖 20
𝑉𝑜
= 105
𝑉𝑖
Vo = 105 . Vi
Vo = 105 x 1 x 10-3
Vo = 100 V
11. What is the coupling schemes used in multistage amplifiers? [A/M – 10]
There are three coupling schemes commonly used in multistage amplifiers.
i. Resistance – Capacitance (RC) Coupling
ii. Transformer coupling
iii. Direct coupling
12. What is a cascade amplifier?
To increases the voltage gain of the amplifier, multiple amplifiers are connected in
cascade. The output of one amplifier is the input to another stage. In this way, the overall
voltage gain can be increased, when numbers of amplifier stages are used in succession.
It is called a multistage amplifier or cascade amplifier.
13. Two amplifiers having gain 20 dB and 40 dB are cascaded. Find the overall gain in
dB?
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Overall gain in dB = 20 dB + 40 dB
= 60 dB
The two half network can be connected using any number of wires but the wires should
not cross. Then for such a bisected network at the imaginary line of symmetry with all the
connecting wires open. The input impedance at input and output is Z(1/2)OC, while with all
the connecting wires shorted , the impedance at input and output is Z(1/2)SC .
18. Define – CMRR [Nov /Dec – 09], [Nov /Dec – 07] [May / June – 07]
Common Mode Rejection Ratio/figure of merit is defined as the ability of a differential
amplifier to reject a common mode signal.
CMRR is defined as the ratio of the differential mode Ad gain to the common mode gain
AC and is generally expressed in dB.
𝐴
CMRR = 20 log10 𝐴𝑑
𝑐
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EC6304- Electronic Circuits- I III Semester ECE
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21. Define – Miller’s Theorem [May / June – 12], [April / May – 10]
Miller’s theorem states that, if an impedance Z is connected between the input and output
terminals of a network which provides a voltage gain Av, an equivalent circuit that gives
𝑍
the same effect can be drawn by removing Z and connecting an impedance Zi = (1−𝐴v)
𝑍𝐴
and Zo= (𝐴v−1).
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24. Why transformer coupling is not used in the initial stages of a multistage amplifier?
The transformer coupled amplifiers are not used in the initial stages of a multistage
amplifier because it produces unwanted noise. Once these signals are amplified, it cannot
be eliminated by other stages. Hence the amplifier performance deteriorates.
25. Mention two advantages which are specific to Darlington connection. (Dec. 2004)
The input impedance can be improved with the help of Darlington connection
( cascaded connection of two emitter followers)
Current gain of the circuit can be improved by ten times.
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EC6304- Electronic Circuits- I III Semester ECE
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32. Why class A amplifier must not be operated under no signal conditions? ( Dec.2005)
When there is no signal in class A amplifier, there will be maximum power dissipation.
𝑃𝑑 = 𝑃𝑑𝑐 − 𝑃𝑎𝑐
𝑃𝑑𝑐 – 0 [when 𝑃𝑎𝑐 = 0 ]
35. What is the drawback of class B amplifier? How it is minimized? ( Dec 2004)
The drawback of class B amplifier is cross-over distortion. To overcome this cross over
distortion, a small forward bias is kept applied to the transistors, so that when input is
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EC6304- Electronic Circuits- I III Semester ECE
Two marks questions and answers
zero, this additional forward bias can make the transistor ON immediately, eliminating
cross-over distortion.
36. What is a heat sink? Give its advantages.( Dec 2006, May 2008)
A heat sink is a mechanical device which is connected or press fit to the case of the
transistor that provides a large surface area, to dissipate the developed heat, the heat sink
carries the heat to the surroundings. The advantages of heat sink are:
The temperature of the case gets lowered
The power handling capacity of the transistors can approach the rated maximum
value.
39. Why is power amplifiers provided with heat sink? ( April / May 2010)
The maximum power handled by a particular power transistor and the temperature of the
transistor junctions are closely related. This is because of the fact that the junction
temperature increases due to the power dissipation. The hat sink draws heat from the
power transistor via thermal condition expels the heat into the ambient air via, thermal
convection and heat radiation.
40. What are the different types of distortion in amplifiers? ( April / May 2009)
The different types of distortion in amplifier are frequency distortion, amplitude
distortion, and phase distortion.
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EC6304- Electronic Circuits- I III Semester ECE
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UNIT – III
JFET AND MOSFET AMPLIFIERS
1. What is an amplifier?
An amplifier is a circuit; it can be used to increase the magnitude of the input current or voltage
at the output by means of energy drawn from an external source.
2. Write the expression for basic current equation in MOSFET?
The region for which vds < vds(sat) is known as Non saturation region,
id = kn[2(vgs-vtn)vds-vds2].
In the saturation region,the ideal current - voltage characteristics for vgs > vtn are given by the
equation ,id = kn(vgs-vtn)2
3. Why FET is called as a voltage control device.
In FET the voltage applied between gate and source v gs controls the drain current id. Therefore,
FET is a voltage control device. In FET, current is carried by only one type of charge particles,
either electrons or holes.
4. Draw the equivalent circuit of FET
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EC6304- Electronic Circuits- I III Semester ECE
Two marks questions and answers
Here rʹgs appears between the gate and source ,and a current source equal to gmv gs appears
between the drain and source .Also, the internal drain to source resistance rʹds is included.
5. Write two reasons why a hybrid parameter model is used in small signal analysis.
i. The h parameters are determined by short circuiting the output and open circuiting
the input. This method of analyzing transistor circuits makes easier for designing
a circuit.
ii. The hybrid parameters are more popular in transistor circuit analysis, because it
has mixed dimensions.
D-MOSFET E-MOSFET
7. What are the basic circuit configurations used in MOSFET?
There are 3 basic MOSFET circuit configurations, they are
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EC6304- Electronic Circuits- I III Semester ECE
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i. Common Source(CS)
ii. Common Gate(CG)
iii. Common Drain (CD)
8. Sketch the simple common gate amplifier circuit of JFET?
9. Compare the characteristic of small signal amplifier with large signal amplifier.
Small signal amplifier Large signal amplifier
Input signal is so weak as to
When fluctuation in collector
produce small fluctuations in
current is large i.e., beyond the
the collector current compared
linear portion of characteristics of
to its quiescent value, the
the amplifier, is called as large
amplifier is known as small
signal amplifier.
signal amplifier.
10. Compare the AC circuit characteristics of the CS, CG and ( source follower) CD.
Characteristics of the three MOSFET amplifier configurations.
Configuration Voltage gain Current gain Input Output
resistance resistance
Common Av > 1 - RTH Moderate to high
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11. State the general advantage of using JEFET rather than BJT?
i. FETs require less space than that for BJTs, hence they are preferred in integrated
circuits.
ii. FETs have higher input impedance than BJT they are preferred in amplifiers where
high input impedance is required.
13. How does the body effect change the small signal equivalent circuit of the
MOSFET?
The body effect occurs in a MOSFET in which the substrate, or body, is not
connected to the source. For an NMOS device, the body is connected to the most
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EC6304- Electronic Circuits- I III Semester ECE
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negative potential in the circuit and will be at signal ground for the four-terminal
MOSFET
14. List out the applications of MOSFET?
i. Heat sink and cooling within a computer most MOSFETs are located on the
microprocessor chip, mounted on the motherboard and conspicuously cooled by
its own heat sink and cooling fan.
ii. Microprocessor chip The microprocessor chip itself is mounted in an electronic
package with hundreds of interconnecting pins and connected to the chip by
hundreds of tiny bond wires.
iii. Chip cross-section A cross-section of the chip reveals multiple layers of tiny wires
above the MOSFETs which are embedde4d in the silicon substrate.
15. Write the expressions of small signal voltage gain and output resistance of the
common gate circuit?
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EC6304- Electronic Circuits- I III Semester ECE
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No.
A) N – channel depletion type
a) N – channel MOSFET.
1 Types
b) P– channel B) P – channel depletion type MOSFET
C) N – channel enhancement type
MOSFET.
D) P – channel enhancement type
MOSFET.
UNIT–IV
FREQUENCY ANALYSIS OF BJT AND MOSFET AMPLIFIERS
GENERAL INTRODUCTION:
1. Why are h-parameters not used at high frequencies? [M/J – 12]
The h-parameters are not used at high frequencies, because the values of h-parameters are
not constant at high frequencies. Therefore, it is necessary to analyze the transistor at each and
every frequency, which is impracticable. At high frequencies, h-parameters become complex in
nature.
2. Write the expressions for gain bandwidth product for voltage and current. [A/M – 10]
The gain bandwidth product for voltage gain is,
−ℎ𝑓𝑒 𝑅𝐿 1
|𝐴𝑣𝑠 𝑙𝑜𝑤 𝑓𝐻 | = |𝐴𝑣𝑠𝑜 𝑓𝐻 | = * 2𝜋𝑅
𝑅𝑠 +ℎ𝑖𝑒 𝑒𝑞 𝐶𝑒𝑞
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EC6304- Electronic Circuits- I III Semester ECE
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−ℎ𝑓𝑒 𝑅𝑠 1
|𝐴𝑖𝑠 𝑙𝑜𝑤 𝑓𝐻 | = |𝐴𝑖𝑠𝑜 𝑓𝐻 | = * 2𝜋𝑅
𝑅𝑠 +ℎ𝑖𝑒 𝑒𝑞 𝐶𝑒𝑞
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EC6304- Electronic Circuits- I III Semester ECE
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hfe
i ) |𝐴𝑖 | = 2
√1+( 𝑓 )
𝑓𝛽
2 2
𝑓 2MHz
hfe = |𝐴𝑖 | ∗ √1 + (𝑓 ) = 25 ∗ √1 + (200KHz)
𝛽
= 25 ∗ √1 + 102 = 25 * 10 = 250
8. What are the effects of emitter bypass capacitor on high frequency response? [N/D – 12]
At lower frequencies, the bypass capacitor CE is not a short. So, the emitter is not at
ground. Xc in parallel with RE (RS incase of FET) creates an impedance. The signal voltage drops
across this impedance reducing the current gain.
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EC6304- Electronic Circuits- I III Semester ECE
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[N/D – 09]
Overall gain in dB = sum of decibel voltage gains of the individual stages.
Av (dB) = 20 + 40 = 60 dB
13. Write the equation of overall upper and lower cutoff frequencies of multistage amplifier
[A/M – 12]
Overall lower cutoff frequency of multistage amplifier
𝒏
𝟏 𝟏
=
𝟐 √𝟐
√𝟏+( 𝒇𝑳 )
[ 𝒇𝑳(𝐧)
]
𝑓𝐿
𝑓𝐿 (n) = 1
√(2 ⁄𝑛 )−1
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EC6304- Electronic Circuits- I III Semester ECE
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𝟏 𝟏
=
√𝟐
(𝐧) 𝟐
√𝟏+(𝒇𝑯 )
[ 𝒇𝑯 ]
1⁄
𝑓𝐻 (n) =𝑓𝐻 √(2 𝑛) −1
UNIT–V
IC MOSFET AMPLIFIERS
1. What is meant by current steering circuit?
Biasing in integrated-circuit design is based on the use of constant-current sources. On an
IC chip with a number of amplifier stages, a constant dc current called a reference current is
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EC6304- Electronic Circuits- I III Semester ECE
Two marks questions and answers
generated at one location and is then replicated at various other locations for biasing the
variousamplifier stages through a process known as current steering.
2. What is the relation between Io and Iref?
The special connection of Ql and Q2 provides an output current I0 that is related to the
reference current IREF by the ratio of the aspect ratios of the transistors. The relationship between
I0 and IREF is determined
by the geometries of the transistors.
3. What is meant by current mirror?
In the special case of identical transistors, I0 = IREF, and the circuit replicates or mirrors
the reference current in the output terminal. This has given the circuit composed of Ql and Q2 the
name current mirror.
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EC6304- Electronic Circuits- I III Semester ECE
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7. Give the driver characteristics and load curve for MOSFET circuit with active load.
The figure shows the transistor characteristics of the driver transistor M0 for several
values of gate-to-source or VI voltages. Superimposed on these curves is the load curve, which
essentially is the ID versus VSD characteristic of the active load M2 at a constant VSG voltage.
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EC6304- Electronic Circuits- I III Semester ECE
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The Q-point moves up and down the load curve producing a change in output voltage. Also, as
VI increases to VI 2, the driver transistor M0 is driven into the non-saturation region; as VI
decreases
to VI 1, the load transistor M2 is driven into the non-saturation region.
8. Define – CMRR
The ability of a differential amplifier to reject a common-mode signal is given in terms of
the common-mode rejection ratio (CMRR). The CMRR is a figure of merit for the differential
amplifier and is defined as
Ad – differential gain
Acm – common mode gain
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IQ – bias current
Ro – output resistance
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